Patents by Inventor Chung-Ching Yang

Chung-Ching Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6590850
    Abstract: An information storage unit functioning in a vacuum is provided wherein a data storage medium has an information storage area for storing and reading information thereon. An array of electron beam emitters is spaced from and in close proximity to the data storage medium for selectively directing a plurality of electron beams toward the data storage medium. Focusing optics between the array of electron beam emitters and the data storage medium focus each of the electron beams on one part of the information storage area of the data storage medium. A micro electromechanical motor associated with the data storage medium moves the data storage medium relative to the array of electron beam emitters, so that each of the emitters directs an electron beam selectively to a portion of the information storage area to read or write information therein. Electronic circuitry spaced from and in electronic communication with the array of electron beam emitters controls the operations of the array of electron beam emitters.
    Type: Grant
    Filed: March 7, 2001
    Date of Patent: July 8, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Kenneth J. Eldredge, Winston C. Mitchell, Steven L. Naberhuis, Chung Ching Yang
  • Patent number: 6537846
    Abstract: A selenidation reaction for bonding one or more active substrates to a base substrate is disclosed. A bonded-substrate is fabricated by forming a first multi-stacked layer of selenium and indium on a bonding surface of an active substrate and forming a second multi-stacked layer of selenium and indium on a mounting surface of a base substrate. The first and second multi-stacked layers are placed into contact with each other with substantially no pressure. Then the active substrate and the base substrate are bonded to each other by annealing them in an inert ambient to form an indium-selenium compound bond layer that adhesively bonds the substrates to each other. The annealing can occur at a lower temperature than prior wafer-bonding processes and the first and second multi-stacked layers can be deposited over a wide range of relatively low temperatures including room temperature.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: March 25, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Heon Lee, Chung Ching Yang
  • Publication number: 20030032290
    Abstract: A device isolation process flow for an atomic resolution storage (ARS) system inserts device isolation into a process flow of the ARS system so that diodes may be electrically insulated from one another to improve signal to noise ratio. In addition, since most harsh processing is done prior to depositing a phase change layer, which stores data bits, process damage to the phase change layer may be minimized.
    Type: Application
    Filed: October 3, 2002
    Publication date: February 13, 2003
    Inventors: Heon Lee, Chung-Ching Yang, Peter Hartwell
  • Publication number: 20030017679
    Abstract: A selenidation reaction for bonding one or more active substrates to a base substrate is disclosed. A bonded-substrate is fabricated by forming a first multi-stacked layer of selenium and indium on a bonding surface of an active substrate and forming a second multi-stacked layer of selenium and indium on a mounting surface of a base substrate. The first and second multi-stacked layers are placed into contact with each other with substantially no pressure. Then the active substrate and the base substrate are bonded to each other by annealing them in an inert ambient to form an indium-selenium compound bond layer that adhesively bonds the substrates to each other. The annealing can occur at a lower temperature than prior wafer-bonding processes and the first and second multi-stacked layers can be deposited over a wide range of relatively low temperatures including room temperature.
    Type: Application
    Filed: March 30, 2001
    Publication date: January 23, 2003
    Inventors: Heon Lee, Chung Ching Yang
  • Publication number: 20020173153
    Abstract: A device isolation process flow for an atomic resolution storage (ARS) system inserts device isolation into a process flow of the ARS system so that diodes may be electrically insulated from one another to improve signal to noise ratio. In addition, since most harsh processing is done prior to depositing a phase change layer, which stores data bits, process damage to the phase change layer may be minimized.
    Type: Application
    Filed: May 21, 2001
    Publication date: November 21, 2002
    Inventors: Heon Lee, Chung-Ching Yang, Peter Hartwell
  • Publication number: 20020126615
    Abstract: An information storage unit functioning in a vacuum is provided wherein a data storage medium has an information storage area for storing and reading information thereon. An array of electron beam emitters is spaced from and in close proximity to the data storage medium for selectively directing a plurality of electron beams toward the data storage medium. Focusing optics between the array of electron beam emitters and the data storage medium focus each of the electron beams on one part of the information storage area of the data storage medium. A micro electromechanical motor associated with the data storage medium moves the data storage medium relative to the array of electron beam emitters, so that each of the emitters directs an electron beam selectively to a portion of the information storage area to read or write information therein. Electronic circuitry spaced from and in electronic communication with the array of electron beam emitters controls the operations of the array of electron beam emitters.
    Type: Application
    Filed: March 7, 2001
    Publication date: September 12, 2002
    Inventors: Kenneth J. Eldredge, Winston C. Mitchell, Steven L. Naberhuis, Chung Ching Yang
  • Patent number: 6440820
    Abstract: An improved process flow for an atomic resolution storage (ARS) system deposits conductive electrodes, together with a protective layer, on a media side of a rotor wafer before most of other device processing, thus preserving a surface for ARS storage media from subsequent wafer thinning process. CMOS circuitry is also formed in a stator wafer at a later stage. Therefore, the CMOS circuitry is less likely to be damaged by heat processing. In addition, processing of the media side of the rotor wafer may be performed with loosened thermal budget. Finally, because the media side of the rotor wafer is processed before wafer bonding of the rotor wafer and the stator wafer, there is less probability of degradation of the wafer bonding. Therefore, device yield may be enhanced, leading to lower manufacturing cost.
    Type: Grant
    Filed: May 21, 2001
    Date of Patent: August 27, 2002
    Assignee: Hewlett Packard Company
    Inventors: Heon Lee, Chung-Ching Yang, Peter Hartwell
  • Publication number: 20020113250
    Abstract: Ultra-high-density data-storage media employing indium chalcogenide, gallium chalcogenide, and indium-gallium chalcogenide films to form bit-storage regions that act as photoconductive, photovoltaic, or photoluminescent semiconductor devices that produce electrical signals when exposed to electromagnetic radiation, or to form bit-storage regions that act as cathodoconductive, cathodovoltaic, or cathodoluminescent semiconductor devices that produce electrical signals when exposed to electron beams. Two values of a bit are represented by two solid phases of the data-storage medium, a crystalline phase and an amorphous phase, with transition between the two phases effected by heating the bit storage region.
    Type: Application
    Filed: February 20, 2001
    Publication date: August 22, 2002
    Inventors: Alison Chaiken, Gary Gibson, Heon Lee, Krzysztof Nauka, Chung-Ching Yang
  • Patent number: 6436794
    Abstract: An improved process flow for an atomic resolution storage (ARS) system deposits conductive electrodes on a media side of a rotor wafer before wafer thinning process, i.e., grinding and CMP, thus protecting the conductive electrodes on a media surface from the grinding process. In addition, the CMOS circuitry is formed in a stator wafer at a relatively later stage. Therefore, the CMOS circuitry is less likely to be damaged by heat processing. In addition, some of the necessary processing may be performed with loosened thermal budget. Finally, because wafer bonding of the rotor wafer and the stator wafer is performed at a later stage, there is less probability of degradation of the wafer bonding. Accordingly, device yield may be enhanced, leading to lower manufacturing cost.
    Type: Grant
    Filed: May 21, 2001
    Date of Patent: August 20, 2002
    Assignee: Hewlett-Packard Company
    Inventors: Heon Lee, Chung-Ching Yang, Peter Hartwell