Patents by Inventor Chung Fu

Chung Fu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240339331
    Abstract: A method for fabricating a semiconductor device includes the steps of first providing a substrate comprising a medium-voltage (MV) region and a low-voltage (LV) region, forming a first gate structure and a second gate structure on the MV region and a second gate structure on the LV region, forming a patterned mask on the MV region as the patterned mask covers the first gate structure and the second gate structure and exposes the substrate between the first gate structure and the second gate structure, and then forming a first epitaxial layer between the first gate structure and the second gate structure.
    Type: Application
    Filed: May 4, 2023
    Publication date: October 10, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chung-Fu Chang, Guang-Yu Lo, Chun-Tsen Lu
  • Publication number: 20240313046
    Abstract: A method for fabricating a semiconductor device includes the steps of forming a fin-shaped structure on a substrate, forming a first trench and a second trench in the fin-shaped structure, forming a first dielectric layer in the first trench and the second trench, removing part of the first dielectric layer, forming a second dielectric layer in the first trench and the second trench to form a first single diffusion break (SDB) structure and a second SDB structure, and then forming a gate structure on the fin-shaped structure, the first SDB structure, and the second SDB structure.
    Type: Application
    Filed: April 13, 2023
    Publication date: September 19, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Guang-Yu Lo, Chun-Tsen Lu, Chung-Fu Chang, Chih-Shan Wu, Yu-Hsiang Lin, Wei-Hao Chang
  • Publication number: 20240282843
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a gate dielectric layer on the fin-shaped structure; forming a gate electrode on the fin-shaped structure; performing a nitridation process to implant ions into the gate dielectric layer adjacent to two sides of the gate electrode; and forming an epitaxial layer adjacent to two sides of the gate electrode.
    Type: Application
    Filed: May 2, 2024
    Publication date: August 22, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chung-Fu Chang, Kuan-Hung Chen, Guang-Yu Lo, Chun-Chia Chen, Chun-Tsen Lu
  • Publication number: 20240255549
    Abstract: The present invention provides a residual current detection device comprising a first conductive wire, a second conductive wire, a first magnetic concentrator and a magnetic sensing device wherein the first conductive wire generates a first magnetic field, the second conductive wire is arranged at one side of the first conductive wire for generating a second magnetic field, the first magnetic concentrator is arranged between the first and second conductive wires whereby a highly concentrated magnetic field area is formed between the first and second conductive wires, and the magnetic sensing device is arranged in the highly concentrated magnetic field area for detecting the first and second magnetic fields.
    Type: Application
    Filed: January 25, 2024
    Publication date: August 1, 2024
    Inventors: Nai-Chung Fu, Chih-Chao Shih, Ming-Yu Kuo
  • Patent number: 12026027
    Abstract: A PSU including a primary side, including: a buck capacitor; and a PFC in electrical communication with the buck capacitor; a secondary side, including: a super capacitor; and a converter in electrical communication with an output of the primary side and in electrical communication with the super capacitor, wherein in a first state, the PFC receives energy from a source of energy, and in response: provides the energy to i) charge the buck capacitor based on a SOC of the buck capacitor, ii) charge the super capacitor based on a second SOC of the super capacitor; and iii) an IHS coupled to the PSU, wherein in a second state, the PFC ceases to receive energy from the source of energy and in response: the buck capacitor discharges to provide energy to the IHS; after the buck capacitor is completely discharged, the super capacitor discharges to provide energy to the IHS.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: July 2, 2024
    Assignee: Dell Products L.P.
    Inventors: Po-Yun Shih, Shih-Chieh Wang, Chung-Fu Lai
  • Publication number: 20240201761
    Abstract: A PSU including a primary side, including: a buck capacitor; and a PFC in electrical communication with the buck capacitor; a secondary side, including: a super capacitor; and a converter in electrical communication with an output of the primary side and in electrical communication with the super capacitor, wherein in a first state, the PFC receives energy from a source of energy, and in response: provides the energy to i) charge the buck capacitor based on a SOC of the buck capacitor, ii) charge the super capacitor based on a second SOC of the super capacitor; and iii) an IHS coupled to the PSU, wherein in a second state, the PFC ceases to receive energy from the source of energy and in response: the buck capacitor discharges to provide energy to the IHS; after the buck capacitor is completely discharged, the super capacitor discharges to provide energy to the IHS.
    Type: Application
    Filed: December 15, 2022
    Publication date: June 20, 2024
    Inventors: Po-Yun Shih, Shih-Chieh Wang, Chung-Fu Lai
  • Patent number: 12011868
    Abstract: A method of producing high modulus and strength polymer materials includes compressive rolling a semicrystalline polymer material in at least two different axial directions of the material; and axially orienting at least a portion of the compressive rolled material to a draw ratio less than the ultimate elongation or the elongation % at break of the material.
    Type: Grant
    Filed: September 14, 2022
    Date of Patent: June 18, 2024
    Assignee: CASE WESTERN RESERVE UNIVERSITY
    Inventors: Eric Baer, Andrew Olah, Cong Zhang, Gary Wnek, Nathan McMullen, Chung-Fu Cheng
  • Patent number: 12009409
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a gate dielectric layer on the fin-shaped structure; forming a gate electrode on the fin-shaped structure; performing a nitridation process to implant ions into the gate dielectric layer adjacent to two sides of the gate electrode; and forming an epitaxial layer adjacent to two sides of the gate electrode.
    Type: Grant
    Filed: March 6, 2023
    Date of Patent: June 11, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chung-Fu Chang, Kuan-Hung Chen, Guang-Yu Lo, Chun-Chia Chen, Chun-Tsen Lu
  • Publication number: 20240056601
    Abstract: A system comprises a source block buffer and a plurality of hardware motion estimation search processing units in communication with the source block buffer. The source block buffer is configured to store at least a portion of a source block of a source frame of a video. The plurality of hardware motion estimation search processing units are configured to perform at least a portion of a motion estimation for the source block at least in part in parallel across a plurality of different reference frames of the video.
    Type: Application
    Filed: December 17, 2021
    Publication date: February 15, 2024
    Inventors: Harikrishna Madadi Reddy, Xianliang Zha, Junqiang Lan, Sujith Srinivasan, Guogang Hua, Chung-Fu Lin
  • Patent number: 11831255
    Abstract: A scanner comprises a mirror, a first piezoelectric actuator, a second piezoelectric actuator, a third piezoelectric actuator, a fourth piezoelectric actuator, a first connecting member, a second connecting member, a first mirror spring, a second mirror spring, a stationary member, a first plurality of actuator springs, a second plurality of actuator springs, a third plurality of actuator springs, a fourth plurality of actuator springs, a first plurality of electrodes, and a second plurality of electrodes. The scanner is driven by piezoelectric actuators. A method of fabricating the scanner comprises the steps of providing a wafer; oxidation; deposition; patterning; and applying a singulation process.
    Type: Grant
    Filed: April 18, 2021
    Date of Patent: November 28, 2023
    Assignee: ULTIMEMS, INC.
    Inventors: Yee-Chung Fu, Han-Tang Su, Yu-Chun Yu
  • Patent number: 11815571
    Abstract: The present invention provides an electric current sensor comprising a substrate and MR sensing circuit. The substrate has a first surface along a first axis and a second axis. The MR sensing circuit is utilized to detect a magnetic filed about a third axis. The MR sensing circuit is formed onto the first surface and has a plurality of MR sensor pairs. Each MR sensor in each MR sensor pair has a plurality of conductive structures, wherein the conductive structures of one MR sensor are symmetrically arranged. Alternatively, the present invention provides an electric current sensing device using a pair of electric sensors symmetrically arranged at two lateral sides of a conductive wire having an electric current flowing therethrough for eliminating the magnetic field along Z axis generated by external environment.
    Type: Grant
    Filed: May 3, 2022
    Date of Patent: November 14, 2023
    Assignee: VOLTAFIELD TECHNOLOGY CORPORATION
    Inventors: Nai-Chung Fu, Chien-He Hou, Chih-Chao Shih, Fu-Tai Liou
  • Patent number: 11720277
    Abstract: A control system and a control method are provided. The control system provides a first setting signal in response to an abnormal read-write operation performed on at least one storage device. The control system generates a first state signal having a first logic value in response to the first setting signal and latches the first state signal, and disables the at least one storage device on which the abnormal read-write operation is performed in response to the first state signal having the first logic value. The control system includes a restart input module. The restart input module converts the first logic value of the latched first state signal into a second logic value, so that the control system restarts the at least one storage device disabled in response to the first state signal having the second logic value.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: August 8, 2023
    Assignee: Wiwynn Corporation
    Inventors: Yahsuan Tseng, Kai-Sheng Chen, Yi-Hao Chen, Chung Fu Huang
  • Publication number: 20230234130
    Abstract: A method of manufacturing a gas permeable metal is provided. First a plurality of metal powder particles is spread out tightly to form a first deposited layer and a second deposited layer is formed over the first deposited layer. Then scan the first and the second deposited layers along a plurality of parallel and spaced linear paths. A gap is formed by a difference between a width of melt pool and a linear distance between the two adjacent linear paths. The linear paths of the first and the second deposited layers are arranged with an angle therebetween. The gaps of the first and the second deposited layers are crossed over to form pores distributed like a grid graph. A plurality of the first and the second deposited layers are stacked and the pores are aligned to form continuous pore channels. Thereby the metal with good venting is produced conveniently.
    Type: Application
    Filed: November 10, 2022
    Publication date: July 27, 2023
    Inventors: MENG-HSIU TSAI, HO-CHUNG FU, I-LIN LAI
  • Publication number: 20230207669
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a gate dielectric layer on the fin-shaped structure; forming a gate electrode on the fin-shaped structure; performing a nitridation process to implant ions into the gate dielectric layer adjacent to two sides of the gate electrode; and forming an epitaxial layer adjacent to two sides of the gate electrode.
    Type: Application
    Filed: March 7, 2023
    Publication date: June 29, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chung-Fu Chang, Kuan-Hung Chen, Guang-Yu Lo, Chun-Chia Chen, Chun-Tsen Lu
  • Publication number: 20230207668
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a gate dielectric layer on the fin-shaped structure; forming a gate electrode on the fin-shaped structure; performing a nitridation process to implant ions into the gate dielectric layer adjacent to two sides of the gate electrode; and forming an epitaxial layer adjacent to two sides of the gate electrode.
    Type: Application
    Filed: March 6, 2023
    Publication date: June 29, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chung-Fu Chang, Kuan-Hung Chen, Guang-Yu Lo, Chun-Chia Chen, Chun-Tsen Lu
  • Patent number: 11665340
    Abstract: A disclosed computer-implemented method may include (1) selecting, from a video stream, a reference frame and a current frame, (2) collecting a reference histogram of the reference frame and a current histogram of the current frame, and (3) generating a smoothed reference histogram by applying a smoothing function to at least a portion of the reference histogram. In some examples, the computer-implemented method may also include (1) determining a similarity metric between the smoothed reference histogram and the current histogram and, (2) when the similarity metric is greater than a threshold value, applying weighted prediction during a motion estimation portion of an encoding of the video stream. Various other methods, systems, and computer-readable media are also disclosed.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: May 30, 2023
    Assignee: Meta Platforms, Inc.
    Inventors: Junqiang Lan, Guogang Hua, Harikrishna Madadi Reddy, Chung-Fu Lin, Xing Cindy Chen, Sujith Srinivasan
  • Publication number: 20230140628
    Abstract: A system that includes a pixel processing stage decoupled from an entropy coding stage is disclosed. The pixel processing results comprise quantized transform coefficients that are divided into component blocks. The component blocks including non-zero data are identified. An optimized version of the pixel processing results for storage in a buffer storage is generated. The optimized version includes an identification of which of the component blocks include non-zero data, and the optimized version includes contents of one or more of the component blocks that include non-zero data, without including contents of one or more of the component blocks that only include zero data. The optimized version of the pixel processing results is provided for storage in the buffer storage. The optimized version of the pixel processing results from the buffer storage is received and processed to generate an unpacked version of the pixel processing results for use in entropy coding.
    Type: Application
    Filed: November 4, 2021
    Publication date: May 4, 2023
    Inventors: Srikanth Alaparthi, Karunakar Reddy Rachamreddy, Yunqing Chen, Visalakshi Vaduganathan, Chung-Fu Lin, Harikrishna Madadi Reddy
  • Patent number: 11631753
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a gate dielectric layer on the fin-shaped structure; forming a gate electrode on the fin-shaped structure; performing a nitridation process to implant ions into the gate dielectric layer adjacent to two sides of the gate electrode; and forming an epitaxial layer adjacent to two sides of the gate electrode.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: April 18, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chung-Fu Chang, Kuan-Hung Chen, Guang-Yu Lo, Chun-Chia Chen, Chun-Tsen Lu
  • Publication number: 20230076006
    Abstract: A control system and a control method are provided. The control system provides a first setting signal in response to an abnormal read-write operation performed on at least one storage device. The control system generates a first state signal having a first logic value in response to the first setting signal and latches the first state signal, and disables the at least one storage device on which the abnormal read-write operation is performed in response to the first state signal having the first logic value. The control system includes a restart input module. The restart input module converts the first logic value of the latched first state signal into a second logic value, so that the control system restarts the at least one storage device disabled in response to the first state signal having the second logic value.
    Type: Application
    Filed: November 18, 2021
    Publication date: March 9, 2023
    Applicant: Wiwynn Corporation
    Inventors: Yahsuan Tseng, Kai-Sheng Chen, Yi-Hao Chen, Chung Fu Huang
  • Patent number: 11558637
    Abstract: A system comprises a memory storage configured to store at least a portion of a frame of a video and a hardware motion estimation search processing unit configured to perform at least a portion of a motion estimation search for the video for a plurality of different block sizes. The hardware motion estimation search processing unit is configured to perform the motion estimation search using a plurality of source sub-blocks of a first block size to determine a first type of comparison evaluation values for the first block size. A combination of values included in the first type of comparison evaluation values is utilized to determine at least one second type of comparison evaluation values for a second block size, wherein the second block size is larger than the first block size.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: January 17, 2023
    Assignee: Meta Platforms, Inc.
    Inventors: Xianliang Zha, Harikrishna Madadi Reddy, Junqiang Lan, Sujith Srinivasan, Chung-Fu Lin, Guogang Hua