Abstract: A semiconductor package includes a base comprising a top surface and a bottom surface that is opposite to the top surface; a first semiconductor chip mounted on the top surface of the base in a flip-chip manner; a second semiconductor chip stacked on the first semiconductor chip and electrically coupled to the base by wire bonding; an in-package heat dissipating element comprising a dummy silicon die adhered onto the second semiconductor chip by using a high-thermal conductive die attach film; and a molding compound encapsulating the first semiconductor die, the second semiconductor die, and the in-package heat dissipating element.

Abstract: An anti-peep display device includes a display module and an anti-peep module disposed on the display module. The anti-peep module includes the following features. The first light incident surface faces the display surface, the second and third light incident surfaces are located on opposite sides of the first light incident surface, the first condensing portion is disposed corresponding to the second light incident surface and the first light source, the second condensing portion is disposed corresponding to the third light incident surface and the second light source, the first and second condensing portions convert beams of the first and second light sources into anti-peep beams with a beam angle less than 10 degrees, and the optical microstructures reflect the anti-peep beams and exit the anti-peep beams from the light guide plate. The present invention also provides an anti-peep method applicable to the anti-peep display device.

Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary method of forming a semiconductor device comprises receiving a structure including a substrate and a first hard mask over the substrate, the first hard mask having at least two separate portions; forming spacers along sidewalls of the at least two portions of the first hard mask with a space between the spacers; forming a second hard mask in the space; forming a first cut in the at least two portions of the first hard mask; forming a second cut in the second hard mask; and depositing a cut hard mask in the first cut and the second cut.

Abstract: An electrode controls transmittance of a blocking layer over a photodiode of a pixel sensor (e.g., a photodiode of a small pixel detector) by changing oxidation of a metal material included in the blocking layer. By using the electrode to adjust transmittance of the blocking layer, pixel sensors for different uses and/or products may be produced using a single manufacturing process. As a result, power and processing resources are conserved that otherwise would have been expended in switching manufacturing processes. Additionally, production time is decreased (e.g., by eliminating downtime that would otherwise have been used to reconfigure fabrication machines.

Abstract: In some embodiments, the present disclosure relates to a method of forming an interconnect. The method includes forming an etch stop layer (ESL) over a lower conductive structure and forming one or more dielectric layers over the ESL. A first patterning process is performed on the one or more dielectric layers to form interconnect opening and a second patterning process is performed on the one or more dielectric layers to increase a depth of the interconnect opening and expose an upper surface of the ESL. A protective layer is selectively formed on sidewalls of the one or more dielectric layers forming the interconnect opening. A third patterning process is performed to remove portions of the ESL that are uncovered by the one or more dielectric layers and the protective layer and to expose the lower conductive structure. A conductive material is formed within the interconnect opening.

Abstract: Some embodiments relate to an integrated chip including a plurality of conductive structures over a substrate. A first dielectric layer is disposed laterally between the conductive structures. A spacer structure is disposed between the first dielectric layer and the plurality of conductive structures. An etch stop layer overlies the plurality of conductive structures. The etch stop layer is disposed on upper surfaces of the spacer structure and the first dielectric layer.

Abstract: A sealing article includes a body and a coating layer disposed on at least one surface of the body. The body comprises a polymeric elastomer such as perfluoroelastomer or fluoroelastomer. The coating layer comprises at least one metal. The sealing article may be a seal, a gasket, an O-ring, a T-ring or any other suitable product. The sealing article is resistant to ultra-violet (UV) light and plasma, and may be used for sealing a semiconductor processing chamber.

Abstract: A supported metallocene catalyst includes a carrier and a metallocene component. The carrier includes an inorganic oxide particle and an alkyl aluminoxane material. The inorganic oxide particle includes at least one inorganic oxide compound selected from the group consisting of an oxide of Group 3A and an oxide of Group 4A. The alkyl aluminoxane material includes an alkyl aluminoxane compound and an alkyl aluminum compound that is present in amount ranging from greater than 0.01 wt % to less than 14 wt % base on 100 wt % of the alkyl aluminoxane material. The metallocene component is supported on the carrier, and includes one of a metallocene compound containing a metal from Group 3B, a metallocene compound containing a metal from Group 4B, and a combination thereof. A method for preparing the supported metallocene catalyst and a method for preparing polyolefin using the supported metallocene catalyst are also disclosed.

Abstract: A method of making a sealing article that includes a body and a coating layer disposed on at least one surface of the body. The body comprises a polymeric elastomer such as perfluoroelastomer or fluoroelastomer. The coating layer comprises at least one metal. The sealing article may be a seal, a gasket, an O-ring, a T-ring or any other suitable product. The sealing article is resistant to ultra-violet (UV) light and plasma, and may be used for sealing a semiconductor processing chamber.

Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes a first interconnect dielectric layer arranged over a substrate. An interconnect wire extends through the first interconnect dielectric layer, and a barrier structure is arranged directly over the interconnect wire. The integrated chip further includes an etch stop layer arranged over the barrier structure and surrounds outer sidewalls of the barrier structure. A second interconnect dielectric layer is arranged over the etch stop layer, and an interconnect via extends through the second interconnect dielectric layer, the etch stop layer, and the barrier structure to contact the interconnect wire.

Abstract: A semiconductor structure includes a conductive feature disposed over a semiconductor substrate, a via disposed in a first interlayer dielectric (ILD) layer over the conductive feature, and a metal-containing etch-stop layer (ESL) disposed on the via, where the metal-containing ESL includes a first metal and is resistant to etching by a fluorine-containing etchant. The semiconductor structure further includes a conductive line disposed over the metal-containing ESL, where the conductive line includes a second metal different from the first metal and is etchable by the fluorine-containing etchant, and where the via is configured to interconnect the conductive line to the conductive feature. Furthermore, the semiconductor structure includes a second ILD layer disposed over the first ILD layer.

Abstract: A device includes a semiconductor fin, and a gate stack on sidewalls and a top surface of the semiconductor fin. The gate stack includes a high-k dielectric layer, a work-function layer overlapping a bottom portion of the high-k dielectric layer, and a blocking layer overlapping a second bottom portion of the work-function layer. A low-resistance metal layer overlaps and contacts the work-function layer and the blocking layer. The low-resistance metal layer has a resistivity value lower than second resistivity values of both of the work-function layer and the blocking layer. A gate spacer contacts a sidewall of the gate stack.

Abstract: A novel shape memory polymer (SMP)-based device for surgical treatment of an intracorporeal defect (e.g., a void or anomaly) such as an intracranial aneurysm or fistula. In at least one non-limiting embodiment, the SMP device is a 3D-printed SMP material sized to specifically fit and thus occlude an intracranial aneurysm (ICA). The SMP device may be delivered to the intracorporeal defect via a catheter having a heating mechanism wherein the SMP device is raised above its glass transition temperature as it is deployed, causing the SMP device to return to its permanent shape after it is deployed into the intracorporeal defect. SMP device delivery systems that include the SMP devices, as well as methods of making and using the devices and systems, are also disclosed.

Abstract: A novel shape memory polymer (SMP)-based device for surgical treatment of an intracorporeal defect (e.g., a void or anomaly) such as an intracranial aneurysm or fistula. In at least one non-limiting embodiment, the SMP device is a 3D-printed SMP material sized to specifically fit and thus occlude an intracranial aneurysm (ICA). The SMP device may be delivered to the intracorporeal defect via a catheter having a heating mechanism wherein the SMP device is raised above its glass transition temperature as it is deployed, causing the SMP device to return to its permanent shape after it is deployed into the intracorporeal defect. SMP device delivery systems that include the SMP devices, as well as methods of making and using the devices and systems, are also disclosed.

Abstract: A method for identifying unknown third parties appearing within video call data based on generated image characteristics data. A user's computing device and a participant computing device may exchange and render video call data in which the user's computing device may display the unknown third-party. The user's computing device may generate image characteristics data based on selected imagery. The user's computing device may compare the image characteristics data to stored contact information on the user's computing device to find a match, and may transmit the image characteristics data to the participant computing device for comparison with local stored information stored. The participant computing device may transmit a report message to the user's computing device indicating whether a match is found. In an embodiment, a server may transmit the facial data to other devices for comparison. In another embodiment, the user's computing device may request contact information from participant computing devices.

Abstract: A method for identifying unknown third parties appearing within video call data based on generated image characteristics data. A user's computing device and a participant computing device may exchange and render video call data in which the user's computing device may display the unknown third-party. The user's computing device may generate image characteristics data based on selected imagery. The user's computing device may compare the image characteristics data to stored contact information on the user's computing device to find a match, and may transmit the image characteristics data to the participant computing device for comparison with local stored information stored. The participant computing device may transmit a report message to the user's computing device indicating whether a match is found. In an embodiment, a server may transmit the facial data to other devices for comparison. In another embodiment, the user's computing device may request contact information from participant computing devices.

Abstract: A method for identifying unknown third parties appearing within video call data based on generated image characteristics data. A user's computing device and a participant computing device may exchange and render video call data in which the user's computing device may display the unknown third-party. The user's computing device may generate image characteristics data based on selected imagery. The user's computing device may compare the image characteristics data to stored contact information on the user's computing device to find a match, and may transmit the image characteristics data to the participant computing device for comparison with local stored information stored. The participant computing device may transmit a report message to the user's computing device indicating whether a match is found. In an embodiment, a server may transmit the facial data to other devices for comparison. In another embodiment, the user's computing device may request contact information from participant computing devices.

Abstract: A method for identifying unknown third parties appearing within video call data based on generated image characteristics data. A user's computing device and a participant computing device may exchange and render video call data in which the user's computing device may display the unknown third-party. The user's computing device may generate image characteristics data based on selected imagery. The user's computing device may compare the image characteristics data to stored contact information on the user's computing device to find a match, and may transmit the image characteristics data to the participant computing device for comparison with local stored information stored. The participant computing device may transmit a report message to the user's computing device indicating whether a match is found. In an embodiment, a server may transmit the facial data to other devices for comparison. In another embodiment, the user's computing device may request contact information from participant computing devices.

Abstract: A method for fabricating a stacked chip package comprises the steps of: (a) attaching a first semiconductor chip to an upper surface of a substrate through a first adhesive layer; (b) partially curing the first adhesive layer such that it gels but does not harden; (c) attaching a second semiconductor chip to the first semiconductor chip through a second adhesive layer; (d) curing the first and second adhesive layer; (e) electrically coupling the first and second semiconductor chips to a structure for making external electrical connection provided on the substrate; and (f) forming a package body over the first semiconductor chip, the second semiconductor chip, and a portion of the upper surface of the substrate. Since the first and second adhesive layers may be cured in one single step, the cycle time may be reduced thereby cutting down the production cost.

Abstract: A method for fabricating a stacked chip package comprises the steps of: (a) attaching a first semiconductor chip to an upper surface of a substrate through a first adhesive layer; (b) partially curing the first adhesive layer such that it gels but does not harden; (c) attaching a second semiconductor chip to the first semiconductor chip through a second adhesive layer; (d) curing the first and second adhesive layer; (e) electrically coupling the first and second semiconductor chips to a structure for making external electrical connection provided on the substrate; and (f) forming a package body over the first semiconductor chip, the second semiconductor chip, and a portion of the upper surface of the substrate. Since the first and second adhesive layers may be cured in one single step, the cycle time may be reduced thereby cutting down the production cost.