Abstract: A traction battery pack venting system includes a plurality of battery arrays within a traction battery pack. The battery arrays each have a plurality of individual battery cells. The system further includes a divider system that provides a plurality of vented gas receiving compartments. Each of the vented gas receiving compartments are separate and distinct from the other vented gas receiving compartments within the plurality of vented gas receiving compartments. Each of the vented gas receiving compartments are associated with one of the battery arrays. Each of the vented gas receiving compartments can be associated with a manifold. The vent gas produced from thermal runaway can be discharged to the vented gas receiving compartments, directed to a manifold, and discharge to the external atmosphere.

Abstract: A redriver chip comprising: pre-stage transmission pin sets, pre-stage reception pin sets, post-stage transmission pin sets, post-stage reception pin sets and selectors. The pre-stage transmission pin sets and the pre-stage reception pin sets are disposed in alternating arrangement, and the post-stage transmission pin sets and the post-stage reception pin sets are disposed in alternating arrangement. The amount of the post-stage transmission pin sets is an integral multiple of the amount of pre-stage reception pin sets, and the amount of the pre-stage reception pin sets is an integral multiple of the pre-stage transmission pin sets. Each of the selectors is connected to one of the pre-stage reception pin sets and integral multiple amount of the post-stage transmission pin sets, or is connected to one of the pre-stage transmission pin sets and integral multiple amount of the post-stage reception pin sets.

Abstract: Provided is a method for enhancing hair growth through modulating a hair follicle cycle in a subject in need thereof. The method includes inhibition of casein kinase 1? in an area of skin in the subject. Also provided is a method for increasing hair pigmentation in a subject in need thereof.

Abstract: An input/output transmission interface assembly capable of being assembled on a motherboard includes a first transmission interface, a board-to-board connector, and a second transmission interface. The first transmission interface includes a first circuit board, a first electrical connector, a driving chip, and a plug portion. The plug portion is at one side of the first circuit board for being plugged into the motherboard. The second transmission interface includes a second circuit board and a second electrical connector. The second circuit board is substantially parallel to the first circuit board. The board-to-board connector is assembled on and between the first circuit board and the second circuit board. The first circuit board and the second circuit board are electrically connected with each other through the board-to-board connector.

Abstract: A facial skin disorder (FSD) identification system is provided and includes a sliding rail arranged around a human facial epidermis, a carrier arranged on the sliding rail, at least one image capturing device arranged on the carrier, and a control circuit unit arranged on the carrier for the carrier to move on the sliding rail and the image capturing device to capture images of the human facial epidermis.

Abstract: Provided are methods for preventing, ameliorating, or treating a skin disorder, disease, or condition with a casein kinase 1 inhibitor. Also provided are methods of increasing skin pigmentation or sunburn protection by inhibiting casein kinase 1.

Abstract: Provided is a method for enhancing hair growth through modulating a hair follicle cycle in a subject in need thereof. The method includes inhibition of casein kinase 1? in an area of skin in the subject. Also provided is a method for increasing hair pigmentation in a subject in need thereof.

Abstract: A redriver chip comprising: pre-stage transmission pin sets, pre-stage reception pin sets, post-stage transmission pin sets, post-stage reception pin sets and selectors. The pre-stage transmission pin sets and the pre-stage reception pin sets are disposed in alternating arrangement, and the post-stage transmission pin sets and the post-stage reception pin sets are disposed in alternating arrangement. The amount of the post-stage transmission pin sets is an integral multiple of the amount of pre-stage reception pin sets, and the amount of the pre-stage reception pin sets is an integral multiple of the pre-stage transmission pin sets. Each of the selectors is connected to one of the pre-stage reception pin sets and integral multiple amount of the post-stage transmission pin sets, or is connected to one of the pre-stage transmission pin sets and integral multiple amount of the post-stage reception pin sets.

Abstract: An input/output transmission interface assembly capable of being assembled on a motherboard includes a first transmission interface, a board-to-board connector, and a second transmission interface. The first transmission interface includes a first circuit board, a first electrical connector, a driving chip, and a plug portion. The plug portion is at one side of the first circuit board for being plugged into the motherboard. The second transmission interface includes a second circuit board and a second electrical connector. The second circuit board is substantially parallel to the first circuit board. The board-to-board connector is assembled on and between the first circuit board and the second circuit board. The first circuit board and the second circuit board are electrically connected with each other through the board-to-board connector.

Abstract: A microwave imaging system is provided. The microwave imaging system comprises at least one transmitter circuit and a plurality of receiver circuits. The microwave imaging system further comprises at least one direct digital synthesizer (DDS) circuit, for generating a signal that is provided as an input to each of the plurality of receiver circuits by the at least one transmitter. The microwave imaging system further comprises a clock generation module which is configured to provide a clock signal to each of the at least one transmitter circuit, the plurality of receiver circuits, and the DDS circuit.

Abstract: An uninterruptible power system (UPS) testing method includes the steps of setting an operational decline table, setting an initial value, collecting data, inputting targets, executing multi-algorithm, and indicating a warning or an approval. Wherein, battery cells of the UPS are repeatedly tested when being actually used at different temperatures to set the operational decline table and the initial time value; and data about temperatures and time periods of the battery in operation are continuously collected for a user to execute algorithms based on designated conditions to predict the battery state in a future time period; and an indication message is generated for the user to determine whether the battery is still usable or has to be replaced. In this manner, it is able to estimate the running time of a target time of the UPS without the need of performing an actual electrical discharge procedure.

Abstract: A power converting device for power supply comprises an input port, a voltage boost circuit and an output port. Input port has an input standby pin configured to transmit a first power signal having a first voltage value and an input power pin configured to transmit a second power signal having a second voltage value. Voltage boost circuit electrically connecting to the input standby pin and receives and converts the first power signal having the first voltage value into the first power signal having the second voltage value. Output port has an output standby pin electrically connecting to the voltage boost circuit to receive the first power signal having the second voltage value and an output power pin electrically connecting to the input power pin to receive the second power signal having the second voltage value, wherein the second voltage value is higher than the first voltage value.

Abstract: One embodiment of the present invention provides a synthesizer. The synthesizer includes one or more tunable oscillators, a frequency-dividing circuit coupled to the tunable oscillators, and a multiplexer coupled to the frequency-dividing circuit. The frequency-dividing circuit includes a number of frequency dividers, and is configured to generate a number of frequency-dividing outputs. At least one frequency-dividing output has a different frequency division factor. The multiplexer is configured to select a frequency-dividing output.

Abstract: A light source device includes a lens and a light source disposed under the lens. The lens has a light-emitting top surface and a bottom surface opposite to the light-emitting top surface. The bottom surface concaves towards the light-emitting top surface to form a hole and has a gouge surrounding the hole with an inclination towards the edge of the hole. The hole is formed from the surrounding of a first inner wall surface and a second inner wall surface. The light source is disposed below the bottom surface and corresponds to the hole.

Abstract: One embodiment of the present invention provides a synthesizer. The synthesizer includes one or more tunable oscillators, a frequency-dividing circuit coupled to the tunable oscillators, and a multiplexer coupled to the frequency-dividing circuit. The frequency-dividing circuit includes a number of frequency dividers, and is configured to generate a number of frequency-dividing outputs. At least one frequency-dividing output has a different frequency division factor.

Abstract: One embodiment of the present invention provides a receiver for wireless communication. The receiver includes a demodulator and at least one filtering mechanism coupled to the demodulator, and an analog-to-digital converter (ADC) coupled to the filtering mechanism. The filtering mechanism can be configured to function as a low-pass filter (LPF) or a band-pass filter (BPF), thereby enabling the receiver to function as a direct-conversion receiver or a low-intermediate frequency (low-IF) receiver.

Abstract: One embodiment of the present invention provides a transmitter for wireless communication. The transmitter includes a wideband tunable modulator, a number of power amplifiers with a particular power amplifier associated with a particular frequency range, and a wideband power amplifier (PA) driver. The PA driver is configured to receive an output signal from the wideband tunable modulator, amplify the output signal, and send the amplified output signal to at least one of the power amplifiers.

Abstract: One embodiment of the present invention provides a synthesizer. The synthesizer includes one or more tunable oscillators, a frequency-dividing circuit coupled to the tunable oscillators, and a multiplexer coupled to the frequency-dividing circuit. The frequency-dividing circuit includes a number of frequency dividers, and is configured to generate a number of frequency-dividing outputs. At least one frequency-dividing output has a different frequency division factor. The multiplexer is configured to select a frequency-dividing output.

Abstract: One embodiment of the present invention provides a system for controlling at least one RF front-end component. During operation, the system receives, at a programmable logic chip from a baseband chip, a command; identifies the RF front-end component based on an address indicated by the command; and sends a control signal included in the command to the identified RF front-end component via the second interface. The programmable logic chip is coupled to the baseband chip via a first interface, and is coupled to the at least one RF front-end component via a second interface.

Abstract: One embodiment of the present invention provides a synthesizer. The synthesizer includes one or more tunable oscillators, a frequency-dividing circuit coupled to the tunable oscillators, and a multiplexer coupled to the frequency-dividing circuit. The frequency-dividing circuit includes a number of frequency dividers, and is configured to generate a number of frequency-dividing outputs. At least one frequency-dividing output has a different frequency division factor.