Abstract: A signal control method suitable for a touch screen is provided. The signal control method comprises: switching a plurality of scan lines to an enabling voltage level sequentially in a display stage; turning on a plurality of switches sequentially to transmit a plurality of display data to a plurality of data lines when a first scan line of the plurality of scan lines is in an enabled voltage level, wherein a first switch of the plurality of switches is coupled to a first data line of the plurality of data lines, and the first data line corresponds to one of a plurality of dummy lines in a vertical direction, when the first scan line is in the enabled voltage level, the first switch is turned on after other switches are turned on; and setting the plurality of dummy lines to a touch voltage in a touch stage.

Abstract: A signal control method suitable for a touch screen is provided. The signal control method comprises: switching a plurality of scan lines to an enabling voltage level sequentially in a display stage; turning on a plurality of switches sequentially to transmit a plurality of display data to a plurality of data lines when a first scan line of the plurality of scan lines is in an enabled voltage level, wherein a first switch of the plurality of switches is coupled to a first data line of the plurality of data lines, and the first data line corresponds to one of a plurality of dummy lines in a vertical direction, when the first scan line is in the enabled voltage level, the first switch is turned on after other switches are turned on; and setting the plurality of dummy lines to a touch voltage in a touch stage.

Abstract: A pixel array substrate includes signal lines, pixel structures, a driving element, a first fan-out trace and a second fan-out trace. The first fan-out trace includes a first segment connected to the driving element, a second segment connected to the first segment, and a third segment connected to the second segment. In the first fan-out trace, the sheet resistances of the first segment and the third segment are smaller than sheet resistance of the second segment. The second fan-out trace includes a first segment connected to the driving element and a second segment connected to the first segment. In the second fan-out trace, the first segment and the second segment are disposed correspondingly to the first segment and the two second segment and third segment, respectively. In the second fan-out trace, the sheet resistance of the second segment is less than the sheet resistance of the first segment.

Abstract: A pixel array substrate includes signal lines, pixel structures, a driving element, a first fan-out trace and a second fan-out trace. The first fan-out trace includes a first segment connected to the driving element, a second segment connected to the first segment, and a third segment connected to the second segment. In the first fan-out trace, the sheet resistances of the first segment and the third segment are smaller than sheet resistance of the second segment. The second fan-out trace includes a first segment connected to the driving element and a second segment connected to the first segment. In the second fan-out trace, the first segment and the second segment are disposed correspondingly to the first segment and the two second segment and third segment, respectively. In the second fan-out trace, the sheet resistance of the second segment is less than the sheet resistance of the first segment.

Abstract: A liquid crystal display and a test circuit thereof are provided. The test circuit has a plurality of signal pads, a first data distributor, a plurality of logic circuit units and N switches. N is a positive integer. The signal pads are configured to receive a test data signal, a voltage signal, an enable signal and a plurality of first switch control signals. The first data distributor distributes the test data signal to N output terminals of the first data distributor. Each of the logic circuit units generates a second switch control signal according to the voltage signal, the enable signal and a corresponding one of the first switch control signals. Each of the switches controls the electrical connection between an output terminal of the first data distributor coupled thereto and at least a data line coupled thereto.

Abstract: A fingerprint identification device includes a backlight module and a sensing module. The sensing module is disposed on the backlight module. The sensing module includes a plurality of light sensing units and a plurality of light converting units. Each of the light converting units is disposed on a respective one of the light sensing units. The backlight module emits a first color light, the first color light passes through gaps between the light sensing units and then is reflected to the light converting unit, and the light converting unit converts the first color light into a second color light, such that the light sensing unit senses the second color light.

Abstract: A shift register includes shift register units, in which at least one shift register unit is coupled to a forestage shift register unit and a post-stage shift register unit, where the at least one shift register unit includes a signal input circuit, a signal output circuit, a pull down circuit and a switching circuit. The signal input circuit electrically coupled to the forestage shift register unit can receive a logic signal from the forestage shift register. The signal output circuit is electrically coupled to the signal input circuit via a control signal terminal and is electrically coupled to the post-stage shift register unit. The signal output circuit can receive a first clock signal. The pull down circuit is electrically coupled to or electrically isolated from the control signal terminal through the switching circuit.

Abstract: A fingerprint identification device includes a backlight module and a sensing module. The sensing module is disposed on the backlight module. The sensing module includes a plurality of light sensing units and a plurality of light converting units. Each of the light converting units is disposed on a respective one of the light sensing units. The backlight module emits a first color light, the first color light passes through gaps between the light sensing units and then is reflected to the light converting unit, and the light converting unit converts the first color light into a second color light, such that the light sensing unit senses the second color light.

Abstract: A driving method for a display panel is provided. The display panel includes at least a first common signal line, at least a second common signal line and a plurality of pixels arranged as a pixel array. The pixel array includes a first pixel row and a second pixel row electrically connected to the first common signal line and the second common signal line, respectively. The driving method includes steps of: generating a first AC common signal; generating a second AC common signal, wherein the first AC common signal and the second AC common signal are inverse to each other; and providing the first and second AC common signal to the first and second pixel rows through the first and second common signal lines, respectively, by way of N-frame switch, wherein N is a positive integer.

Abstract: A shift register includes shift register units, in which at least one shift register unit is coupled to a forestage shift register unit and a post-stage shift register unit, where the at least one shift register unit includes a signal input circuit, a signal output circuit, a pull down circuit and a switching circuit. The signal input circuit electrically coupled to the forestage shift register unit can receive a logic signal from the forestage shift register. The signal output circuit is electrically coupled to the signal input circuit via a control signal terminal and is electrically coupled to the post-stage shift register unit. The signal output circuit can receive a first clock signal. The pull down circuit is electrically coupled to or electrically isolated from the control signal terminal through the switching circuit.

Abstract: A gate driver includes a plurality of shift registers and a plurality of cutting units. Each of the shift registers is configured for outputting a shift register signal according to a clock signal of the each of the shift register sequentially. Each of the shift register signals has a working period and the two working periods of the two adjacent shift register signals overlap each other. Each of the cutting units is coupled to a respective one of the shift registers. The cutting unit corresponding to the Nth shift register is configured for cutting a part of the working period from the shift register signal of the Nth shift register to generate a gate driving signal according to the clock signal of the (N?1)th or (N+1)th shift register, such that working periods of the gate driving signals are staggered. N is a positive integer larger than two.

Abstract: A liquid crystal display and a test circuit thereof are provided. The test circuit has a plurality of signal pads, a first data distributor, a plurality of logic circuit units and N switches. N is a positive integer. The signal pads are configured to receive a test data signal, a voltage signal, an enable signal and a plurality of first switch control signals. The first data distributor distributes the test data signal to N output terminals of the first data distributor. Each of the logic circuit units generates a second switch control signal according to the voltage signal, the enable signal and a corresponding one of the first switch control signals. Each of the switches controls the electrical connection between an output terminal of the first data distributor coupled thereto and at least a data line coupled thereto.

Abstract: A shift register includes shift register units, in which at least one shift register unit is coupled to a forestage shift register unit and a post-stage shift register unit, where the at least one shift register unit includes a signal input circuit, a signal output circuit, a pull down circuit and a switching circuit. The signal input circuit electrically coupled to the forestage shift register unit can receive a logic signal from the forestage shift register. The signal output circuit is electrically coupled to the signal input circuit via a control signal terminal and is electrically coupled to the post-stage shift register unit. The signal output to circuit can receive a first clock signal. The pull down circuit is electrically coupled to or electrically isolated from the control signal terminal through the switching circuit.

Abstract: A display panel includes scan lines, data lines and a multiplexer circuit. The data lines interlace with the scan lines. The multiplexer circuit includes switches, in which first terminals of the plurality of switches are electrically coupled to one terminals of the data lines, respectively, and the switches are configured to switch on in response to control signals. The data lines are configured to receive image data signals through the switches during enabling periods of the control signals, and at least two control signals of the control signals are synchronously asserted and have enabling periods that are partially overlapped. A method of transmitting signals in a display panel is also disclosed herein.

Abstract: A display device includes multiple pixels, a gate driver and a data driver. Each pixel includes a transistor and a pixel capacitor electrically coupled to the transistor. The gate driver is configured to turn on the transistor of a first pixel for one time during a first turn-on period of multiple turn-on cycles of a frame cycle of a frame displayed by the display device. The data driver is configured to charge the pixel capacitor of the first pixel via the transistor of the first pixel to a first over-charge voltage and a data voltage during an over-charge period and a recovery period of the first turn-on period. The first over-charge voltage is different from the data voltage. A method for driving the display device is also provided.

Abstract: An image display method of a half-source-driving (HSD) liquid crystal display (LCD) for mitigating the screen flickering effect caused by applying a frame rate control (FRC) algorithm in the LCD includes providing a first gate sequence corresponding to a pixel array in the LCD display. If a target gray level of the pixel array is an average value of a first gray level and a second gray level, write the first gray level to a plurality of sub-pixels of the pixel array being charged first according to the first gate sequence, and write the second gray level smaller than the first gray level to a plurality of sub-pixels of the pixel array being charged latter according to the first gate sequence.

Abstract: A gate driver includes a plurality of shift registers and a plurality of cutting units. Each of the shift registers is configured for outputting a shift register signal according to a clock signal of the each of the shift register sequentially. Each of the shift register signals has a working period and the two working periods of the two adjacent shift register signals overlap each other. Each of the cutting units is coupled to a respective one of the shift registers. The cutting unit corresponding to the Nth shift register is configured for cutting a part of the working period from the shift register signal of the Nth shift register to generate a gate driving signal according to the clock signal of the (N?1)th or (N+1)th shift register, such that working periods of the gate driving signals are staggered. N is a positive integer larger than two.

Abstract: A display device includes multiple pixels, a gate driver and a data driver. Each pixel includes a transistor and a pixel capacitor electrically coupled to the transistor. The gate driver is configured to turn on the transistor of a first pixel for one time during a first turn-on period of multiple turn-on cycles of a frame cycle of a frame displayed by the display device. The data driver is configured to charge the pixel capacitor of the first pixel via the transistor of the first pixel to a first over-charge voltage and a data voltage during an over-charge period and a recovery period of the first turn-on period. The first over-charge voltage is different from the data voltage. A method for driving the display device is also provided.

Abstract: A display panel includes a plurality of first driving switches installed at a first side of the display panel, a plurality of second switches installed at a second side of the display panel, a plurality of first data lines, a plurality of second data lines, a plurality of scan lines, and a plurality of pixels. Each of the first driving switches includes a first input end and a plurality of first output ends. Each of the second driving switches includes a second input end and a plurality of second output ends. The first data lines are electrically connected to the first output ends. The second data lines are electrically connected to the second output ends. The plurality of pixels are electrically connected to the plurality of first data lines, second data lines and scan lines for displaying images. The first data lines and the second data lines are arranged interlacedly.

Abstract: A driving method for a display panel is provided. The display panel includes at least a first common signal line, at least a second common signal line and a plurality of pixels arranged as a pixel array. The pixel array includes a first pixel row and a second pixel row electrically connected to the first common signal line and the second common signal line, respectively. The driving method includes steps of: generating a first AC common signal; generating a second AC common signal, wherein the first AC common signal and the second AC common signal are inverse to each other; and providing the first and second AC common signal to the first and second pixel rows through the first and second common signal lines, respectively, by way of N-frame switch, wherein N is a positive integer.