Abstract: In one aspect, an LCD includes a display panel with a pixel matrix having M scan lines and N data lines, and a multiplexer feed-through compensation circuit, which includes P signal lines for providing P video signals, P multiplexers, and K pairs of control lines providing K pairs of control signals. Each multiplexer is electrically coupled to a corresponding signal line and has K channels. Each channel includes first and second switches parallel-connected between the signal line and a corresponding data line for selectively transmitting the video signal to the corresponding data line. Each pair of control lines is respectively electrically coupled to the first and second switches of a corresponding channel of each multiplexer. Each pair of control signals are configured such that a time turning off one of the first and second switches is earlier than that turning off the other switch.

Abstract: An active liquid crystal display panel includes a pixel array, a gate driving circuit, a data driving circuit, and an analog buffer. The gate driving circuit is used for driving M first scan lines where M is a natural number. The analog buffer is coupled to the gate driving circuit and includes M buffer circuits and a regulator. Each buffer circuit drives a corresponding second scan line according to an output signal of a corresponding first scan line of the M first scan lines, and the regulator is used for maintaining at least one reference voltage supplied to the M buffer circuits.

Abstract: In one aspect, an LCD includes a display panel with a pixel matrix having M scan lines and N data lines, and a multiplexer feed-through compensation circuit, which includes P signal lines for providing P video signals, P multiplexers, and K pairs of control lines providing K pairs of control signals. Each multiplexer is electrically coupled to a corresponding signal line and has K channels. Each channel includes first and second switches parallel-connected between the signal line and a corresponding data line for selectively transmitting the video signal to the corresponding data line. Each pair of control lines is respectively electrically coupled to the first and second switches of a corresponding channel of each multiplexer. Each pair of control signals are configured such that a time turning off one of the first and second switches is earlier than that turning off the other switch.

Abstract: A shift register includes shift register units, in which at least one shift register unit is coupled to a forestage shift register unit and a post-stage shift register unit, where the at least one shift register unit includes a signal input circuit, a signal output circuit, a pull down circuit and a switching circuit. The signal input circuit electrically coupled to the forestage shift register unit can receive a logic signal from the forestage shift register. The signal output circuit is electrically coupled to the signal input circuit via a control signal terminal and is electrically coupled to the post-stage shift register unit. The signal output to circuit can receive a first clock signal. The pull down circuit is electrically coupled to or electrically isolated from the control signal terminal through the switching circuit.

Abstract: A display panel includes a plurality of first driving switches installed at a first side of the display panel, a plurality of second switches installed at a second side of the display panel, a plurality of first data lines, a plurality of second data lines, a plurality of scan lines, and a plurality of pixels. Each of the first driving switches includes a first input end and a plurality of first output ends. Each of the second driving switches includes a second input end and a plurality of second output ends. The first data lines are electrically connected to the first output ends. The second data lines are electrically connected to the second output ends. The plurality of pixels are electrically connected to the plurality of first data lines, second data lines and scan lines for displaying images. The first data lines and the second data lines are arranged interlacedly.

Abstract: A multiplexer circuit includes multiple groups of switches and multiple groups of control lines. Each control line in each one of the groups of control lines is coupled to a control end of at least one switch in corresponding one of the groups of switches, and each group of control lines is configured for synchronously transmitting an identical group of control signals. A display panel and method for transmitting signals in a display panel is also disclosed herein.

Abstract: An active liquid crystal display panel includes a pixel array, a gate driving circuit, a data driving circuit, and an analog buffer. The gate driving circuit is used for driving M first scan lines where M is a natural number. The analog buffer is coupled to the gate driving circuit and includes M buffer circuits and a regulator. Each buffer circuit drives a corresponding second scan line according to an output signal of a corresponding first scan line of the M first scan lines, and the regulator is used for maintaining at least one reference voltage supplied to the M buffer circuits.

Abstract: In one aspect of the invention, an analog buffer circuit includes a p-channel field effect transistor (PTFT) and an n-channel field effect transistor (NTFT). Each of the PTFT and NTFT has a source region and a drain region defining a channel region therebetween, formed on a substrate such that the drain regions of the PTFT and the NTFT are in substantial contact with each other, a gate layer formed over and insulated from the corresponding channel region, a source electrode insulated from the gate layer and electrically connected to the corresponding source region, and a common drain electrode insulated from the gate layer and the source electrode, and is electrically connected to the drain regions of both the PTFT and the NTFT through a via defined over the depletion region.

Abstract: A data line driving method adapted in a display panel driver circuit is provided. The display panel driver circuit comprises a plurality rows of gate lines and a plurality of data driver stages each corresponding to a data line group, wherein the data line driving method comprises the steps of: turning on the data driver stages in a first sequential order to input a first frame data in the data line groups corresponding to the data driver stages in each gate line activation time within a first frame period; and turning on the data driver stages in a second sequential order which is opposed to the first sequential order to input a second frame data in the data line groups corresponding to the data driver stages in each gate line activation time within a second frame period; wherein the first and the second frame period are two interlaced periods next to each other.

Abstract: A display apparatus includes a plurality of scan lines, a plurality of data lines, a plurality of pixel transistors, a plurality of pixel electrodes, a gate driver, a source driver and a discharge circuit. The data lines are intersected with the scan lines. Each of the pixel transistors is electrically coupled to a corresponding scan line and a corresponding data line, and each of the pixel electrodes is electrically coupled to a corresponding pixel transistor. The gate driver is electrically coupled to the scan lines, and the source driver is electrically coupled to the data lines. The discharge circuit is electrically coupled to the gate driver and the data lines. The discharge circuit starts when the display apparatus is turned off, to control the gate drive for turning on the pixel transistors simultaneously, and make the pixel electrodes be electrically communicated with a reference voltage.

Abstract: A manufacturing method of barrier ribs of a plasma display panel is provided. First, a substrate, divided into a display area and a non-display area located in the periphery of the display area, is provided. Next, when a patterned barrier material layer forms on the substrate, the layer further constitutes discharging spaces in the display area and a plurality of honeycomb supporting structures in the non-display area.

Abstract: A data line driving method adapted in a display panel driver circuit is provided. The display panel driver circuit comprises a plurality rows of gate lines and a plurality of data driver stages each corresponding to a data line group, wherein the data line driving method comprises the steps of: turning on the data driver stages in a first sequential order to input a first frame data in the data line groups corresponding to the data driver stages in each gate line activation time within a first frame period; and turning on the data driver stages in a second sequential order which is opposed to the first sequential order to input a second frame data in the data line groups corresponding to the data driver stages in each gate line activation time within a second frame period; wherein the first and the second frame period are two interlaced periods next to each other.

Abstract: The present invention provides a driving method suitable for a plasma display. The plasma display includes multiple scan electrodes, multiple sustain electrodes and multiple address electrodes, for example. Successive frames are adapted to be displayed in repeating reset periods, address periods and sustain periods by applying driving signals to the scan electrodes, sustain electrodes and address electrodes. The driving method is characterized in that before inputting driving signals or when interrupting driving signals, a wall-charge removing signal is applied to the scan electrodes to remove/reduce the residual wall charges around the scan electrodes and the sustain electrodes. As a result, the possibility of the plasma display generating erroneously discharging with strong light at the restarting state can be effectively reduced.

Abstract: A plasma display panel and a manufacturing method of barrier ribs thereof are provided. The plasma display panel is divided into a display area and a non-display area located in the periphery of the display area. When discharge space is formed in the display area by barrier ribs, a plurality of honeycomb supporting structures are formed in the non-display area at the same time. The honeycomb supporting structures can increase the yield factor of assembling the substrates, and then the display quality of the plasma display panels can be improved.

Abstract: The present invention provides an image optimization method for performing data update on pixel units in the pixel matrix of the liquid crystal displays. The pixel matrix includes at least a first row and a second row, wherein the first row and the second row respectively include a plurality of pixel units. In one frame period, the image optimization method performs data update respectively on pixel units of the first row and the second row according to a first sequence. In another frame period, the image optimization method performs data update respectively on pixel units of the first row and the second row according to a second sequence.

Abstract: A display device includes a substrate, a display area, an ASIC disposed by a first edge of the display area for generating a number of P data voltage signals, a first shift register having a plurality of first shift register units disposed by a second edge of the display area, a second shift register having a plurality of second shift register units disposed by a third edge of the display area, a plurality of first switch unit and a plurality of second units. The first switch units sequentially outputs the first through the P 2 ? th data voltage signals to the display area in response to first control signal from the first shift register units, simultaneously, the second switch units sequentially outputs the ( P 2 + 1 ) ? th through the Pth data voltage signals to the display area in response to second control signal from the second shift register units.

Abstract: A plasma display panel and a manufacturing method of barrier ribs thereof are provided. The plasma display panel is divided into a display area and a non-display area located in the periphery of the display area. When discharge space is formed in the display area by barrier ribs, a plurality of honeycomb supporting structures are formed in the non-display area at the same time. The honeycomb supporting structures can increase the yield factor of assembling the substrates, and then the display quality of the plasma display panels can be improved.

Abstract: The present invention provides a driving method suitable for a plasma display. The plasma display includes multiple scan electrodes, multiple sustain electrodes and multiple address electrodes, for example. Successive frames are adapted to be displayed in repeating reset periods, address periods and sustain periods by applying driving signals to the scan electrodes, sustain electrodes and address electrodes. The driving method is characterized in that before inputting driving signals or when interrupting driving signals, a wall-charge removing signal is applied to the scan electrodes to remove/reduce the residual wall charges around the scan electrodes and the sustain electrodes. As a result, the possibility of the plasma display generating erroneously discharging with strong light at the restarting state can be effectively reduced.

Abstract: An image processing method for plasma display panels is disclosed to measure the difference of displayed brightness, color temperature and color shift as a result of the voltage drop under various operation modes. The measured data are made into a lookup table installed in the circuit board so that the circuit board can automatic calibrate the image shown on the plasma display panel.