Patents by Inventor Chung-Ming Hsieh

Chung-Ming Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11953740
    Abstract: A package structure including a photonic, an electronic die, an encapsulant and a waveguide is provided. The photonic die includes an optical coupler. The electronic die is electrically coupled to the photonic die. The encapsulant laterally encapsulates the photonic die and the electronic die. The waveguide is disposed over the encapsulant and includes an upper surface facing away from the encapsulant. The waveguide includes a first end portion and a second end portion, the first end portion is optically coupled to the optical coupler, and the second end portion has a groove on the upper surface.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Che-Hsiang Hsu
  • Patent number: 11947173
    Abstract: A package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler; an interconnect structure over the photonic layer; an electronic die and a first dielectric layer over the interconnect structure, where the electronic die is connected to the interconnect structure; a first substrate bonded to the electronic die and the first dielectric layer; a socket attached to a top surface of the first substrate; and a fiber holder coupled to the first substrate through the socket, where the fiber holder includes a prism that re-orients an optical path of an optical signal.
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Che-Hsiang Hsu
  • Publication number: 20240069277
    Abstract: A semiconductor package includes a first die stack structure and a second die stack structure, an insulating encapsulation, a redistribution structure, at least one prism structure and at least one reflector. The first die stack structure and the second die stack structure are laterally spaced apart from each other along a first direction, and each of the first die stack structure and the second die stack structure comprises an electronic die; and a photonic die electronically communicating with the electronic die. The insulating encapsulation laterally encapsulates the first die stack structure and the second die stack structure. The redistribution structure is disposed on the first die stack structure, the second die stack structure and the insulating encapsulation, and electrically connected to the first die stack structure and the second die stack structure. The at least one prism structure is disposed within the redistribution structure and optically coupled to the photonic die.
    Type: Application
    Filed: August 29, 2022
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Yi Kuo, Chen-Hua Yu, Cheng-Chieh Hsieh, Che-Hsiang Hsu, Chung-Ming Weng, Tsung-Yuan Yu
  • Publication number: 20240011016
    Abstract: A Saccharomyces cerevisiae antibody display system that simultaneously secrets and displays antibody fragments from a very large size synthetic nave human antibody library for therapeutic antibody lead discovery and engineering is described. A bait anchor complexed with a monovalent antibody fragment is tethered on the surface of the S. cerevisiae host cell, wherein the fragment can be assayed for antigen binding, while the full bivalent antibody is simultaneously secreted from the host cell. Methods of using the system for identifying antibodies from the library that bind specifically to an antigen of interest are also provided. Polypeptides, polynucleotides and host cells used for making the antibody display system are also provided along with methods of use thereof.
    Type: Application
    Filed: November 18, 2021
    Publication date: January 11, 2024
    Applicant: MERCK SHARP & DOHME LLC
    Inventors: Michelle Castor, Ming-Tang Chen, Chung-Ming Hsieh
  • Publication number: 20230403024
    Abstract: An embodiment of the present disclosure provides a conversion circuit for converting a single-ended input to a differential input, which has fewer switches and fewer capacitors. This conversion circuit increases the signal-to-noise ratio (SNR), and the conversion circuit directly uses the higher supply voltage AVDD without being bucked by the regulator, wherein the common mode voltage is AVDD/2N, and N is greater than 1. Overall, not only the circuit area is smaller and the SNR is higher, but also the manufacturing cost is reduced. In addition, compared with the prior art, the conversion circuit of the embodiment of the present disclosure has only three operation periods, so the control is simpler and the operation speed is faster.
    Type: Application
    Filed: February 10, 2023
    Publication date: December 14, 2023
    Inventors: YEH-TAI HUNG, WEI-CHAN HSU, CHUNG MING HSIEH
  • Patent number: 11824393
    Abstract: A power supply device for providing a driving voltage of an encryption/decryption device. When the encryption/decryption device is in operation and its driving voltage falls within the voltage range formed by an upper limit voltage and a lower limit voltage, only a supply voltage provided by a secure power supply device is used as the driving voltage for the encryption/decryption device. When the encryption and decryption device is in operation and its driving voltage falls outside the voltage range formed by the upper limit voltage and the lower limit voltage, the supply voltage and a stable voltage provided by the stable voltage source are used as the driving voltage at the same time, the supply voltage is further adjusted until the driving voltage falls within the voltage range formed by the upper limit voltage and the lower limit voltage, and then continue to use only the supply voltage as the driving voltage.
    Type: Grant
    Filed: September 26, 2022
    Date of Patent: November 21, 2023
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventors: Po-Hsuan Huang, Chung Ming Hsieh
  • Publication number: 20230272056
    Abstract: Provided herein are anti-LAP antibodies (e.g., recombinant humanized, chimeric, and human anti-LAP antibodies) or antigen binding fragments thereof which have therapeutically beneficial properties, such as binding specifically to LAP-TGF?1 on cells but not to LAP-TGF?1 in extracellular matrix, as well as compositions including the same. Also provided are uses of these antibodies or antigen binding fragments in therapeutic applications, such as in the treatment of cancer, and diagnostic applications.
    Type: Application
    Filed: April 8, 2021
    Publication date: August 31, 2023
    Applicant: Merck Sharp & Dohme LLC
    Inventors: Chung-Ming Hsieh, Michelle Castor, Ming-Tang Chen, Alan C. Cheng, Scott A. Hollingsworth, Veronica M. Juan, Madhura Shidhore, Song Yang, Renee C.T. Moore
  • Publication number: 20230265175
    Abstract: Provided herein are high affinity antibodies or antigen binding fragments thereof that specifically bind to human tau-pS413. Also provided are compositions, kits, methods, and uses involving such antibodies or antigen binding fragments thereof.
    Type: Application
    Filed: June 23, 2021
    Publication date: August 24, 2023
    Applicant: Merck Sharp & Dohme LLC
    Inventors: Jeanne E. Baker, Sophie Parmentier Batteur, Ming-Tang Chen, Alan C. Cheng, Chung-Ming Hsieh, Carl Mieczkowski, Sokreine Suon
  • Patent number: 11705918
    Abstract: An incremental analog-to-digital converter including a first-stage non-delay memorization element and other elements is disclosed. An ending time point of a second reset signal received by the first-stage non-delay memorization element is later than an ending time point of a first reset signal received by the other elements by at least one clock cycle, a reset duration of the first-stage non-delay memorization element is longer than a reset duration of the other element, so that the first-stage non-delay memorization element can be prevented from occurring overshoot or spike on an output thereof, and the incremental analog-to-digital converter can maintain a good signal-to-noise and distortion ratio under the condition that the internal elements has low swing limits.
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: July 18, 2023
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventor: Chung Ming Hsieh
  • Patent number: 11702467
    Abstract: Provided herein are high affinity antibodies or antigen binding fragments thereof that specifically bind to human tau-pS413. Also provided are compositions, kits, methods, and uses involving such antibodies or antigen binding fragments thereof.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: July 18, 2023
    Assignee: Merck Sharp & Dohme LLC
    Inventors: Jeanne E. Baker, Sophie Parmentier Batteur, Ming-Tang Chen, Alan C. Cheng, Chung-Ming Hsieh, Carl Mieczkowski, Sokreine Suon
  • Publication number: 20230167168
    Abstract: Provided herein are high affinity antibodies or antigen binding fragments thereof that specifically bind to human tau-pS413. Also provided are compositions, kits, methods, and uses involving such antibodies or antigen binding fragments thereof.
    Type: Application
    Filed: June 23, 2021
    Publication date: June 1, 2023
    Applicant: Merck Sharp & Dohme Corp.
    Inventors: Jeanne E. Baker, Sophie Parmentier Batteur, Ming-Tang Chen, Alan C. Cheng, Chung-Ming Hsieh, Carl Mieczkowski, Sokreine Suon
  • Publication number: 20230112863
    Abstract: Proteins that bind IL-1? and IL-1? are described along with their use in compositions and methods for treating, preventing, and diagnosing IL-1-related disorders and for detecting IL-1? and IL-1? in cells, tissues, samples, and compositions.
    Type: Application
    Filed: April 29, 2022
    Publication date: April 13, 2023
    Inventors: Chengbin WU, Dominic J. AMBROSI, Chung-ming HSIEH, Tariq GHAYUR
  • Publication number: 20230115035
    Abstract: A power supply device for providing a driving voltage of an encryption/decryption device. When the encryption/decryption device is in operation and its driving voltage falls within the voltage range formed by an upper limit voltage and a lower limit voltage, only a supply voltage provided by a secure power supply device is used as the driving voltage for the encryption/decryption device. When the encryption and decryption device is in operation and its driving voltage falls outside the voltage range formed by the upper limit voltage and the lower limit voltage, the supply voltage and a stable voltage provided by the stable voltage source are used as the driving voltage at the same time, the supply voltage is further adjusted until the driving voltage falls within the voltage range formed by the upper limit voltage and the lower limit voltage, and then continue to use only the supply voltage as the driving voltage.
    Type: Application
    Filed: September 26, 2022
    Publication date: April 13, 2023
    Inventors: PO-HSUAN HUANG, CHUNG MING HSIEH
  • Publication number: 20230102101
    Abstract: Heavy chain antibody variable domain (VHH) display libraries are described comprising human-like VHH comprising three synthetically generated complementarity determining region (CDR) areas in which the amino acids at each of positions 44 and 45 or positions 37, 44, 45, and 47 comprise the amino acid at the corresponding position of a Camelid VHH, wherein the amino acid positions are according to Kabat numbering Human-like VHHs identified using these libraries may be useful for the manufacture of therapeutics for treating diseases and disorders.
    Type: Application
    Filed: March 1, 2021
    Publication date: March 30, 2023
    Applicant: Merck Sharp & Dohme LLC
    Inventors: Lei Chen, Ming-Tang Chen, Chung-Ming Hsieh, Alexander Mario Sevy
  • Publication number: 20230099825
    Abstract: A power supply device is provided with a secure power supply device, a voltage detection circuit, a stable voltage source and a switch. By using the voltage detection circuit, whether a driving voltage of an encryption/decryption device is insufficient to control the on and off the switch, so as to determine whether only the secure power supply device provides a supply voltage to the encryption/decryption device as the driving voltage. Alternatively, the supply voltage of the secure power supply device and a stable voltage of the stable voltage source are provided simultaneously to the encryption/decryption device as the driving voltage. In other words, once the driving voltage drops (that is, the encryption/decryption device consumes a large current for encryption/decryption), the stable voltage source immediately provides the stable voltage to the encryption/decryption device as part of the driving voltage to ensure that the encryption/decryption device can normally work.
    Type: Application
    Filed: September 23, 2022
    Publication date: March 30, 2023
    Inventors: WEI-CHAN HSU, PO-HSUAN HUANG, CHUNG MING HSIEH
  • Publication number: 20230094277
    Abstract: A power supply device is used to provide power to an encryption and decryption device of a security system, including a safety power supply device, which is used to supply the supply voltage according to the system voltage; a regulated voltage source, which is used to provide a regulated voltage; and a voltage selection device, which is electrically connected with the safety power supply device, the stable voltage source and the encryption and decryption device. During the startup period of the security system, or, after the startup period of the security system and the encryption/decryption device performs encryption/decryption, only the supply voltage is selected as the driving voltage of the encryption/decryption device. After the startup period of the security system and the encryption and decryption device does not perform encryption and decryption, the voltage only the regulated voltage is selected as the driving voltage of the encryption and decryption device.
    Type: Application
    Filed: September 20, 2022
    Publication date: March 30, 2023
    Inventors: PO-HSUAN HUANG, CHUNG MING HSIEH
  • Patent number: 11601050
    Abstract: A voltage regulation system is provided. In the voltage regulation system, a frequency of a clock signal is adjusted and a pulse generator is controlled to output a pulse signal to a switch power stage circuit, to enable the switch power stage circuit to adjust an output voltage and output the adjusted output voltage to the load element. Through the aforementioned configuration, the switch power stage circuit adjusts the output voltage according to the situation of the load element, thus decreasing the power loss of the switch power stage circuit.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: March 7, 2023
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventors: Chung-Ming Hsieh, Wei-Chan Hsu
  • Publication number: 20230021989
    Abstract: An incremental analog-to-digital converter including a first-stage non-delay memorization element and other elements is disclosed. An ending time point of a second reset signal received by the first-stage non-delay memorization element is later than an ending time point of a first reset signal received by the other elements by at least one clock cycle, a reset duration of the first-stage non-delay memorization element is longer than a reset duration of the other element, so that the first-stage non-delay memorization element can be prevented from occurring overshoot or spike on an output thereof, and the incremental analog-to-digital converter can maintain a good signal-to-noise and distortion ratio under the condition that the internal elements has low swing limits.
    Type: Application
    Filed: February 25, 2022
    Publication date: January 26, 2023
    Inventor: CHUNG MING HSIEH
  • Patent number: 11527949
    Abstract: A protection circuit is adapted to a switching-capacitor regulation circuit having a capacitor. The protection circuit comprises a current source, first and second switch circuits, and a control unit. First, the control unit turns on the second switch circuit to make a top end and a bottom end of the capacitor, and control the first switch circuit to make the current source no connect the capacitor, and then set a voltage of the top and the bottom to be a first preset voltage. Next, the control unit turns off the second switch circuit to disconnect the top end and the bottom end, and turn on the first switch circuit to flow current from the bottom end of the capacitor. When a voltage difference between the top end and the bottom end is equal to a preset initial voltage, the control unit control the first switch circuit to disconnect the current source and the capacitor; next, the control unit controls current flow in or out from the top of the capacitor based on the voltage on the top of the capacitor.
    Type: Grant
    Filed: July 7, 2021
    Date of Patent: December 13, 2022
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventors: Chung Ming Hsieh, Yeh-Tai Hung, Chung-He Li
  • Patent number: 11456666
    Abstract: A zero current detection system for a switching regulator is provided. The switching includes an inductor. In the zero current detection system, a comparator has a positive input coupled to a terminal of the inductor and an output terminal for outputting a comparison result signal; a first signal latch circuit has a clock terminal for receiving the comparison result signal and outputting a latched output signal; a delay line module starts counting upon receipt of the latched output signal, and then outputs a zero current detection signal after counting a delay time; in response to the zero current detection signal, a voltage sampling module samples a node voltage at two different time points, to generate two sampling voltages; a delay control module adjusts the delay time of the delay line module according to the two sampling voltages.
    Type: Grant
    Filed: February 12, 2020
    Date of Patent: September 27, 2022
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventors: Ching-Yen Chiu, Chung Ming Hsieh