Abstract: A method of power-gating instruction scheduling for leakage power reduction comprises receiving a program, generating a control-flow graph dividing the program into a plurality of blocks, analyzing utilization of power-gated components of a processor executing the program, generating the first power-gating instruction placement comprising power-off instructions and power-on instructions to shut down the inactive power-gated components, generating the second power-gating instruction placement by merging the power-off instructions as one compound power-off instruction and merging the power-on instructions as one compound power-on instruction, and inserting power-gating instructions into the program in accordance with the second power-gating instruction placement.

Abstract: The present invention is to provide an automatic electric discharge tool, which comprises a control unit and an energy consuming module, wherein the control unit electrically coupled to a plurality of energy storage devices to receive information signals sent and obtain the remaining power capacity, remaining power supply time and battery voltage of the energy storage device; and the energy consuming module electrically respectively coupled to the control unit and energy storage device in purpose to receiving and consuming the power of each energy storage device, furthermore, the control unit determines and then sends a switch signal to make the energy consuming module to stop consuming the power of the energy storage device when the power capacity dropping to 60% of the total power capacity.

Abstract: A processor includes a plurality of execution units configured to execute instructions, a pre-decoder configured to sieve out a power-switching instruction from the instructions, and a power controller configured to control the status of the execution unit based on the power-switching instruction. The power controller includes an identification decoder configured to generate identifications respectively corresponding to the execution units from the power-switching instruction, and a power manager configured to switch the execution unit corresponding to the identification. Particularly, the power-switching instruction includes a power-on instruction and a power-off instruction. The processor further includes a plurality of reservation tables each configured to store the instruction to be executed by one of the execution units, and a turn-off signal is not conveyed to the power manager until the reservation table corresponding to the execution unit to be turned off is empty.

Abstract: A system chip includes a plurality of processing elements for performing primary computations of a plurality of tasks, a plurality of non-processing elements for controlling flow of data associated with the tasks among the processing elements, and a main controller including a scheduler, a resource allocation module, and a power management module. The scheduler assigns the tasks on the processing and non-processing elements with reference to time parameters of the processing and non-processing elements. The resource allocation module controls operations of the processing and non-processing elements with reference to task assignments determined by the scheduler. The power management module performs dynamic voltage management upon the processing and non-processing elements according to the scheduled tasks.

Abstract: A system and method of self-test for a single infrared machine. An infrared transimit circuit may be set up succesfully by only using a host with an external infrared module without a use of another test machine. A test procedure is excuted through the infrared transmit circuit to ascertain the function of the infrared module in the host is properly functioning.