Abstract: A semiconductor device and a method of fabricating the same, the semiconductor device includes a silicon substrate, a fin shaped structure and a shallow trench isolation. The fin shaped structure is disposed on the silicon substrate and includes a silicon germanium (SiGe) layer extending downwardly from a top end and at least occupying 80% to 90% of the fin shaped structure. The shallow trench isolation covers a bottom portion of the fin shaped structure.

Abstract: A semiconductor device and a method of fabricating the same, the semiconductor device includes a silicon substrate, a fin shaped structure and a shallow trench isolation. The fin shaped structure is disposed on the silicon substrate and includes a silicon germanium (SiGe) layer extending from bottom to top in the fin shaped structure. The shallow trench isolation covers a bottom portion of the fin shaped structure.

Abstract: A semiconductor device includes a silicon substrate, a fin shaped structure and a shallow trench isolation. The fin shaped structure includes a top portion which protrudes from a bottom surface of the fin shaped structure and the fin shaped structure is directly disposed on the silicon substrate. The bottom surface of the fin shaped structure covers an entire top surface of the silicon substrate. The fin shaped structure further includes a silicon germanium (SiGe) layer extending within the fin shaped structure and occupying the whole top portion of the shaped structure. The fin shaped structure is a semiconductor fin shaped structure, and the material of the silicon substrate is different from the material of the silicon germanium layer The shallow trench isolation is disposed on the top portion and the bottom surface of the fin shaped structure.

Abstract: A quantum dot lighting device includes a quantum-dot-lighting layer and two main structural layers being arranged at two sides of the quantum-dot-lighting layer along a vertical direction. The quantum-dot-lighting layer includes a red lighting unit, a green lighting unit, and a red lighting unit. The red lighting unit includes red quantum dots, the green lighting unit includes green quantum dots, and the blue lighting unit includes blue quantum dots. A number of the blue quantum dots is larger than the number of the green quantum dots, and the number of the green quantum dots is larger than the number of the red quantum dots.

Abstract: A semiconductor structure includes a semiconductor substrate, at least a semiconductor layer formed on the semiconductor substrate, and at least a fin structure formed on the semiconductor layer. The semiconductor substrate includes a first semiconductor material, the semiconductor layer includes the first semiconductor material and a second semiconductor material, and the fin structure includes at least the first semiconductor material. A lattice constant of the second semiconductor material is different from a lattice constant of the first semiconductor material. The semiconductor layer includes a first width, the fin structure includes a second width, and the second width is smaller than the first width.

Abstract: A semiconductor device and a method of fabricating the same, the semiconductor device includes a silicon substrate, a fin shaped structure and a shallow trench isolation. The fin shaped structure is disposed on the silicon substrate and includes a silicon germanium (SiGe) layer extending downwardly from a top end and at least occupying 80% to 90% of the fin shaped structure. The shallow trench isolation covers a bottom portion of the fin shaped structure.

Abstract: The present disclosure relates to a gray-tone mask (GTM) and the manufacturing method thereof. The GTM includes at least one first light-blocking bar and at least on second light-blocking bar. A first gap is formed between any two adjacent first light-blocking bars. The second light-blocking bar is arranged within the first gap. The first gap includes a first crack being formed between adjacent first light-blocking bar and second light-blocking bar, wherein a length of the second light-blocking bar is “a”, a width of the first crack is “b”, and a ratio of the length of the second light-blocking bar (“a”) to the width of the first crack (“b”) satisfy the relationship: 0.9<a/b<1.1. In this way, the design scope is limited. Thus, a reasonable GTM design may be obtain and the experimental cost may be reduced.

Abstract: A MEMS structure includes a substrate, an inter-dielectric layer on a front side of the substrate, a MEMS component on the inter-dielectric layer, and a chamber disposed within the inter-dielectric layer and through the substrate. The chamber has an opening at a backside of the substrate. An etch stop layer is disposed within the inter-dielectric layer. The chamber has a ceiling opposite to the opening and a sidewall joining the ceiling. The sidewall includes a portion of the etch stop layer.

Abstract: A method of manufacturing a liquid crystal display panel is provided, which comprises steps of: manufacturing an array substrate; manufacturing a color film substrate; coating a pixel alignment film on the pixel electrode layer; performing a first optical alignment process on the pixel alignment film; coating a common alignment film on the common electrode layer; performing a second optical alignment process on the common alignment film; and performing an encasing alignment process on the array substrate and the color film substrate. This solves the technological problem of white dropouts on the screen from certain viewing angles.

Abstract: A display panel and a method for manufacturing the same are disclosed. The display panel includes a color filter substrate, a liquid crystal layer, and a thin film transistor array substrate. Each of pixel units of the thin film transistor array substrate includes a first, second, third, and fourth domains. Liquid crystal molecules corresponding to the first, second, third, and fourth domains respectively have a first, second, third, and fourth pretilt angles. The present invention can increase the display quality of the display panel at the observation viewing angles with the large viewing angles.

Abstract: A method of forming a MEMS structure, in which an etch stop layer is formed to be buried within the inter-dielectric layer and, during an etch of the substrate and the inter-dielectric layer from backside to form a chamber, the etch stop layer protect the remaining inter-dielectric layer. The chamber thus formed has an opening at a backside of the substrate, a ceiling opposite to the opening, and a sidewall joining the ceiling. The sidewall may further include a portion of the etch stop layer.

Abstract: A method of manufacturing a liquid crystal display panel is provided, which comprises steps of: manufacturing an array substrate; manufacturing a color film substrate; coating a pixel alignment film on the pixel electrode layer; performing a first optical alignment process on the pixel alignment film; coating a common alignment film on the common electrode layer; performing a second optical alignment process on the common alignment film; and performing an encasing alignment process on the array substrate and the color film substrate. This solves the technological problem of white dropouts on the screen from certain viewing angles.

Abstract: A liquid crystal display (LCD) panel and a manufacturing method thereof and an array substrate are provided. A pixel unit of the LCD panel includes a liquid crystal layer interposed between first and second substrates, and a first electrode layer, a second electrode layer and an insulating layer arranged on a side of the first substrate. The first electrode layer is neighboring with the first substrate, and the insulating layer is between the first and second electrode layers. The second electrode layer is formed with an electrode pattern, and the insulating layer is formed with grooves corresponding to regions without the electrode pattern of the second electrode layer. Accordingly, a driving voltage of the LCD panel can be reduced while ensuring the display quality, the power consumption is reduced and thereby the work hour of display terminal using the LCD panel is increased.

Abstract: The present invention provides a method of forming Fin-FET. A substrate with an active region and a dummy region are defined thereon. A plurality of first fins and second fins are formed in the active region, and a plurality of dummy fins are formed in the dummy region and the active region. A first active region is provided in the active region. A revised first active region is formed by extending the first active region to cover at least one adjacent dummy fin. Next, a first dummy region is provided in the dummy region. A first mask layout is formed by combining the revised first active region and the first dummy region. A first patterned mask layer is formed by using the first mask layout. A first epitaxial process is performed for the first fins and the dummy fins exposed by the first patterned mask layer.

Abstract: A semiconductor device is provided. The semiconductor device includes an active fin region, at least a gate strip, and a dummy fin region. The active fin region comprises at least an active fin. The gate strip is formed on the active fin region and extending across the active fin. The dummy fin region, comprising a plurality of dummy fins, is formed on two sides of the active fin region, and the dummy fins are formed on two sides of the gate strip.

Abstract: A pixel array, a pixel structure, and a driving method of a pixel structure are provided. The pixel structure includes a first scan line, a second scan line, a first common electrode line, a data line, a first active device, a second device, a first pixel electrode, and a second pixel electrode. The data line is intersected with the first scan line and the second scan line. The first active device is driven by the first scan line and connected to the data line. The second active device is driven by the second scan line and connected to the first common electrode line. The first pixel electrode is electrically connected to the data line through the first active device. The second pixel electrode is electrically connected to the data line through the first active device and electrically connected to the first common electrode line through the second active device.

Abstract: A semiconductor power device is provided, comprising a substrate of a first conductive type, a buffering layer of a second conductive type formed on the substrate, a voltage supporting layer formed on the buffering layer, and alternating sections of different conductive types formed at the substrate. The voltage supporting layer comprises first semiconductor regions of the first conductive type and second semiconductor regions of the second conductive type, wherein the first semiconductor regions and the second semiconductor regions are alternately arranged. The alternating section and the buffering layer form a segmented structure of alternated conductive types, which is used as an anode of the semiconductor device.

Abstract: A pixel array, a pixel structure, and a driving method of a pixel structure are provided. The pixel structure includes a first scan line, a second scan line, a first common electrode line, a data line, a first active device, a second device, a first pixel electrode, and a second pixel electrode. The data line is intersected with the first scan line and the second scan line. The first active device is driven by the first scan line and connected to the data line. The second active device is driven by the second scan line and connected to the first common electrode line. The first pixel electrode is electrically connected to the data line through the first active device. The second pixel electrode is electrically connected to the data line through the first active device and electrically connected to the first common electrode line through the second active device.

Abstract: A mask for curing frame sealant and a liquid crystal display (LCD) panel manufacturing method are provided in the present invention. A transition region is formed in a joining area between a shading region and a transparent region. The shading region is adjacent to the transparent region and the transition region joins the shading region, the transition region includes at least two shading portions and a transparent portion. The shading portion and the transparent portion are alternatively arranged. When the mask is utilized for exposure, the irradiation transmittance in the transition region is lower than the irradiation transmittance in the transparent region and higher than the irradiation transmittance in the shading region.

Abstract: A mask for curing frame sealant and a liquid crystal display (LCD) panel manufacturing method are provided in the present invention. A gradient shading region is formed in a joining area between a shading region and a transparent region, such that the gradient shading region is integrally formed. When the mask is utilized for exposure, the irradiation transmittance in the gradient shading region is smaller than the irradiation transmittance in the transparent region, but the irradiation transmittance in the gradient shading region is higher than the irradiation transmittance in the shading region. The pre-polymerization reaction of the irradiated monomers occurrence can be avoided in the present invention, and the pre-tilt angles in the liquid crystal layer are kept to be all the same during the alignment process.