Patents by Inventor Chung-Yi Su

Chung-Yi Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110123144
    Abstract: A USB connector is provided that has an OE module and high-speed electrical connections integrated therein. The OE module includes an optical module, at least one laser diode, at least one photodiode, an optical transceiver IC, and a PCB. The optical module, the laser diode, the photodiode, and the IC are mounted on a surface of the PCB. The OE module is secured within the USB connector. The PCB includes conductive traces and electrical contact pads. The conductive traces electrically connect the IC with the contact pads. The contact pads are electrically connected via through holes formed in the PCB to the high-speed electrical connections, which, in turn, are electrically connected to conductive traces of a motherboard or a computer.
    Type: Application
    Filed: November 30, 2009
    Publication date: May 26, 2011
    Applicant: Avago Technologies Fiber IP (Singapore) Pte. Ltd.
    Inventors: Tak K. Wang, Chung-Yi Su, Jesse Chin
  • Patent number: 7672350
    Abstract: A semiconductor device is provided that includes an optical feedback structure that is monolithically integrated with a VCSEL device and which extends the speed of the VCSEL device beyond the speed to which it would otherwise be limited due to relaxation oscillation. The optical feedback structure does not rely on light emissions from the VCSEL substrate material to produce optical feedback. Consequently, extension of the bandwidth of the semiconductor device through the use of optical feedback is not limited by the absorption threshold wavelength of the substrate material. Furthermore, because the optical feedback structure does not include the substrate, the ability to use optical feedback to extend the bandwidth of the device is independent of the precision with which the substrate thickness can be controlled.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: March 2, 2010
    Assignee: Avago Technologies Fiber IP (Singapore) Pte. Ltd.
    Inventors: Chen Ji, Chung-Yi Su
  • Publication number: 20090323751
    Abstract: A semiconductor device is provided that includes an optical feedback structure that is monolithically integrated with a VCSEL device and which extends the speed of the VCSEL device beyond the speed to which it would otherwise be limited due to relaxation oscillation. The optical feedback structure does not rely on light emissions from the VCSEL substrate material to produce optical feedback. Consequently, extension of the bandwidth of the semiconductor device through the use of optical feedback is not limited by the absorption threshold wavelength of the substrate material. Furthermore, because the optical feedback structure does not include the substrate, the ability to use optical feedback to extend the bandwidth of the device is independent of the precision with which the substrate thickness can be controlled.
    Type: Application
    Filed: June 30, 2008
    Publication date: December 31, 2009
    Applicant: Avago Technologies Fiber IP (Singapore) Pte. Ltd.
    Inventors: Chen Ji, Chung-Yi Su
  • Publication number: 20070025408
    Abstract: The present invention provides a long-wavelength VCSEL system providing a buried layer, growing a top spacer layer on the buried layer, forming an active layer on the top spacer layer, and creating a current confinement structure in the buried layer with a post epitaxy ion implantation.
    Type: Application
    Filed: July 29, 2005
    Publication date: February 1, 2007
    Inventors: Bernhard Koelle, Chung-Yi Su
  • Patent number: 6258639
    Abstract: A transistor structure with a degradation-stop layer that prevents degradation of underlying semiconductor layers while minimizing any increase in the gate leakage current is disclosed. In one embodiment, a transistor structure includes: a substrate; a channel layer formed of a charge transport material over the substrate; a Schottky barrier layer formed of an aluminum-containing material over the channel layer; a degradation-stop layer formed of a substantially aluminum-free material over the Schottky barrier layer; and a source, a drain and a gate. The source and the drain being formed over or alloyed through the degradation-stop layer, and a lower portion of the gate extends down through an exposed portion of the degradation-stop layer and is in physical and electrical contact with the Schottky barrier layer.
    Type: Grant
    Filed: May 21, 1999
    Date of Patent: July 10, 2001
    Assignee: Agilent Technologies, Inc.
    Inventors: Hans Rohdin, Chung-Yi Su, Arlene Sachiyo Wakita-Oyama, Nicolas J. Moll
  • Patent number: 5866936
    Abstract: A mesa-structure avalanche photodiode in which a buffer region in the surface of the mesa structure effectively eliminates the sharply-angled, heavily doped part of the cap layer that existed adjacent the lightly-doped n-type multiplication layer and p-type guard ring before the buffer region was formed. This reduces electric field strength at the ends of the planar epitaxial P-N junction and prevents edge breakdown in this junction. The lateral extent of the guard ring is defined by a window formed in a masking layer prior to regrowth of the guard ring. This guard ring structure eliminates the need to perform additional processing steps to define the lateral extent of the guard ring and passivate the periphery of the guard ring.
    Type: Grant
    Filed: April 1, 1997
    Date of Patent: February 2, 1999
    Assignee: Hewlett-Packard Company
    Inventors: Ghulam Hasnain, James N. Hollenhorst, Chung-Yi Su
  • Patent number: 5843804
    Abstract: A SAM avalanche photodiode formed with an epitaxially regrown guard ring and a planar P-N junction defined between a cap layer and a multiplication layer. The multiplication layer is part of a multi-layer semiconductor platform having a conductivity opposite to the conductivity type of the cap layer, including a light absorption layer, a substrate and an intermediate layer. A second embodiment of the present invention is disclosed including a SAM avalanche photodiode having a guard ring with a variable distribution of impurity dopant concentrations. In addition, a third embodiment of the present invention is disclosed in which a narrow band gap layer completely covers the cap layer and a non-alloy metal contact is formed to completely cover the narrow band gap layer, forming a mirror junction. In this embodiment, incident light is shined through the substrate and reflected from the mirror junction, enhancing the absorption efficiency.
    Type: Grant
    Filed: March 6, 1997
    Date of Patent: December 1, 1998
    Assignee: Hewlett-Packard Company
    Inventors: Chung-Yi Su, Ghulam Hasnain, James N. Hollenhorst
  • Patent number: 5610416
    Abstract: A SAM avalanche photodiode formed with an epitaxially regrown guard ring and a planar P-N junction defined between a cap layer and a multiplication layer. The multiplication layer is part of a multi-layer semiconductor platform having a conductivity opposite to the conductivity type of the cap layer, including a light absorption layer, a substrate and an intermediate layer. A second embodiment of the present invention is disclosed including a SAM avalanche photodiode having a guard ring with a variable distribution of impurity dopant concentrations. In addition, a third embodiment of the present invention is disclosed in which a narrow band gap layer completely covers the cap layer and a non-alloy metal contact is formed to completely cover the narrow band gap layer, forming a mirror junction. In this embodiment, incident light is shined through the substrate and reflected from the mirror junction, enhancing the absorption efficiency.
    Type: Grant
    Filed: February 16, 1995
    Date of Patent: March 11, 1997
    Assignee: Hewlett-Packard Company
    Inventors: Chung-Yi Su, Ghulam Hasnain, James N. Hollenhorst
  • Patent number: 5225369
    Abstract: A tunnel diode is disclosed having a highly P-doped layer of indium gallium arsenide formed on a highly N-doped layer of indium gallium arsenide which is supported on a semi-insulating substrate of indium phosphide. In an alternative embodiment, a tunnel diode is disclosed which has a highly P-doped layer of indium gallium arsenide formed on a highly N-doped layer of indium gallium arsenide which is supported on an N-doped substrate.
    Type: Grant
    Filed: November 4, 1991
    Date of Patent: July 6, 1993
    Assignee: Menlo Industries, Inc.
    Inventors: Chung-Yi Su, Sanehiko Kakihana, Domingo A. Figueredo
  • Patent number: 5093692
    Abstract: A tunnel diode is disclosed having a highly P-doped layer of indium gallium arsenide formed on a highly N-doped layer of indium gallium arsenide which is supported on a semi-insulating substrate of indium phosphide. In an alternative embodiment, a tunnel diode is disclosed which has a highly P-doped layer of indium gallium arsenide formed on a highly N-doped layer of indium gallium arsenide which is supported on an N-doped substrate.
    Type: Grant
    Filed: November 9, 1990
    Date of Patent: March 3, 1992
    Assignee: Menlo Industries, Inc.
    Inventors: Chung-Yi Su, Sanehiko Kakihana, Domingo A. Figueredo
  • Patent number: 4956568
    Abstract: A Monolithic Sampler is disclosed. The present invention overcomes the problem of inadequately low sampling rates that results from circuit designs or component limitations that constrain the bandwidths of previous instruments. The sampler includes five circuit stages: a local oscillator section that may be used to drive the system, a shock wave generator that produces high frequency edge-sharpened pulses, a reflection damping clamping section, a delay section, and a sampler section regulated by the stream of shock waves which produces an IF output. The local oscillator or a pulse generator (not shown) produces an input that propagates down a nonlinear transmission line. Once this input reaches the shock wave generator section, it encounters a series of hyperabrupt diodes which are employed as voltage dependent capacitors called varactors. These varactors deform the input pulses and generate a stream of spike-shaped waveforms known as shock waves.
    Type: Grant
    Filed: December 8, 1988
    Date of Patent: September 11, 1990
    Assignee: Hewlett-Packard Company
    Inventors: Chung-Yi Su, Michael R. Ty Tan, William J. Anklam
  • Patent number: 4855696
    Abstract: A pulse compressor consisting of a loaded transmission line having a pluraltiy of sections which have a ratio of dispersion to nonlinearity that decreases in the direction of pulse transmission.
    Type: Grant
    Filed: December 9, 1987
    Date of Patent: August 8, 1989
    Assignee: Hewlett-Packard
    Inventors: Michael Tan, Chung-Yi Su, William J. Anklam