Abstract: The present disclosure includes programmable snubber circuits and methods. In one embodiment, a circuit is configured between first and second power supply terminals. A programmable snubber circuit may be configured between the first and second power supplies to reduce ringing on the power supplies. In one embodiment, the circuit is a switching regulator and the power supply terminals are internal power supply terminals. The snubber circuit may be programmed to reduce ringing caused by switching currents through parasitic inductances in a package.

Abstract: The present disclosure includes programmable snubber circuits and methods. In one embodiment, a circuit is configured between first and second power supply terminals. A programmable snubber circuit may be configured between the first and second power supplies to reduce ringing on the power supplies. In one embodiment, the circuit is a switching regulator and the power supply terminals are internal power supply terminals. The snubber circuit may be programmed to reduce ringing caused by switching currents through parasitic inductances in a package.

Abstract: In one embodiment, a circuit comprises a first switching transistor and a second switching transistor. The first switching transistor and the second switching transistor are coupled in series between an input voltage and ground and having a common node therebetween to provide a switching output. A first switching circuit selective couples a gate of the first switching transistor to the input voltage and a first mid-level voltage supply. A second switching circuit selectively couples a gate of the second switching transistor to a second mid-level voltage supply and ground. A charge-recycling circuit is coupled to the gate of the first switching transistor, the gate of the second switching transistor, the first mid-level voltage supply, and the second mid-level voltage supply to selectively recycle charge between the first mid-level voltage supply and the second mid-level voltage supply.

Abstract: In one embodiment, a circuit comprises a charge pump. A gain control circuit is configured to detect an input voltage and generate a gain control signal to change a gain of the charge pump to maintain the output voltage of the charge pump in a voltage range. A voltage to frequency converter is configured to detect the input voltage and change a frequency of a frequency control signal applied to the charge pump based in the detected input voltage to maintain the frequency in a frequency range so that the output voltage of the charge pump is maintained in the voltage range.

Abstract: In one embodiment, a circuit comprises a first load circuit coupled to a first input voltage. A current sinking circuit is coupled to an output of the first load circuit. A second load circuit is coupled to ground. A current sourcing circuit is coupled between a second input voltage and an output of the second load circuit. A charge-recycling circuit is coupled between the output of the first load circuit and the output of the second load circuit to provide current from the current sinking circuit to the output of the current sourcing circuit to reduce current through the current sourcing circuit. The charge-recycling circuit can be a charge pump.

Abstract: Exemplary embodiments are related to switching power converters. A switching power converter may comprise a plurality of control unit configured for average current mode control, wherein each control unit of the plurality comprises a dedicated proportional control unit. The switching power converter may further comprise an integrator coupled to each control unit of the plurality of control unit and configured to convey a signal to each control unit.

Abstract: A method and apparatus for optimizing a light emitting diode (LED) operation range is provided. The method comprises the steps of: turning on at least one LED; and then measuring an anode voltage of the at least one LED; then measuring a cathode voltage of the at least one LED. Once the measurements are completed, a forward voltage of the at least one LED is calculated. After the calculation, the at least one LED is turned off and a power multiplexer switch threshold is set for that LED based on the measured anode and cathode voltages.

Abstract: A method and apparatus for determining the entry and exit from a pulse skipping mode in a power supply is provided. The power supply may incorporate a buck regulator. The method begins when current is sensed at an inductor of a power supply. This sensed current is then compared with a predetermined threshold current value. If the comparison reveals that the current is below the predetermined threshold current value, a pulse skipping mode is entered. If the current is found to be above the predetermined threshold the pulse skipping mode is not entered and normal operation continues. The apparatus includes a transconductance amplifier, an offset voltage source, a reference power supply reference voltage source, first and second voltage comparators, and a processor.

Abstract: A method and apparatus for optimizing a light emitting diode (LED) operation range is provided. The method comprises the steps of: turning on at least one LED; and then measuring an anode voltage of the at least one LED; then measuring a cathode voltage of the at least one LED. Once the measurements are completed, a forward voltage of the at least one LED is calculated. After the calculation, the at least one LED is turned off and a power multiplier switch threshold is set for that LED based on the measured anode and cathode voltages.

Abstract: In one particular embodiment, an integrated circuit includes a package and a substrate electrically and physically coupled to the package. The package includes a first package-substrate connection, a second package-substrate connection, and metallization coupling the first package-substrate connection to the second package-substrate connection. The substrate is coupled to the package via the first package-substrate connection and the second package-substrate connection. The substrate includes a plurality of power domains and a power control unit. The second package-substrate connection of the package is coupled to a particular power domain of the plurality of power domains. The power control unit includes logic and a switch, where the switch includes a first terminal coupled to a voltage supply terminal, a control terminal coupled to the logic, and a second terminal coupled to the first package-substrate connection of the package.

Abstract: An improved rail-to-rail (R-R) input stage circuit with dynamic bias control is described. Input stage circuit includes a differential pair circuit, a level shifted differential pair and a bias control circuit. The differential pair circuit and the level shifted differential pair are of same type, non-complementary MOS devices. In exemplary embodiments, a first and a second bias control circuits dynamically control the bias current of the level shifted differential pair and the bias current of the differential pair circuit, respectively, in response to the input common mode voltage of the rail-to-rail input stage circuit. First and second bias control circuits maintain the output impedance of the R-R input stage circuit at a desired level, as the R-R input stage circuit operates outside the input common mode voltage range supported by the level shifted differential pair and the differential pair circuit, respectively. Further exemplary embodiments include a first and a second gm control circuits.

Abstract: An improved rail-to-rail (R-R) input stage circuit with dynamic bias control is described. Input stage circuit includes a differential pair circuit, a level shifted differential pair and a bias control circuit. The differential pair circuit and the level shifted differential pair are of same type, non-complementary MOS devices. In exemplary embodiments, a first and a second bias control circuits dynamically control the bias current of the level shifted differential pair and the bias current of the differential pair circuit, respectively, in response to the input common mode voltage of the rail-to-rail input stage circuit. First and second bias control circuits maintain the output impedance of the R-R input stage circuit at a desired level, as the R-R input stage circuit operates outside the input common mode voltage range supported by the level shifted differential pair and the differential pair circuit, respectively. Further exemplary embodiments include a first and a second gm control circuits.

Abstract: In one particular embodiment, an integrated circuit includes a package and a substrate electrically and physically coupled to the package. The package includes a first package-substrate connection, a second package-substrate connection, and metallization coupling the first package-substrate connection to the second package-substrate connection. The substrate is coupled to the package via the first package-substrate connection and the second package-substrate connection. The substrate includes a plurality of power domains and a power control unit. The second package-substrate connection of the package is coupled to a particular power domain of the plurality of power domains. The power control unit includes logic and a switch, where the switch includes a first terminal coupled to a voltage supply terminal, a control terminal coupled to the logic, and a second terminal coupled to the first package-substrate connection of the package.

Abstract: In one particular embodiment, an integrated circuit includes a package and a substrate electrically and physically coupled to the package. The package includes a first pin, a second pin, and metallization coupling the first pin to the second pin. The substrate is coupled to the package via the first pin and the second pin. The substrate includes a plurality of power domains and a power control unit. The second pin of the package is coupled to a particular power domain of the plurality of power domains. The power control unit includes logic and a switch, where the switch includes a first terminal coupled to a voltage supply terminal, a control terminal coupled to the logic, and a second terminal coupled to the first pin of the package. The logic selectively activates the switch to distribute power to the particular power domain via the metallization of the package.

Abstract: A device is disclosed that includes a first pin to supply power to a first power domain of an integrated circuit, a second pin to supply power to a second power domain of the integrated circuit, a switching regulator and a controller. The switching regulator is coupled to the first pin to provide a first regulated power supply to the first power domain and is coupled to the second pin to provide a second regulated power supply to the second power domain. The controller is coupled to the first pin and to the second pin to selectively reduce current flow to at least the second pin during a low power event.

Abstract: A device is disclosed that includes a first pin to supply power to a first power domain of an integrated circuit, a second pin to supply power to a second power domain of the integrated circuit, a switching regulator and a controller. The switching regulator is coupled to the first pin to provide a first regulated power supply to the first power domain and is coupled to the second pin to provide a second regulated power supply to the second power domain. The controller is coupled to the first pin and to the second pin to selectively reduce current flow to at least the second pin during a low power event.

Abstract: In one particular embodiment, an integrated circuit includes a package and a substrate electrically and physically coupled to the package. The package includes a first pin, a second pin, and metallization coupling the first pin to the second pin. The substrate is coupled to the package via the first pin and the second pin. The substrate includes a plurality of power domains and a power control unit. The second pin of the package is coupled to a particular power domain of the plurality of power domains. The power control unit includes logic and a switch, where the switch includes a first terminal coupled to a voltage supply terminal, a control terminal coupled to the logic, and a second terminal coupled to the first pin of the package. The logic selectively activates the switch to distribute power to the particular power domain via the metallization of the package.

Abstract: A system includes a transceiver having mixers, variable gain amplifiers, a modulator, a local oscillator and power amplifiers that may receive control signals generated by a Digital-to-Analog Converter (DAC). The DAC may include a multiplexer that receives digital values that are transferred to a DAC core, converted to analog values, and stored in sample-and-hold circuits. The one DAC may service multiple devices within the transceiver with control signals. A smart timer may generate select signals to the multiplexer and sample-and hold circuits to prioritize updating of the control signals.

Abstract: A system includes a transceiver having mixers, variable gain amplifiers, a modulator, a local oscillator and power amplifiers that may receive control signals generated by a Digital-to-Analog Converter (DAC). The DAC may include a multiplexer that receives digital values that are transferred to a DAC core, converted to analog values, and stored in sample-and-hold circuits. The one DAC may service multiple devices within the transceiver with control signals. A smart timer may generate select signals to the multiplexer and sample-and hold circuits to prioritize updating of the control signals.