Patents by Inventor Chun-Ming Yang

Chun-Ming Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250374604
    Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a substrate, a first nanostructure, a second nanostructure, and a first gate stack. The first nanostructure is between the substrate and the second nanostructure, and the first gate stack is wrapped around the first nanostructure and the second nanostructure. The method includes removing the first gate stack and end potions of the first nanostructure. The method includes partially removing the second nanostructure to round a first corner of the second nanostructure. The first corner becomes a first rounded corner after the second nanostructure is partially removed. The method includes removing the first nanostructure. The method includes forming a second gate stack over the substrate and wrapped around the second nanostructure.
    Type: Application
    Filed: September 3, 2024
    Publication date: December 4, 2025
    Inventors: Yu-Jiun Peng, Yi-Hsin Lee, Kai-Min Chien, Chun-Ming Yang, Tsai-Jhen Kuo, Ming-Chang Wen
  • Patent number: 12477772
    Abstract: A method for forming a multi-gate semiconductor structure is provided. A substrate including a fin structure is received. First portions of the fin structure are removed to expose a source/drain region of the fin structure. A semiconductor layer is formed in the source/drain region. Second portions of the fin structure are removed to expose a channel region of the fin structure. A surface of the channel region of the fin structure is cleaned. An interfacial layer is formed over the cleaned surface of the channel region of the fin structure.
    Type: Grant
    Filed: June 26, 2022
    Date of Patent: November 18, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun-Ming Yang, Yu-Jiun Peng, Yu-Wen Wang
  • Publication number: 20250308535
    Abstract: An own voice detection method includes a training phase and a detection phase. The training phase includes: receiving a first audio signal and a second audio signal from a first sound receiver and a second sound receiver; performing a voice activity detection to determine whether a voice activity is present; and training a filter based on the first and second audio signals when the voice activity is present, thereby finding optimal filter coefficients. The detection phase includes: receiving the first audio signal and the second audio signal from the first and second sound receivers; inputting the first audio signal to the filter with the optimal filter coefficients to obtain a third audio signal; and comparing to obtain a similarity index between the third and second audio signals, and determining that own voice is present when the similarity index is greater than a threshold.
    Type: Application
    Filed: November 21, 2024
    Publication date: October 2, 2025
    Inventors: Chun-Ming YANG, Shih-Chieh HUANG
  • Patent number: 12376326
    Abstract: The present disclosure describes structure and method of a fin field-effect transistor (finFET) device. The finFET device includes: a substrate, a fin over the substrate, and a gate structure over the fin. The gate structure includes a work-function metal (WFM) layer over an inner sidewall of the gate structure. A topmost surface of the WFM layer is lower than a top surface of the gate structure. The gate structure also includes a filler gate metal layer over the topmost surface of the WFM layer. A top surface of the filler gate metal layer is substantially co-planar with the top surface of the gate structure. The gate structure further includes a self-assembled monolayer (SAM) between the filler gate metal layer and the WFM layer.
    Type: Grant
    Filed: July 28, 2023
    Date of Patent: July 29, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ju-Li Huang, Hsin-Che Chiang, Yu-Chi Pan, Chun-Ming Yang, Chun-Sheng Liang, Ying-Liang Chuang, Ming-Hsi Yeh
  • Publication number: 20250241001
    Abstract: The present disclosure describes structure and method of a fin field-effect transistor (finFET) device. The finFET device includes: a substrate, a fin over the substrate, and a gate structure over the fin. The gate structure includes a work-function metal (WFM) layer over an inner sidewall of the gate structure. A topmost surface of the WFM layer is lower than a top surface of the gate structure. The gate structure also includes a filler gate metal layer over the topmost surface of the WFM layer. A top surface of the filler gate metal layer is substantially co-planar with the top surface of the gate structure. The gate structure further includes a self-assembled monolayer (SAM) between the filler gate metal layer and the WFM layer.
    Type: Application
    Filed: January 17, 2025
    Publication date: July 24, 2025
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ju-Li HUANG, Hsin-Che CHIANG, Yu-Chi PAN, Chun-Ming YANG, Chun-Sheng LIANG, Ying-Liang CHUANG, Ming-Hsi YEH
  • Publication number: 20230420567
    Abstract: A method for forming a multi-gate semiconductor structure is provided. A substrate including a fin structure is received. First portions of the fin structure are removed to expose a source/drain region of the fin structure. A semiconductor layer is formed in the source/drain region. Second portions of the fin structure are removed to expose a channel region of the fin structure. A surface of the channel region of the fin structure is cleaned. An interfacial layer is formed over the cleaned surface of the channel region of the fin structure.
    Type: Application
    Filed: June 26, 2022
    Publication date: December 28, 2023
    Inventors: CHUN-MING YANG, YU-JIUN PENG, YU-WEN WANG
  • Publication number: 20230378360
    Abstract: The present disclosure describes structure and method of a fin field-effect transistor (finFET) device. The finFET device includes: a substrate, a fin over the substrate, and a gate structure over the fin. The gate structure includes a work-function metal (WFM) layer over an inner sidewall of the gate structure. A topmost surface of the WFM layer is lower than a top surface of the gate structure. The gate structure also includes a filler gate metal layer over the topmost surface of the WFM layer. A top surface of the filler gate metal layer is substantially co-planar with the top surface of the gate structure. The gate structure further includes a self-assembled monolayer (SAM) between the filler gate metal layer and the WFM layer.
    Type: Application
    Filed: July 28, 2023
    Publication date: November 23, 2023
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ju-Li Huang, Hsin-Che Chiang, Yu-Chi Pan, Chun-Ming Yang, Chun-Sheng Liang, Ying-Liang Chuang, Ming-Hsi Yeh
  • Publication number: 20230361199
    Abstract: Provided is a device with a replacement spacer structure and a method for forming such a structure. The method includes forming an initial spacer structure, wherein the initial spacer structure has an initial etch rate for a selected etchant. The method further includes removing a portion of the initial spacer structure, wherein a remaining portion of the initial spacer structure is not removed. Also, the method includes forming a replacement spacer structure adjacent to the remaining portion of the initial spacer structure to form a combined spacer structure, wherein the combined spacer structure has an intermediate etch rate for the selected etchant that is less than the initial etch rate for a selected etchant. Further, the method includes etching the combined spacer structure with the selected etchant to form a final spacer structure.
    Type: Application
    Filed: May 5, 2022
    Publication date: November 9, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chang-Ta Chen, Ming-Chang Wen, Kuo-Feng Yu, Chen-Yu Tai, Yun Lee, Poya Chuang, Chun-Ming Yang, Yoh-Rong Liu, Ya-Ting Yang
  • Patent number: 11810978
    Abstract: The present disclosure describes structure and method of a fin field-effect transistor (finFET) device. The finFET device includes: a substrate, a fin over the substrate, and a gate structure over the fin. The gate structure includes a work-function metal (WFM) layer over an inner sidewall of the gate structure. A topmost surface of the WFM layer is lower than a top surface of the gate structure. The gate structure also includes a filler gate metal layer over the topmost surface of the WFM layer. A top surface of the filler gate metal layer is substantially co-planar with the top surface of the gate structure. The gate structure further includes a self-assembled monolayer (SAM) between the filler gate metal layer and the WFM layer.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: November 7, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ju-Li Huang, Hsin-Che Chiang, Yu-Chi Pan, Chun-Ming Yang, Chun-Sheng Liang, Ying-Liang Chuang, Ming-Hsi Yeh
  • Publication number: 20230165340
    Abstract: In a method and device for extracting joint line of shoe, a contact end of a contouring tool is provided to contact a joint contour of a shoe sample, an encoder is provided to generate a plurality of first trajectory coordinate signals of the contact end while the contact end is moved along the joint contour, and a signal processor is provided to receive the first trajectory coordinate signals to create a digital joint line.
    Type: Application
    Filed: November 26, 2021
    Publication date: June 1, 2023
    Inventors: Cheng-Chang Chiu, Chun-Ming Yang, Chia-Pin Lin, Ping-Tzan Huang, Hong-Ren Zhang, Yan-Jun Chen, Wan-Shan Yin
  • Patent number: 11267129
    Abstract: An automatic positioning method and an automatic control device are provided. The automatic control device includes a processing unit, a memory unit, and a camera unit to automatically control a robotic arm. When the processing unit executes a positioning procedure, the camera unit obtains a first image of the robotic arm. The processing unit analyzes the first image to establish a three-dimensional working environment model and obtains first spatial positioning data. The processing unit controls the robotic arm to move a plurality of times to sequentially obtain a plurality of second images of the robotic arm by the camera unit and analyzes the second images and encoder information of the robotic arm to obtain second spatial positioning data. The processing unit determines whether an error parameter between the first spatial positioning data and the second spatial positioning data is less than a specification value to end the positioning procedure.
    Type: Grant
    Filed: November 28, 2019
    Date of Patent: March 8, 2022
    Assignee: Metal Industries Research & Development Centre
    Inventors: Shi-Wei Lin, Chun-Ming Yang, Fu-I Chou, Wan-Shan Yin
  • Publication number: 20210296483
    Abstract: The present disclosure describes structure and method of a fin field-effect transistor (finFET) device. The finFET device includes: a substrate, a fin over the substrate, and a gate structure over the fin. The gate structure includes a work-function metal (WFM) layer over an inner sidewall of the gate structure. A topmost surface of the WFM layer is lower than a top surface of the gate structure. The gate structure also includes a filler gate metal layer over the topmost surface of the WFM layer. A top surface of the filler gate metal layer is substantially coplanar with the top surface of the gate structure. The gate structure further includes a self-assembled monolayer (SAM) between the filler gate metal layer and the WFM layer.
    Type: Application
    Filed: June 4, 2021
    Publication date: September 23, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ju-Li HUANG, Hsin-Che CHIANG, Yu-Chi PAN, Chun-Ming YANG, Chun-Sheng LIANG, Ying-Liang CHUANG, Ming-Hsi YEG
  • Patent number: 11031500
    Abstract: The present disclosure describes structure and method of a fin field-effect transistor (finFET) device. The finFET device includes: a substrate, a fin over the substrate, and a gate structure over the fin. The gate structure includes a work-function metal (WFM) layer over an inner sidewall of the gate structure. A topmost surface of the WFM layer is lower than a top surface of the gate structure. The gate structure also includes a filler gate metal layer over the topmost surface of the WFM layer. A top surface of the filler gate metal layer is substantially co-planar with the top surface of the gate structure. The gate structure further includes a self-assembled monolayer (SAM) between the filler gate metal layer and the WFM layer.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: June 8, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ju-Li Huang, Chun-Sheng Liang, Ming-Hsi Yeh, Ying-Liang Chuang, Hsin-Che Chiang, Chun-Ming Yang, Yu-Chi Pan
  • Publication number: 20200171668
    Abstract: An automatic positioning method and an automatic control device are provided. The automatic control device includes a processing unit, a memory unit, and a camera unit to automatically control a robotic arm. When the processing unit executes a positioning procedure, the camera unit obtains a first image of the robotic arm. The processing unit analyzes the first image to establish a three-dimensional working environment model and obtains first spatial positioning data. The processing unit controls the robotic arm to move a plurality of times to sequentially obtain a plurality of second images of the robotic arm by the camera unit and analyzes the second images and encoder information of the robotic arm to obtain second spatial positioning data. The processing unit determines whether an error parameter between the first spatial positioning data and the second spatial positioning data is less than a specification value to end the positioning procedure.
    Type: Application
    Filed: November 28, 2019
    Publication date: June 4, 2020
    Applicant: Metal Industries Research & Development Centre
    Inventors: Shi-Wei Lin, Chun-Ming Yang, Fu-I Chou, Wan-Shan Yin
  • Publication number: 20200171655
    Abstract: An automatic control method and an automatic control device are provided. The automatic control device includes a processing unit, a memory unit and a camera unit. The memory unit records an object database and a behavior database. When the automatic control device is operated in an automatic learning mode, the camera unit obtains a continuous image, and the processing unit analyzes the continuous image to determine whether there is an object being moved and matching an object model recorded in the object database in a first placement area. When the continuous image displays the object is moved, the processing unit obtain control data corresponding to moving the object from the first placement area to a second placement area, and the processing unit records the control data to the behavior database. The control data includes trajectory data and motion posture data of the object.
    Type: Application
    Filed: November 21, 2019
    Publication date: June 4, 2020
    Applicant: Metal Industries Research & Development Centre
    Inventors: Shi-Wei Lin, Fu-I Chou, Chun-Ming Yang, Wei-Chan Weng, Chih-Chin Wen
  • Publication number: 20200044073
    Abstract: The present disclosure describes structure and method of a fin field-effect transistor (finFET) device. The finFET device includes: a substrate, a fin over the substrate, and a gate structure over the fin. The gate structure includes a work-function metal (WFM) layer over an inner sidewall of the gate structure. A topmost surface of the WFM layer is lower than a top surface of the gate structure. The gate structure also includes a filler gate metal layer over the topmost surface of the WFM layer. A top surface of the filler gate metal layer is substantially co-planar with the top surface of the gate structure. The gate structure further includes a self-assembled monolayer (SAM) between the filler gate metal layer and the WFM layer.
    Type: Application
    Filed: February 27, 2019
    Publication date: February 6, 2020
    Applicant: Taiwam Semiconductor Manufacturing Co., Ltd.
    Inventors: Ju-Li HUANG, Chun-Sheng Liang, Ming-Hsi Yeh, Ying-Liang Chuang, Hsin-Che Chiang, Chun-Ming Yang, Yu-Chi Pan
  • Patent number: 10203729
    Abstract: A portable electronic device is provided. The portable electronic device includes a display unit, an input unit, and a hinge mechanism. The hinge mechanism is detachably connected the display unit and pivotally connected to the input unit, wherein the hinge mechanism includes a housing, a stopper, and an elastic element. The elastic element connects the housing to the stopper. When the portable electronic device is in a closed state, the stopper is in an initial position relative to the housing. When the display unit and the hinge mechanism are rotated relative to the input unit around a rotation axis and the portable electronic device is in an open state, the elastic element exerts an elastic force on the stopper, and the stopper slides to an outer side relative to the housing from the initial position and partially covers the display unit.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: February 12, 2019
    Assignee: QUANTA COMPUTER INC.
    Inventors: I-Hao Chen, Chih-Min Chan, Chun-Ming Yang
  • Patent number: 9874807
    Abstract: An optical image capturing module and an alignment method and an observation method for an upper substrate and a lower substrate using the optical image capturing module are provided. The upper substrate and the lower substrate are disposed opposite. The alignment method includes the following steps of: emitting a light ray; filtering the light ray and dividing the light ray into a light ray at first wavelength and a light ray at second wavelength, whereby the light ray at first wavelength irradiates a pattern on the upper substrate, and the light ray at second wavelength irradiates a pattern on the lower substrate; reflecting the pattern on the upper substrate to an image capturing device; reflecting the pattern on the lower substrate to the image capturing device; and determining the positions of the pattern on the upper substrate and the pattern on the lower substrate on the image capturing device.
    Type: Grant
    Filed: December 3, 2013
    Date of Patent: January 23, 2018
    Assignee: METAL INDUSTRIES RESEARCH&DEVELOPMENT CENTRE
    Inventors: Shi-Wei Lin, Chun-Ming Yang, Chih-Chin Wen, Chorng-Tyan Lin
  • Patent number: 9459460
    Abstract: A method of aligning an upper substrate and a lower substrate is provided. The upper and lower substrates are oppositely arranged, and the aligning method includes the following steps: providing an optical image capturing module; emitting light rays to a third surface of a first prism; filtering the light rays, so that the light rays are divided into light rays at the first wavelength range and light rays at the second wavelength range, wherein the light rays at the first wavelength range irradiate a pattern on the upper substrate, and light rays at the second wavelength range irradiate a pattern on the lower substrate; reflecting a pattern image on the upper substrate to an image capturing apparatus; reflecting a pattern image on the lower substrate to the image capturing apparatus; and determining locations of the patterns of the upper and lower substrate that are on the image capturing apparatus.
    Type: Grant
    Filed: August 8, 2014
    Date of Patent: October 4, 2016
    Assignee: METAL INDUSTRIES RESEARCH & DEVELOPMENT CENTRE
    Inventors: Shi-Wei Lin, Chun-Ming Yang, Chih-Chin Wen, Chorng-Tyan Lin
  • Patent number: 9362153
    Abstract: A method for aligning substrates in different spaces and having different sizes includes: capturing actual local images of two substrates; comparing specific marks in standard local feature regions of the two substrates, and obtaining specific marks in actual local feature regions of the two substrates; separately establishing actual coordinate systems of the two substrates to synthesize aligned assembly coordinate system; comparing coordinate values of the specific marks of the two substrates in the two actual coordinate systems to obtain first group of offsets, and comparing sizes of the two substrates to obtain a size difference; using the first group of offsets and the size difference to correct coordinate values of specific marks of one of the two substrates; comparing coordinate values of the specific marks of the two substrates, to obtain second group of offsets; and moving the one to a position compensated by the second group of offsets.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: June 7, 2016
    Assignee: METAL INDUSTRIES RESEARCH&DEVELOPMENT CENTRE
    Inventors: Chorng-Tyan Lin, Chih-Chin Wen, Chun-Ming Yang, Shi-Wei Lin