Abstract: In an embodiment, a device includes: a semiconductor substrate; a first fin extending from the semiconductor substrate; a second fin extending from the semiconductor substrate; an epitaxial source/drain region including: a main layer in the first fin and the second fin, the main layer including a first semiconductor material, the main layer having an upper faceted surface and a lower faceted surface, the upper faceted surface and the lower faceted surface each being raised from respective surfaces of the first fin and the second fin; and a semiconductor contact etch stop layer (CESL) contacting the upper faceted surface and the lower faceted surface of the main layer, the semiconductor CESL including a second semiconductor material, the second semiconductor material being different from the first semiconductor material.

Abstract: A method for fabricating a semiconductor device is provided. The method includes coating a photoresist film over a target layer over a semiconductor substrate; performing a lithography process to pattern the photoresist film into a photoresist layer; performing a directional ion bombardment process to the photoresist layer along a direction tilted with respect to a normal direction of the semiconductor substrate, such that a carbon atomic concentration in the photoresist layer is increased; and etching the target layer using the photoresist layer as an etch mask.

Abstract: A two-phase immersion-type heat dissipation structure having a porous structure is provided. The two-phase immersion-type heat dissipation structure includes a heat dissipation substrate, a plurality of fins, and a reinforcement frame. The heat dissipation substrate has a fin surface and a non-fin surface that face away from each other, the non-fin surface is configured to be in contact with a heat source immersed in a two-phase coolant, and the fins are integrally formed on the fin surface. A porous structure is covered onto at least one portion of the fin surface and at least one portion of the plurality of fins, and has a porosity of from 10% to 50% and a thickness that is from 0.1 mm to 1 mm. The reinforcement frame is bonded to the heat dissipation substrate and surrounds another one portion of the plurality of fins.

Abstract: A semiconductor device includes a layer having a semiconductive material. The layer includes an outwardly-protruding fin structure. An isolation structure is disposed over the layer but not over the fin structure. A first spacer and a second spacer are each disposed over the isolation structure and on sidewalls of the fin structure. The first spacer is disposed on a first sidewall of the fin structure. The second spacer is disposed on a second sidewall of the fin structure opposite the first sidewall. The second spacer is substantially taller than the first spacer. An epi-layer is grown on the fin structure. The epi-layer protrudes laterally. A lateral protrusion of the epi-layer is asymmetrical with respect to the first side and the second side.

Abstract: The current disclosure includes a plasma etching system that includes a movable plasma source and a moveable wafer stage. A relative position between the movable plasma source and the movable wafer stage can be varied to set up an angle along which plasma particles of the plasma hits a wafer positioned on the wafer stage.

Abstract: In an embodiment, a device includes: a semiconductor substrate; a first fin extending from the semiconductor substrate; a second fin extending from the semiconductor substrate; an epitaxial source/drain region including: a main layer in the first fin and the second fin, the main layer including a first semiconductor material, the main layer having an upper faceted surface and a lower faceted surface, the upper faceted surface and the lower faceted surface each being raised from respective surfaces of the first fin and the second fin; and a semiconductor contact etch stop layer (CESL) contacting the upper faceted surface and the lower faceted surface of the main layer, the semiconductor CESL including a second semiconductor material, the second semiconductor material being different from the first semiconductor material.

Abstract: A method of semiconductor fabrication includes providing a semiconductor structure having a substrate and first, second, third, and fourth fins above the substrate. The method further includes forming an n-type epitaxial source/drain (S/D) feature on the first and second fins, forming a p-type epitaxial S/D feature on the third and fourth fins, and performing a selective etch process on the semiconductor structure to remove upper portions of the n-type epitaxial S/D feature and the p-type epitaxial S/D feature such that more is removed from the n-type epitaxial S/D feature than the p-type epitaxial S/D feature.

Abstract: The present disclosure relates to a semiconductor device and a manufacturing method of fabricating a semiconductor structure. The method includes forming an opening in a substrate and depositing a conformal metal layer in the opening. The depositing includes performing one or more deposition cycles. The deposition includes flowing a first precursor into a deposition chamber and purging the deposition chamber to remove at least a portion of the first precursor. The method also includes flowing a second precursor into the deposition chamber to form a sublayer of the conformal metal layer and purging the deposition chamber to remove at least a portion of the second precursor. The method further includes performing a metallic halide etching (MHE) process that includes flowing a third precursor into the deposition chamber.

Abstract: The present disclosure provides semiconductor devices and methods of forming the same. A semiconductor device according to one embodiment of the present disclosure includes a first fin-shaped structure extending lengthwise along a first direction over a substrate, a first epitaxial feature over a source/drain region of the first fin-shaped structure, a gate structure disposed over a channel region of the first fin-shaped structure and extending along a second direction perpendicular to the first direction, and a source/drain contact over the first epitaxial feature. The bottom surface of the gate structure is closer to the substrate than a bottom surface of the source/drain contact.

Abstract: A method of semiconductor fabrication includes providing a semiconductor structure having a substrate and first, second, third, and fourth fins above the substrate. The method further includes forming an n-type epitaxial source/drain (S/D) feature on the first and second fins, forming a p-type epitaxial S/D feature on the third and fourth fins, and performing a selective etch process on the semiconductor structure to remove upper portions of the n-type epitaxial S/D feature and the p-type epitaxial S/D feature such that more is removed from the n-type epitaxial S/D feature than the p-type epitaxial S/D feature.

Abstract: A two-phase immersion-type heat dissipation structure having fins for facilitating bubble generation is provided. The two-phase immersion-type heat dissipation structure includes a heat dissipation substrate, and a plurality of fins. The heat dissipation substrate has a fin surface and a non-fin surface that face away from each other, the non-fin surface is configured to be in contact with a heat source immersed in a two-phase coolant, and the fin surface is connected with the plurality of fins. More than half of the fins are functional fins, and at least one side surface of each of the functional fins and the fin surface have an included angle therebetween that is from 80 degrees to 100 degrees. A center line average roughness (Ra) of the side surface is less than 3 ?m, and a ten-point average roughness (Rz) of the side surface is not less than 12 ?m.

Abstract: A two-phase immersion-type heat dissipation structure is provided. The two-phase immersion-type heat dissipation structure includes a heat dissipation substrate and a plurality of non-vertical fins. The heat dissipation substrate has a fin surface and a non-fin surface that face away from each other. The non-fin surface is configured to be in contact with a heating element immersed in a two-phase coolant. The fin surface is connected with the non-vertical fins, a cross-sectional contour of one of the non-vertical fins has a top end point and a bottom end point connected with the fin surface, and the top and bottom end points are opposite to each other. A length of a cross-sectional contour line defined from the top end point to the bottom end point is greater than a perpendicular line length of a perpendicular line defined from the top end point to the fin surface.

Abstract: The current disclosure includes a plasma etching system that includes a movable plasma source and a moveable wafer stage. A relative position between the movable plasma source and the movable wafer stage can be varied to set up an angle along which plasma particles of the plasma hits a wafer positioned on the wafer stage.

Abstract: A semiconductor structure includes a fin protruding from a substrate, a first and a second metal gate stacks disposed over the fin, and a dielectric feature defining a sidewall of each of the first and the second metal gate stacks. Furthermore, the dielectric feature includes a two-layer structure, where sidewalls of the first layer are defined by the second layer, and where the first and the second layers have different compositions.

Abstract: A two-phase immersion-cooling heat-dissipation structure having skived fins with high surface roughness includes an immersion-cooling substrate and a plurality of skived fins. The immersion-cooling substrate has a top surface and a bottom surface that are opposite to each other, the bottom surface is used for contacting a heat source immersed in a two-phase coolant, the top surface is connected with the plurality of skived fins, a center line average roughness Ra of a surface of the plurality of skived fins is greater than 10 ?m, and a ten point average roughness Rz of the surface of the plurality of skived fins is greater than 20 ?m, such that a ratio between a surface area of the plurality of skived fins in contact with the two-phase coolant and a volume of the plurality of skived fins is greater than 400.

Abstract: The present disclosure provides semiconductor devices and methods of forming the same. A semiconductor device according to one embodiment of the present disclosure includes a first fin-shaped structure extending lengthwise along a first direction over a substrate, a first epitaxial feature over a source/drain region of the first fin-shaped structure, a gate structure disposed over a channel region of the first fin-shaped structure and extending along a second direction perpendicular to the first direction, and a source/drain contact over the first epitaxial feature. The bottom surface of the gate structure is closer to the substrate than a bottom surface of the source/drain contact.

Abstract: A two-phase immersion-cooling heat-dissipation structure having shortened evacuation route for vapor bubbles includes an immersion-cooling substrate having a first surface and a second surface that are opposite to each other and immersion-cooling fins. The second surface contacts a heat source immersed in a two-phase coolant, and the first surface connects to the immersion-cooling fins. The immersion-cooling fins include at least one skived fin integrally formed on the first surface of the immersion-cooling substrate by skiving, and further include at least one functional fin. The functional fin is a single continuous fin extends lengthwise in a vapor bubbles evacuation direction, has a central portion corresponding in position to the heat source and upper and lower end portions located away from the heat source, and a height of the central portion is greater than at least one of a height of the upper and lower end portions.

Abstract: A two-phase immersion-cooling heat-dissipation structure having skived fins includes an immersion-cooling substrate and a plurality of immersion-cooling fins. The immersion-cooling substrate has a top surface and a bottom surface that are opposite to each other, the bottom surface is used for contacting a heat-generating component immersed in a two-phase coolant, the top surface is connected with the plurality of immersion-cooling fins, the plurality of immersion-cooling fins include at least one skived fin integrally formed on the top surface of the immersion-cooling substrate, and the plurality of immersion-cooling fins are non-linearly arranged. A thickness of any one of the plurality of immersion-cooling fins ranges from 0.1 mm to 0.35 mm, a height of any one of the plurality of immersion-cooling fins ranges from 5 mm to 10 mm, and a gap between any two of the plurality of immersion-cooling fins ranges from 0.1 mm to 0.35 mm.

Abstract: A semiconductor structure includes a fin protruding from a substrate, a first and a second metal gate stacks disposed over the fin, and a dielectric feature defining a sidewall of each of the first and the second metal gate stacks. Furthermore, the dielectric feature includes a two-layer structure, where sidewalls of the first layer are defined by the second layer, and where the first and the second layers have different compositions.

Abstract: An optoelectronic semiconductor device is provided. The optoelectronic semiconductor device includes a substrate, a semiconductor stack located on the substrate; a first trench and a second trench provided in the semiconductor stack; a first insulating layer filling in the first trench and covering the semiconductor stack; a first metal layer covering the first insulating layer; a second metal layer covering the first insulating layer; and a second insulating layer located between the first metal layer and the first insulating layer, and between the second metal layer and the first insulating layer. A part of the second trench is uncovered by the first insulating layer and the second insulating layer.