Abstract: A semiconductor device has an external wiring for GND formed over an underside surface of a wiring substrate. A plurality of via holes connecting to the external wiring for GND are formed to penetrate the wiring substrate. A first semiconductor chip of high power consumption, including HBTs, is mounted over a principal surface of the wiring substrate. The emitter bump electrode of the first semiconductor chip is connected in common with emitter electrodes of a plurality of HBTs formed in the first semiconductor chip. The emitter bump electrode is extended in a direction in which the HBTs line up. The first semiconductor chip is mounted over the wiring substrate so that a plurality of the via holes are connected with the emitter bump electrode. A second semiconductor chip lower in heat dissipation value than the first semiconductor chip is mounted over the first semiconductor chip.

Abstract: In a semiconductor device using an emitter top heterojunction bipolar transistor having a planar shape in a ring-like shape, a structure is provided in which a base electrode is present only on an inner side of a ring-like emitter-base junction region. This allows reduction of base/collector junction capacitance per unit emitter area, whereby a semiconductor device having high power adding efficiency and high power gain suitable for a power amplifier can be realized. Further, in a multistage power amplifier including first and second amplifier circuits each having one or more of bipolar transistors, a bipolar transistor in the first amplifier circuit uses an emitter having a planar shape in a rectangular shape, and a bipolar transistor in the second amplifier circuit uses an emitter having a ring-like shape and a base electrode only on the inner side of the emitter.

Abstract: A heterojunction bipolar transistor with InGaP as the emitter layer and capable of both reliable electrical conduction and thermal stability wherein a GaAs layer is inserted between the InGaP emitter layer and AlGaAs ballast resistance layer, to prevent holes reverse-injected from the base layer from diffusing and reaching the AlGaAs ballast resistance layer.

Abstract: The invention is directed to improve resistance to destruction of a semiconductor device. A protection circuit having a plurality of bipolar transistors which are Darlington connected between outputs (collector and emitter) of an amplification circuit of a high output is electrically connected in parallel with the amplification circuit. The amplification circuit has a plurality of unit HBTs (Heterojunction Bipolar Transistors) which are connected in parallel with each other. The protection circuit has a two-stage configuration including a first group of a protection circuit having a plurality of bipolar transistors Q1 to Q5 and a second group of a protection circuit having a plurality of bipolar transistors.

Abstract: A first aspect of the invention is to realize a power amplifier having high power adding efficiency and high power gain at low cost. For that purpose, in a semiconductor device using an emitter top heterojunction bipolar transistor formed above a semiconductor substrate and having a planar shape in a ring-like shape, a structure is provided in which a base electrode is present only on an inner side of a ring-like emitter-base junction region. In this way, as a result of enabling to reduce base/collector junction capacitance per unit emitter area without using a collector top structure having complicated fabricating steps, a semiconductor device having high power adding efficiency and high-power gain and suitable for a power amplifier can be realized.

Abstract: A multilayer wiring board having board having through holes in a thickness-wise direction, in which wiring board a semiconductor substrate mounted on the multi-layer wiring board has through holes in a thickness-wise direction, and entire areas, which the through holes in the semiconductor substrate occupy, in a plane orthogonal to the thickness-wise direction of the multilayer wiring board and of the semiconductor substrate are included in areas, which the through holes in the multilayer wiring board occupy.

Abstract: A semiconductor device has a lattice-mismatched crystal structure including a semiconductor film formed on a substrate with an intervening buffer layer. The buffer layer has a plurality of layers, including first sublayers, or regions, in which an element that controls the lattice constant is provided in increasing mole fraction, and second sublayers, or regions, in which the lattice constant is maintained. The first sublayers and second sublayers are provided in alternating fashion. The resulting device has an increased electron mobility as compared with the prior art.

Abstract: An electronic circuit is provided with a first field effect transistor and a second field effect transistor, in which a drain of the first field effect transistor connected to a source of the second field effect transistor. This electronic circuit inputs a first signal to a gate electrode of the first field effect transistor, inputs a second signal to a gate electrode of the second field effect transistor and outputs a signal from a drain of the second field effect transistor. This electronic circuit is a cascode circuit related to the current drivability of the second field effect transistor is set to be larger than the current drivability of the first field effect transistor, and there is an effect that third-order or higher order distortion characteristics of a cascode type or dual-gate circuit can be reduced.

Abstract: Disclosed is a semiconductor device including a heterojunction bipolar transistor in which the front surface of a base layer and the surface of an emitter-base junction are covered with a high-resistivity layer of compound semiconductor containing at least one constituent element common to an emitter layer and the base layer.

Abstract: 2A heterojunction bipolar transistor is disclosed in which a region of a base layer which extends in the vicinity of the interface between the base layer and an emitter layer is doped with an impurity at a higher concentration than that in the inside of the base layer to thereby form a built-in field by which carriers injected from the emitter are caused to drift to the inside of the base layer. In the transistor having this structure, the current gain does not depend on the emitter area, and it is possible to obtain a large current gain with a small emitter area.

Abstract: A method of manufacturing a target of an image pickup tube comprising the steps of: forming a plurality of groups of transparent conductive signal electrodes on a transparent insulating base plate; forming a first layer on at least a portion constituting an image area of the image pickup tube, said first layer being substantially insoluble in etching liquid used for etching an insulating layer to constitute an intermediate layer insulator in a double layered interconnection structure; forming, after formation of said first layer, an insulating layer to constitute said intermediate-layer insulator; removing a predetermined portion of said insulating layer, removing said first layer together with said insulating layer located thereon; forming bus bars; and forming a photoconductive layer on said plurality of groups of the transparent conductive signal electrodes.This invention provides an excellent method for mass production.