Patents by Inventor Cissy Leung

Cissy Leung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4892753
    Abstract: A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor includes cooperating arrays of interdigitated susceptor and wafer support fingers which collectively remove the wafer from a robot transfer blade and position the wafer with variable, controlled, close parallel spacing between the wafer and the chamber gas inlet manifold, then return the wafer to the blade. A combined RF/gas feed-through device protects against process gas leaks and applies RF energy to the gas inlet manifold without internal breakdown or deposition of the gas. The gas inlet manifold is adapted for providing uniform gas flow over the wafer.
    Type: Grant
    Filed: October 26, 1988
    Date of Patent: January 9, 1990
    Assignee: Applied Materials, Inc.
    Inventors: David N. Wang, John M. White, Kam S. Law, Cissy Leung, Salvador P. Umotoy, Kenneth S. Collins, John A. Adamik, Ilya Perlov, Dan Maydan
  • Patent number: 4872947
    Abstract: A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. A low temperature CVD process for forming a highly conformal layer of silicon dioxide is also disclosed. The process uses very high chamber pressure and low temperature, and TEOS and ozone reactants. The low temperature CVD silicon dioxide deposition step is particularly useful for planarizing underlying stepped dielectric layers, either along or in conjunction with a subsequent isotropic etch.
    Type: Grant
    Filed: October 26, 1988
    Date of Patent: October 10, 1989
    Assignee: Applied Materials, Inc.
    Inventors: David N. Wang, John M. White, Kam S. Law, Cissy Leung, Salvador P. Umotoy, Kenneth S. Collins, John A. Adamik, Ilya Perlov, Dan Maydan