Patents by Inventor Claude Gauthier

Claude Gauthier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070036020
    Abstract: An IO method and system for bit-deskewing are described. Embodiment includes a computer system with multiple components that transfer data among them. In one embodiment, a system component receives a forward strobe signal and multiple data bit signals from a transmitting component. The receiving component includes a forward strobe clock recovery circuit configurable to align a forward strobe sampling clock so as to improve sampling accuracy. The receiving component further includes at least one data bit clock recovery circuit configurable to align a data bit sampling clock so as to improve sampling accuracy, and to receive a signal from the forward strobe clock recovery circuit that causes the data bit sampling clock to track the forward strobe sampling clock during system operation.
    Type: Application
    Filed: August 1, 2005
    Publication date: February 15, 2007
    Inventors: Edward Lee, Arvind Bomdica, Lin Chen, Claude Gauthier, Sam Huynh, Hiok-Tiaq Ng, John Ling, Jennifer Ho, Siji M.K., Gin Yee, Joseph Macri
  • Publication number: 20060272475
    Abstract: A percussion instrument generally comprises a resonance body with at least two ends presenting surfaces not facing each other and a relative angular relationship between each surface of the resonance body, the surface being of course a membrane onto which the percussion is effected.
    Type: Application
    Filed: May 24, 2006
    Publication date: December 7, 2006
    Inventor: Claude Gauthier
  • Patent number: 7107475
    Abstract: A digital delay locked loop uses a delay array to delay an input signal by an amount indicated by a delay code. A phase of the resulting delayed signal is compared to a corresponding phase of the input signal, and dependent on the comparison, the delay code is updated to indicate whether the delay array needs to provide more delay or less delay. The digital delay locked loop also uses a detection circuit that monitors for a predetermined condition of the delay code. In response to detection of the predetermined condition, the delay code is automatically reset to a value different than a value of the delay code present at a previous reset or initial startup of the digital delay locked loop.
    Type: Grant
    Filed: October 21, 2003
    Date of Patent: September 12, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Brian Amick, Dong Joon Yoon, Tri Tran, Gajendra Singh, Aparna Ramachandran, Claude Gauthier
  • Patent number: 7001497
    Abstract: A spent anode is replaced with a new anode in an electrolysis cell having an anode bus bar and an anode rod contacting the bus bar. A desired distance (D4) from the bus bar to a reference point on or adjacent to an anode rod for the new anode is calculated, the spent anode is replaced with a new anode so that the reference point on the new anode rod is spaced from the bus bar by an actual distance (D5), and the actual distance (D5) is measured at least once by means of a vision system. The actual distance (D5) is preferably adjusted using a feedback control loop in a computer so that D5 approaches the desired distance (D4).
    Type: Grant
    Filed: April 25, 2003
    Date of Patent: February 21, 2006
    Assignee: Alcoa,Inc.
    Inventors: Jean Pierre Gagné, Gilles Dufour, Bertrand St-Laurent, Claude Gauthier, Jacques Denis, Robin Boulianne, Pierre Bouchard, Jacques Pelletier
  • Publication number: 20050168255
    Abstract: A method and apparatus for compensating for age related degradation in the performance of integrated circuits. In one embodiment, the phase-locked loop (PLL) charge pump is provided with multiple legs that can be selectively enabled or disabled to compensate for the effects of aging. In an alternate embodiment, the power supply voltage control codes can be increased or decreased to compensate for aging effects. In another embodiment, a ring oscillator is used to approximate the effects of NBTI. In this embodiment, the frequency domain is converted to time domain using digital counters and programmable power supply control words are used to change the operating parameters of the power supply to compensate for aging effects.
    Type: Application
    Filed: February 4, 2004
    Publication date: August 4, 2005
    Inventors: Claude Gauthier, Pradeep Trivedi, Raymond Heald, Gin Yee
  • Patent number: 6909203
    Abstract: A method and apparatus for regulating resonance in a computer system I/O interface is provided. A shunting impedance/resistance is arranged across a power supply of the I/O interface. The shunting impedance/resistance is controlled by circuitry that is arranged to detect voltage overshoot conditions in the I/O interface. The circuitry has (1) an analog front end that is arranged to detect power supply oscillations relative to a grounded terminal, (2) an amplifier (or logic conversion circuit) that is arranged to convert an output signal from the analog front end to a digital signal, and (3) a shunting apparatus arranged to modify power supply behavior in the I/O interface dependent on the digital signal.
    Type: Grant
    Filed: February 3, 2003
    Date of Patent: June 21, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: Claude Gauthier, Brian Amick, Aninda Roy
  • Publication number: 20050127980
    Abstract: A system and method of adjusting a sense amplifier includes providing an amplification control parameter to the sense amplifier. A temperature of the sense amplifier is monitored and the amplification control parameter to the sense amplifier is adjusted according to the temperature of the sense amplifier.
    Type: Application
    Filed: February 4, 2005
    Publication date: June 16, 2005
    Applicant: Sun Microsystems, Inc
    Inventors: Claude Gauthier, Shaishav Desai, Raymond Heald
  • Publication number: 20050114061
    Abstract: A temperature monitoring technique that eliminates the need for bipolar devices. In one embodiment of the present invention, a long-channel MOS transistor is configured in a diode connection to sense change in temperature. The diode drives a linear regulator and an oscillator. The oscillator in turn drives a counter, which counts pulses for a fixed period of time. The system clock on the chip is used as a temperature-independent frequency to generate a count. The temperature-dependent frequency is counted for a fixed number of system clock cycles. The present invention eliminates band gap circuitry currently used in most thermal sensing devices to provide a temperature-independent reference.
    Type: Application
    Filed: November 10, 2003
    Publication date: May 26, 2005
    Inventors: Claude Gauthier, Gin Yee
  • Patent number: 6882196
    Abstract: A device that uses an input clock signal to generate an output clock signal with a desired frequency is provided. The device uses a voltage controlled delay element that outputs a reset signal to a flip-flop dependent on a bias signal and the input clock signal. When triggered, the flip-flop outputs a transition on the output clock signal, which, in turn, serves as an input to a duty cycle corrector that generates the bias signal dependent on the configuration of the duty cycle corrector. The duty cycle corrector may be configured to generate the bias signal so as to be able to operatively control the duty cycle of the output clock signal.
    Type: Grant
    Filed: July 18, 2002
    Date of Patent: April 19, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: Gin Yee, Sudhakar Bobba, Claude Gauthier, Dean Liu, Lynn Ooi, Pradeep Trivedi
  • Patent number: 6861885
    Abstract: A phase locked loop design uses a diode operatively connected to a loop filter capacitor to control a leakage current of the loop filter capacitor. By positioning a diode in series with the loop filter capacitor, a voltage potential across the loop filter capacitor is reduced, thereby reducing the leakage current of the loop filter capacitor. Moreover, the leakage current of the loop filter capacitor is controlled in that it cannot exceed the current through the diode. Control and reduction of the loop filter capacitor leakage current leads to more reliable and stable phase locked loop behavior.
    Type: Grant
    Filed: July 19, 2002
    Date of Patent: March 1, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: Pradeep Trivedi, Sudhakar Bobba, Claude Gauthier
  • Patent number: 6822345
    Abstract: A method and apparatus for reducing an impedance of a power supply path of an integrated circuit is provided. The power supply path includes a first power supply line and a second power supply line to provide power to the integrated circuit. At least one resistive element connected between the first power supply line and the second power supply line is adjusted to reduce the impedance of the power supply path.
    Type: Grant
    Filed: April 9, 2002
    Date of Patent: November 23, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Claude Gauthier, Brian Amick
  • Publication number: 20040226430
    Abstract: The basic premise of this invention is to describe and reduce to practice a phenomena by which a string—which is generally known as a singular straight line having a certain tension, diameter and length that produces a vibration—can, when put in a network consisting of a plurality of strings connected together at one or more junction points and radiating therefrom, create a new entity known as a <<network of strings>> which has new vibrating properties. As the vibration, in the form of a wave, travels through a first segment of the network, it splits at the first junction point met where it will travel onto at least one other string but preferably two or more strings.
    Type: Application
    Filed: May 12, 2004
    Publication date: November 18, 2004
    Inventors: Samuel Gaudet, Claude Gauthier
  • Patent number: 6819192
    Abstract: A method for estimating jitter in a phase locked loop is provided. The estimation is determined from a simulation that uses a representative power supply waveform having noise as an input. Further, a computer system for estimating jitter in a phase locked loop is provided. Further, a computer-readable medium having recorded thereon instructions adapted to estimate jitter in a phase locked loop is provided.
    Type: Grant
    Filed: February 14, 2002
    Date of Patent: November 16, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Claude Gauthier, Brian Amick, Dean Liu, Pradeep Trivedi
  • Patent number: 6815986
    Abstract: A delay locked loop implementing design-for-test features to test for, among other, stuck-at-faults is provided. The delay locked loop uses multiplexers as design-for-test devices for controllability purposes and flip-flops as design-for-test devices for observability purposes. Such implementation of design-for-test features within a delay locked loop allows for pre-packaging delay locked loop verification and testing.
    Type: Grant
    Filed: July 16, 2002
    Date of Patent: November 9, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Aninda Roy, Claude Gauthier, Brian Amick, Dean Liu
  • Publication number: 20040211663
    Abstract: A spent anode is replaced with a new anode in an electrolysis cell having an anode bus bar and an anode rod contacting the bus bar. A desired distance (D4) from the bus bar to a reference point on or adjacent to an anode rod for the new anode is calculated, the spent anode is replaced with a new anode so that the reference point on the new anode rod is spaced from the bus bar by an actual distance (D5), and the actual distance (D5) is measured at least once by means of a vision system. The actual distance (D5) is preferably adjusted using a feedback control loop in a computer so that D5 approaches the desired distance (D4).
    Type: Application
    Filed: April 25, 2003
    Publication date: October 28, 2004
    Inventors: Jean Pierre Gagne, Gilles Dufour, Bertrand St-Laurent, Claude Gauthier, Jacques Denis, Robin Boulianne, Pierre Bouchard, Jacques Pelletier
  • Patent number: 6809557
    Abstract: An apparatus that uses a linear voltage regulator to reject power supply noise in a temperature sensor is provided. Further, a method for using a linear voltage regulator to reject power supply noise in a temperature sensor is provided. Further, a method and apparatus that uses a differential amplifier with a source-follower output stage as a linear voltage regulator for a temperature sensor is provided.
    Type: Grant
    Filed: February 19, 2002
    Date of Patent: October 26, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Claude Gauthier, Spencer Gold, Dean Liu, Kamran Zarrineh, Brian Amick, Pradeep Trivedi
  • Patent number: 6806698
    Abstract: A method and apparatus that uses the difference between two nodal voltages, such as a temperature-independent voltage and a temperature-dependent voltage, to determine the actual temperature at a point on an integrated circuit is provided. Further, a method and apparatus that converts a difference between nodal voltages in an integrated circuit from an analog to a digital quantity on the integrated circuit such that the difference in voltage may be used by an on-chip digital system is provided. Further, a method and apparatus for quantifying a difference in voltage between a first node and a second node of a temperature sensor is provided.
    Type: Grant
    Filed: February 19, 2002
    Date of Patent: October 19, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Claude Gauthier, Brian Amick, Spencer Gold, Dean Liu, Kamran Zarrineh, Pradeep Trivedi
  • Patent number: 6784752
    Abstract: A phase locked loop that includes a receiver that is adjustable to substantially match delay of a system clock and a feedback clock at an input of the phase locked loop is provided. The receiver employs system clock path circuitry to input the system clock and feedback clock path circuitry to input the feedback clock, where current flow and load resistances associated with the system clock path circuitry and current flow and load resistances associated with the feedback clock path circuitry are responsive to one or more bias signals that are adjustable using one or more adjustment circuits that are operatively connected to the receiver. The control of the one or more bias signals via the one or more adjustment circuits facilitates the generation of substantially delay matched system and feedback clocks.
    Type: Grant
    Filed: April 24, 2002
    Date of Patent: August 31, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Claude Gauthier, Brian Amick, Pradeep Trivedi, Dean Liu
  • Patent number: 6778027
    Abstract: A phase locked loop that includes a receiver circuit for matching delays of a system clock and a feedback clock at an input of the phase locked loop is provided. The receiver circuit employs system clock path circuitry to input the system clock and feedback clock path circuitry to input the feedback clock, where current flow and load resistances associated with the system clock path circuitry and current flow and load resistances associated with the feedback clock path circuitry control the generation of substantially delay matched system and feedback clocks.
    Type: Grant
    Filed: April 12, 2002
    Date of Patent: August 17, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Claude Gauthier, Pradeep Trivedi, Brian Amick
  • Patent number: 6775638
    Abstract: A temperature sensor adapted to produce a temperature-independent voltage and temperature-dependent voltage dependent on an internal control signal, generated within the temperature sensor, adjustable by an adjustment circuit operatively connected to the temperature sensor is provided. The adjustment circuit is controllable to adjust the internal control signal in order to modify an operating characteristic of the temperature sensor.
    Type: Grant
    Filed: April 24, 2002
    Date of Patent: August 10, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Claude Gauthier, Brian Amick, Spencer Gold, Pradeep Trivedi, Lynn Ooi