Abstract: The invention relates to a circuit for highly efficient driving of piezoelectric loads, comprising a linear driving circuit portion connected to the load through an inductive-resistive connection whereto a voltage waveform is applied. Advantageously, the circuit comprises further respective circuit portions, structurally independent, connected in turn to the inductive-resistive connection through respective inductors to supply a considerable fraction of the overall current required by the load in the transient and steady state respectively.

Abstract: The invention relates to a circuit for highly efficient driving of piezoelectric loads, comprising a linear driving circuit portion connected to the load through an inductive-resistive connection whereto a voltage waveform is applied. Advantageously, the circuit comprises further respective circuit portions, structurally independent, connected in turn to the inductive-resistive connection through respective inductors to supply a considerable fraction of the overall current required by the load in the transient and steady state respectively.

Abstract: The invention relates to a circuit for highly efficient driving of piezoelectric loads, comprising a linear driving circuit portion connected to the load through an inductive-resistive connection whereto a voltage waveform is applied. Advantageously, the circuit comprises further respective circuit portions, structurally independent, connected in turn to the inductive-resistive connection through respective inductors to supply a considerable fraction of the overall current required by the load in the transient and steady state respectively.

Abstract: A circuit for driving capacitive loads in a highly efficient manner. In one embodiment, a drive portion is connected to at least one end of a capacitive electric load being applied a voltage waveform. The embodiment further comprises a switching circuit portion having its output connected to the above one end of the capacitive load in order to supply a fraction of the overall current demanded by the load. Additionally, a switching circuit and accompanying switching method provide for efficiently supplying peak current to the capacitive load during voltage fluctuation in the voltage waveform. Briefly, the invention is a circuit arrangement aimed at providing a highly efficient drive for the capacitive load, using a combined linear/switching setup and without distorting the quality of the waveform generated across the capacitive load.

Abstract: The invention relates to a circuit for highly efficient driving of piezoelectric loads, comprising a linear driving circuit portion connected to the load through an inductive-resistive connection whereto a voltage waveform is applied. Advantageously, the circuit comprises further respective circuit portions, structurally independent, connected in turn to the inductive-resistive connection through respective inductors to supply a considerable fraction of the overall current required by the load in the transient and steady state respectively.

Abstract: A circuit for driving capacitive loads in a highly efficient manner. In one embodiment, a drive portion is connected to at least one end of a capacitive electric load being applied a voltage waveform. The embodiment further comprises a switching circuit portion having its output connected to the above one end of the capacitive load in order to supply a fraction of the overall current demanded by the load. Additionally, a switching circuit and accompanying switching method provide for efficiently supplying peak current to the capacitive load during voltage fluctuation in the voltage waveform. Briefly, the invention is a circuit arrangement aimed at providing a highly efficient drive for the capacitive load, using a combined linear/switching setup and without distorting the quality of the waveform generated across the capacitive load.

Abstract: A charging circuit for a bootstrap capacitance employing an integrated LDMOS transistor and including a circuital device for preventing the turning on a parasitic transistors of the integrated LDMOS structure during transients that comprises a plurality of directly biased junctions (D1, D2, . . . , Dn) connected in series between a source and a body of the LDMOS transistor structure and at least a current generator, tied to ground potential, coupled between said body and ground, has at least one switch (INT1) between said source and a first junction (D1) of said plurality of junctions and a limiting resistance (R) connected between the body and the current generator (GEN). The switch (INT1) is kept open during a charging phase of the bootstrap capacitance (Cboot) and is closed when the charge voltage (Vboot) of the bootstrap capacitance reaches a preset threshold.

Abstract: The need of implementing a second local oscillator in addition to the drive oscillator, for timing the different phases of the starting process of a half-bridge or bridge stage driving an external load, such as a fluorescent lamp, is avoided by employing a timing counter to count the number of oscillations produced by the drive oscillator, and a digital-to-analog converter for controlling the frequency of oscillation of the drive oscillator.

Abstract: The resin sealing layer enclosing the device is biased to a low voltage by means of an anchoring structure formed close to high-voltage contact pads. The anchoring structure is formed by a metal region deposited on the surface of the device and contacting the resin layer, and by a deep region extending from the surface of the device, beneath the metal region, to the substrate. The electrical field in the resin layer is confined between the high-voltage pads and the anchoring structure and prevented from generating polarity inversions in the semiconductor material at the low-voltage contact pads or any other points at which the resin layer contacts the body of semiconductor material.

Abstract: A circuit for detecting voltage variations in relation to a set value, for devices, such as a power supply circuit, comprising an error amplifier fed back by a compensating capacitor which, under steady state operating conditions, is not supplied with current, and, in the presence of transient output voltage (V.sub.o) of the device, is supplied with current (DI) proportional to the variation in voltage, the circuit comprising a current sensor connected to the compensating capacitor for detecting the current (DI) through the same; and the output signal of the sensor preferably being supplied to a circuit for limiting the variation in output voltage which, in the event the voltage variation exceeds a given threshold value (V.sub.R1), activates a control stage connected to the output of the device.

Abstract: A control circuit for a power transistor, connected between two supply terminals in series with a load. The control circuit comprises a control logic circuit which produces a signal at two levels with respect to a reference terminal, a level shifter connected between the control circuit and the power transistor, which produces a signal at two levels relative to the node between the power transistor and the load. The level shifter comprises a flip-flop the output of which controls the power transistor, and an electronic switch, for example a MOSFET transistor, connected between the "set" input of the flip-flop and the node and controlled by the "reset" input of the flip-flop in such a way as to be closed when the "reset" input is greater, by a predetermined value, than that of the node. The electronic switch prevents the parasitic current flowing through the set and reset inputs from erroneously switching the power transistor.

Abstract: A circuit for controlling a power transistor connected in series with a load. The circuit comprises a control logic circuit which produces a signal at two levels with respect to a reference terminal, a level shifter connected between the control circuit and the power transistor, and which produces a signal at two levels referred to the node between the power transistor and the load. The level shifter includes a flip-flop the output of which controls the power transistor as well as two transistors driven by the control logic circuit to switch alternately and provide switching signals on the "set" and "reset" inputs of the flip-flop via two resistors. Two parasitic current generators inject current into the two resistors during the phase in which the power transistor is cut off. To prevent this current from causing unwanted switching of the flip-flop, a resistor connected to the "set" terminal of the flip-flop has a lower resistance than that of the other resistor.

Abstract: A power supply in which control of the switch-on instant of a power device of a boost-circuit (operating in a discontinuous mode) is implemented by monitoring the current which actually flows through the "fly-back" inductance. The current is monitored on a sensing resistance, and, by the use of a comparator, a signal is produced for enabling/disabling the transfer to an input of a PWM driving circuit of a switch-on signal produced by a null detector. This configuration provide good noise immunity, which is particularly useful in power-factor-correction applications, and reduced power dissipation.

Abstract: A level shifter, particularly suited for driving power stages for supplying power to integrated circuits, includes a DMOS transistor (40) which is driven by a digital signal source (42) and has a load resistor (44) as its drain load. A shifted output signal develops at the ends of said load resistor. The drain (V1) of the DMOS transistor is connected to the input of an inverter (46), while a Zener diode (54) and a second transistor (52) are connected in parallel with the load resistor (44), the gate of the second transistor (52) being driven by the output of the inverter (46). The output of the inverter (46) can be connected to the input of a drive stage (48), the output of which drives a power stage (50) for supplying power to an integrated circuit.

Abstract: A driving circuit for driving a floating circuit (28) responsive to a digital signal (IN) includes two DMOS transistors (10, 12) which are driven in opposite phase on their respective gates starting from the digital signal. The two DMOS transistors are biased by a current source which is formed by a current mirror (16, 18), which mirrors a reference current (I.sub.BIAS), and by an auxiliary circuit (34-44) for injecting an additional current pulse during switching. Two MOS transistors (20, 22) serve as the respective loads for the two DMOS transistors. The MOS transistors can be P-channel transistors, in which event the gate of each MOS transistor (20, 22) can be connected to the drain of the other MOS transistor. Two Zener diodes (24, 26) can be employed to limit the voltage between the gate and source of the respective MOS transistor. The driving output of the floating circuit (28) can be the drain of one of the DMOS transistors.

Abstract: This device for generating a reference voltage for a capacitive bootstrap circuit of an output stage can be easily integrated. The output stage comprises a driving block, a capacitive bootstrap circuit and a reference voltage generating block generating a floating reference voltage which is referred to the output voltage signal and switches in accordance thereto.

Abstract: A series of Zener diodes (25) and an electronic power switch, such as an IGBT (18), are connected across a power supply. A circuit including a resistor (20) in series on the electronic switch, a threshold device (36, 38) connected to the resistor and a ramp generator with multiplier (40, 42, 44, 46, FIG. 2) or a thermal sensor (50, 44, 46 FIG. 3) detect the energy level dissipated in the electronic power switch when a transient occurs when the level exceeds a present value, the circuit supplies an output signal to a monostable circuit (26, 28, 48) to drive the electronic power switch with low resistance conditions for a preset time starting from the occurrence of the output signal. Another threshold device, connected to a resistor (30, 32), preferably senses the instantaneous power dissipated in the electronic switch to control the monostable circuit when the instantaneous power is higher than a preset threshold.

Abstract: The circuit comprises a tank capacitance and a charge circuit supplied with the same voltage as the bridge and comprising an inductance and a control transistor. There is also provided a control circuit, which comprises an oscillator controlling the periodic switching of control transistor and a comparator which controls the momentary clamping of control transistor in the condition wherein the charge circuit is interrupted when the difference between the voltage across capacitance and the power supply voltage exceeds a preset maximum value and the unclamping of the same transistor when such difference falls below a preset minimum value. A further comparator similarly clamps control transistor if there is an excess current in the transistor itself.

Abstract: The circuit comprises a tank capacitance and a charge circuit supplied with the same voltage as the bridge and comprising an inductance and a control transistor. There is also provided a control circuit, which comprises an oscillator controlling the periodic switching of control transistor and a comparator which controls the momentary clamping of control transistor in the condition wherein the charge circuit is interrupted when the difference between the voltage across capacitance and the power supply voltage exceeds a present maximum value and the unclamping of the same transistor when such difference falls below a preset minimum value. A further comparator similarly clamps control transistor if there is an excess current in the transistor itself.

Abstract: This device for generating a reference voltage for a capacitive bootstrap circuit of an output stage can be easily integrated. The output stage comprises a driving block, a capacitive bootstrap circuit and a reference voltage generating block generating a floating reference voltage which is referred to the output voltage signal and switches in accordance thereto.