Abstract: Some embodiments include a method of forming an integrated structure. An assembly is formed to include a stack of alternating first and second levels. The first levels have insulative material, and the second levels have voids which extend horizontally. The assembly includes channel material structures extending through the stack. A first metal-containing material is deposited within the voids to partially fill the voids. The deposited first metal-containing material is etched to remove some of the first metal-containing material from within the partially-filled voids. Second metal-containing material is then deposited to fill the voids.

Abstract: Some embodiments include a method of forming an assembly (e.g., a memory array). A first opening is formed through a stack of alternating first and second levels. The first levels contain silicon nitride, and the second levels contain silicon dioxide. Some of the silicon dioxide of the second levels is replaced with memory cell structures. The memory cell structures include charge-storage regions adjacent charge-blocking regions. Tunneling material is formed within the first opening, and channel material is formed adjacent the tunneling material. A second opening is formed through the stack. The second opening extends through remaining portions of the silicon dioxide, and through the silicon nitride. The remaining portions of the silicon dioxide are removed to form cavities. Conductive regions are formed within the cavities. The silicon nitride is removed to form voids between the conductive regions. Some embodiments include memory arrays.

Abstract: A method of forming an array of elevationally-extending strings of memory cells comprises forming conductively-doped semiconductor material directly above and electrically coupled to metal material. A stack comprising vertically-alternating insulative tiers and wordline tiers is formed directly above the conductively-doped semiconductor material. Horizontally-elongated trenches are formed through the stack to the conductively-doped semiconductor material. The conductively-doped semiconductor material is oxidized through the trenches to form an oxide therefrom that is directly above the metal material. Transistor channel material is provided to extend elevationally along the alternating tiers. The wordline tiers are provided to comprise control-gate material having terminal ends corresponding to control-gate regions of individual memory cells. Charge-storage material is between the transistor channel material and the control-gate regions.

Abstract: Some embodiments include a method of forming an integrated structure. An assembly is formed to include a stack of alternating first and second levels. The first levels have insulative material, and the second levels have voids which extend horizontally. The assembly includes channel material structures extending through the stack. A first metal-containing material is deposited within the voids to partially fill the voids. The deposited first metal-containing material is etched to remove some of the first metal-containing material from within the partially-filled voids. Second metal-containing material is then deposited to fill the voids.

Abstract: A method of forming an array of elevationally-extending strings of memory cells comprises forming conductively-doped semiconductor material directly above and electrically coupled to metal material. A stack comprising vertically-alternating insulative tiers and wordline tiers is formed directly above the conductively-doped semiconductor material. Horizontally-elongated trenches are formed through the stack to the conductively-doped semiconductor material. The conductively-doped semiconductor material is oxidized through the trenches to form an oxide therefrom that is directly above the metal material. Transistor channel material is provided to extend elevationally along the alternating tiers. The wordline tiers are provided to comprise control-gate material having terminal ends corresponding to control-gate regions of individual memory cells. Charge-storage material is between the transistor channel material and the control-gate regions.