Abstract: Provided are a display panel and a display apparatus. The display panel includes: a first display area and a second display area, a transmittance of the first display area is greater than a transmittance of the second display area; the first display area includes a plurality of built-in light-emitting devices and at least one first driving circuit, the plurality of built-in light-emitting devices include a first light-emitting device and a second light-emitting device, the first driving circuit is connected to the first light-emitting device, the second display area includes at least one third light-emitting device and a plurality of external driving circuits, the plurality of external driving circuits include a second driving circuit and a third driving circuit, the second driving circuit is connected to the second light-emitting device through a lead wire, and the third driving circuit is connected to the third light-emitting device.

Abstract: A display substrate includes a base substrate, a plurality of sub-pixels and a first scanning line, the subpixel includes a subpixel driving circuit including a driving transistor and a compensation transistor, a gate electrode of the compensation transistor is coupled to a corresponding first scanning line, a first/second electrode of the compensation transistor is coupled to a second/gate electrode of the driving transistor, the compensation transistor includes a compensation active layer including a first channel portion, a second channel portion and a first conductor portion, the first conductor portion is respectively coupled to the first channel portion and the second channel portion; at least part of an orthographic projection of the first conductor portion on the base substrate is located between an orthographic projection of the first scanning line on the base substrate and the orthographic projection of the gate electrode of the driving transistor on the base substrate.

Abstract: A display panel and an display apparatus are provided, the display panel includes at least two adjacent pixel driving circuits including a first and a second pixel driving circuits distributed along the first direction; a first conductive layer between the first active layer and the second conductive layer, the first conductive layer including an enabling signal line with an orthographic projection extending along the first direction and covering an orthographic projection of the fifth active portion, a partial structure of the enabling signal line forming a gate of the fifth transistor; a fourth conductive layer located between a second and a fifth conductive layers and including a first bridging portion which is connected to eighth active portions of the first and second pixel driving circuits, as well as a power line through a via hole, respectively.

Abstract: An electronic signature system includes an information processing device, an information processing device which is higher in processing speed than the information processing device, the information processing device acquires a message, generates a digest from the message, and transmits the digest to the information processing device, the information processing device receives the digest from the information processing device, generates an electronic signature from the digest, and transmits the electronic signature to the information processing device, and the information processing device receives the electronic signature from the information processing device, adds the electronic signature to the message, and outputs the message with the electronic signature added.

Abstract: A display panel and an display apparatus are provided, the display panel includes at least two adjacent pixel driving circuits including a first and a second pixel driving circuits distributed along the first direction; a first conductive layer between the first active layer and the second conductive layer, the first conductive layer including an enabling signal line with an orthographic projection extending along the first direction and covering an orthographic projection of the fifth active portion, a partial structure of the enabling signal line forming a gate of the fifth transistor; a fourth conductive layer located between a second and a fifth conductive layers and including a first bridging portion which is connected to eighth active portions of the first and second pixel driving circuits, as well as a power line through a via hole, respectively.

Abstract: An audio synthesis method, an electronic device, and a non-transitory computer readable storage medium. The method includes: in response to obtaining a text to be processed, inserting a colloquial expression content into the text to be processed and obtaining a colloquialized text, where the colloquial expression content at least includes a colloquial additional content and a colloquial pause interval; acquiring a prosodic feature of the colloquialized text and obtaining a prosodic pause interval of the colloquialized text based on the prosodic feature; and converting the colloquialized text into a target audio based on the colloquial pause interval and the prosodic pause interval.

Abstract: A bowl-shaped permanent magnet brushless direct-current motor, including a bowl-shaped stator core and a plurality of permanent magnets; wherein, the bowl-shaped stator core includes a stator yoke portion and a plurality of bent teeth; a height difference exists between a tooth shoe of the bent tooth and a plane on which the stator yoke portion is located, and the tooth shoe of the bent tooth is located at the same height as the permanent magnet in an axial direction, so that an armature magnetic flux path is located at the same height as a permanent magnet excitation magnetic flux path, thereby implementing an unobstructed magnetic flux path.

Abstract: Embodiments of the present disclosure provide a display substrate and a display device. The display substrate includes a base substrate, a driving circuit layer on the base substrate, a light-emitting structure layer on a side of the driving circuit layer away from the base substrate, and a shield electrode layer on a side of the driving circuit layer proximal to the base substrate. The light-emitting structure layer includes a plurality of light-emitting devices. The driving circuit layer includes a plurality of pixel driving circuits. At least part of transistors in each of the pixel driving circuits are oxide thin film transistors, and at least part of transistors are low-temperature polycrystalline silicon thin film transistors.

Abstract: Provided is a display panel. The display panel includes a base substrate, a plurality of dummy electrode patterns and a plurality of first connection traces. The dummy electrode patterns are disposed in a first display region of the base substrate, and the dummy electrode patterns and the first connection traces are disposed in different layers.

Abstract: A display substrate and a display device. The display substrate includes a substrate base, a plurality of sub-pixels, and a partition structure; the partition structure includes a plurality of annular partition parts, which include a plurality of first annular partition parts, a plurality of second annular partition parts, and a plurality of third annular partition parts, the first annular partition part is around one second color sub-pixel, the second annular partition part is around one first color sub-pixel, the third annular partition part is around one third color sub-pixel, each of the plurality of first annular partition parts includes a first number of first notches, each of the plurality of second annular partition parts includes a second number of second notches, each of the plurality of third annular partition parts includes a third number of third notches, the second number is different from the third number.

Abstract: A minimum inhibitory concentration recognition method, apparatus and device, and a computer-readable storage medium, relating to the field of image processing calculation. The method comprises: acquiring images under test of a strain under test; acquiring test contrast images corresponding to the strain under test; calculating the similarity between each image under test and the respective corresponding test contrast image to obtain a similarity test result respectively corresponding to each image under test; and according to the similarity test result and a preset gradient concentration, determining the minimum inhibitory concentration of an antibiotic under test corresponding to the strain under test.

Abstract: A display substrate is provided. The display substrate includes a base substrate and a plurality of reset signal lines. The base substrate includes a display region, the display region includes a plurality of sub-pixels arranged in array, each of the plurality of sub-pixels includes a pixel driving circuit and a light-emitting element. The plurality of reset signal lines extend in a first direction, the plurality of reset signal lines include a plurality of first reset signal lines for providing a first reset signal and a plurality of second reset signal lines for providing a second reset signal, and one of the plurality of first reset signal lines and one of the plurality of second reset signal lines are respectively connected to pixel driving circuits of a plurality of sub-pixels located in a same row.

Abstract: A pixel circuit and a driving method thereof, and a display panel. The pixel circuit includes a driving circuit, a data writing circuit, a compensation control circuit, an energy storage circuit, a first light-emitting control circuit, a second light-emitting control circuit, a first initialization circuit, a second initialization circuit, and a transmission circuit. The driving circuit includes a control terminal, a first terminal and a second terminal, and is configured to control a driving current flowing through the first terminal and the second terminal and used for driving a light-emitting element to emit light. The first initialization circuit is configured to apply a first initialization voltage to the control terminal of the driving circuit; the second initialization circuit is configured to apply a second initialization voltage to the first electrode of the light-emitting element.

Abstract: A display panel is provided, including a base substrate, pixel units, signal lines, and a light shielding portion. Each pixel unit includes a light-emitting element and a pixel driving circuit. The pixel units include first pixel units in a first display region of the display panel and second pixel units in a second display region of the display panel. The signal lines are electrically connected to pixel driving circuits of the second pixel units respectively. Orthographic projections of at least two of the signal lines on the base substrate are spaced apart from each other by a gap, and an orthographic projection of the light shielding portion on the base substrate covers an orthographic projection of the gap on the base substrate and orthographic projections of the second pixel units. The light shielding portion includes first light shielding sub-portions arranged in an array along row and column directions.

Abstract: A display substrate includes a base substrate (100), a circuit structure layer (20), a light emitting structure layer (4), at least one conductive layer, and at least one capacitance compensation layer (51). The base substrate (100) includes a first display region (A1) and a second display region (A2) at least partially surrounding the first display region (A1). The capacitance compensation layer (51) is located in the first display region (A1) and on a side of the light emitting structure layer (4) close to the base substrate (100). The capacitance compensation layer (51) includes at least one compensation capacitance electrode plate (511). An anode (411) of at least one first light emitting element (13) is electrically connected with the compensation capacitance electrode plate (511) of the capacitance compensation layer (51).

Abstract: A display substrate includes a base substrate, multiple pixel circuits, multiple first light emitting elements, multiple second light emitting elements, and at least one first signal line extending along the first direction. The base substrate includes a first display area and at least one second display area. The first display area at least partially surrounds the second display area. A first signal line is located in the first display area, and is electrically connected with multiple pixels circuits of the first display area. The first signal line is partitioned into at least two first sub-signal lines by at least one second display area. Adjacent first sub-signal lines of the at least two first sub-signal lines are electrically connected by a first connector line. At least part of line segments of the first connector line are located between the multiple first pixel circuits.

Abstract: Provided are a display panel and a display device. The display panel includes: a pixel unit (100), including a pixel circuit and a light-emitting element, a data line connected with the pixel circuit, the data line includes first-type data lines and second-type data lines, the second-type data line includes a first portion, a second portion, and a third portion, the third portion is connected with the first portion through a first via hole, the third portion is connected with the second portion through a second via hole, and the third portion includes a main trace located between the first via hole and the second via hole, at least one third portion includes a compensation trace, the compensation trace of the third portion is located at at least one end of the main trace of the third portion, lengths of the plurality of third portions are equal or approximately equal.

Abstract: A display substrate and a display device are provided. In the display substrate, a first target scanning line is coupled to each target virtual sub-pixel drive circuit and each first target sub-pixel drive circuit in a corresponding target drive circuit row, respectively; an orthographic projection of the conductive connection line on a base substrate overlaps at least partially with an orthographic projection of the first target scanning line on the base substrate; and a gate of a drive transistor in at least a portion of the sub-pixel drive circuits included in the target drive circuit row is configured to have substantially the same potential as a gate of a drive transistor in at least a portion of the sub-pixel drive circuits included in a non-target drive circuit row after charging.

Abstract: Provided are a display panel and a display device. A plurality of second pixel circuit groups in a first display region in the display panel includes a first-type second pixel circuit group distal from a second display region and a second-type second pixel circuit group proximal to the second display region. The first-type second pixel circuit group is connected to a first-type second light-emitting unit group, distal from the first display region, in the second display region through a first connection trace. The second-type second pixel circuit group is connected to a second-type second light-emitting unit group, proximal to the first display region, in the second display region through a second connection trace.

Abstract: A display substrate and a display device. The display substrate includes a base substrate and a plurality of sub-pixels arranged on the base substrate. A plurality of sub-pixel driving circuitries in the plurality of sub-pixels is arranged in columns, the columns of sub-pixel driving circuitries are divided into a plurality of column units, and each column unit includes at least two adjacent columns of sub-pixel driving circuitries. The display substrate further includes a first initialization signal transmission layer including a first initialization bus and a plurality of first initialization branches. The first initialization branch includes a first branch body member and a plurality of first branch extending members. The first branch body member is coupled to the sub-pixel driving circuitries in a corresponding column unit through the plurality of first branch extending members.