Abstract: A display substrate is provided. The display substrate includes a base substrate and a plurality of reset signal lines. The base substrate includes a display region, the display region includes a plurality of sub-pixels arranged in array, each of the plurality of sub-pixels includes a pixel driving circuit and a light-emitting element. The plurality of reset signal lines extend in a first direction, the plurality of reset signal lines include a plurality of first reset signal lines for providing a first reset signal and a plurality of second reset signal lines for providing a second reset signal, and one of the plurality of first reset signal lines and one of the plurality of second reset signal lines are respectively connected to pixel driving circuits of a plurality of sub-pixels located in a same row.

Abstract: Disclosed are a display panel and a display device. The pixel circuit in the display panel includes a control circuit, a drive circuit, and a regulating circuit. The control circuit controls the potential of the coupled control node based on the gate drive signal provided by the gate line and the data signal provided by the data line. The drive circuit drives the light-emitting element to emit light based on the potential of the control node and the drive power signal provided by the drive power line. The regulating circuit adjusts the potential of the control node through the coupling effect based on the drive power signal and the initial power signal provided by the initial power line.

Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit and an output circuit; the driving signal generation circuit generates and outputs the Nth stage of driving signal; the gating circuit controls to write the gating input signal into the first node; the output control circuit performs a NAND operation on the Nth stage of driving signal and the potential of the second terminal of the output control circuit to obtain a first output signal; the output circuit inverts the first output signal to obtain and provide an output driving signal through the output driving terminal; N is a positive integer.

Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, an output circuit and a voltage control circuit; the driving signal generation circuit generates an Nth stage of driving signal, the output control circuit connects the first control node and the second node under the control of the potential of the first node; the gating circuit controls to write a gating input signal into the first node under the control of a gating control signal; the voltage control circuit controls a potential of the second node according to a potential of the first node; the output circuit connects the output driving terminal and the first voltage terminal under the control of the potential of the second node, and connects the output driving terminal and the second voltage terminal under the control of the potential of the third control node.

Abstract: An array substrate is provided. The array substrate includes a plurality of data lines; a plurality of second fanout connecting lines; and a plurality of first voltage supply lines. In at least one subpixel of the array substrate, an individual data line of the plurality of data lines and an individual second fanout connecting line of the plurality of second fanout connecting lines have a substantial mirror symmetry with respect to an individual first voltage supply fine of the plurality of first voltage supply lines.

Abstract: The present disclosure provides a driving circuitry, a driving method, a driving module, and a display device. The driving circuitry includes a driving signal generation circuitry, a gating circuitry, an output control circuitry and an output circuitry. The driving signal generation circuitry is configured to perform a shifting operation on an (N?1)th-level driving signal to obtain an Nth-level driving signal. The gating circuitry is configured to write a gating input signal into a first node under the control of a gating control signal. The output control circuitry is configured to perform an NAND operation on the Nth-level driving signal and a potential at a second end of the output control circuitry to obtain a first output signal. The output circuitry is configured to perform phase inversion on the first output signal to obtain and provide an output driving signal through an output driving end, where N is a positive integer.

Abstract: The present application relates to a polyurethane elastomer, modified silicone rubber, an acoustic lens, and an ultrasonic probe. The polyurethane elastomer includes a structural unit represented by formula I and a chain extender unit, wherein the structural unit is a polyurethane main chain structural unit: where R is selected from structural units represented by formula I-1 and/or formula I-2 and/or formula I-3 where R1, R2, and R3 are each independently selected from C2-C10 hydrocarbon chains; a number average molecular weight of the structural unit represented by each of the formula I-1, formula I-2, and formula I-3 is ranged from 400 to 5000; and a molar ratio of the chain extender unit to the structural unit represented by formula I is ranged from 0.3:1 to 0.8:1.

Abstract: A display panel, a display device and a manufacturing method thereof, and relates to the field of display technology. The display panel includes: a first display area, provided with a plurality of pixel units; a second display area adjacent to the first display area, which is capable of transmitting light and provided with a plurality of light-emitting device units; a pixel auxiliary area external to the first display area and the second display area, which is provided with a plurality of light-emitting driving units; wherein the light-emitting driving unit is configured to drive the connected light-emitting device unit to emit light.

Abstract: An online uncapping system includes a sample intake rail, a scanning blocking mechanism, a sample container information scanning apparatus, an uncapping blocking mechanism, a sample tube clamping mechanism, a sample tube uncapping device, and a cap receiving mechanism. The scanning blocking mechanism is arranged on one side of the sample intake rail; the sample container information scanning apparatus is configured to read information about the sample tube blocked by the scanning blocking mechanism; the uncapping blocking mechanism is arranged on one side of the sample inlet rail and configured to block and release the sample tube; the sample tube clamping mechanism is configured to clamp the sample tube blocked by the uncapping blocking mechanism; the sample tube uncapping device is configured to uncover the sample tube blocked by the uncapping blocking mechanism; and the cap receiving mechanism is configured to collect the tube cap.

Abstract: Photoresist topcoat compositions, comprising: a first polymer that is aqueous base soluble and is present in an amount of from 70 to 99 wt % based on total solids of the composition; a second polymer comprising a repeat unit of general formula (IV) and a repeat unit of general formula (V): wherein: R5 independently represents H, halogen atom, C1-C3 alkyl, or C1-C3 haloalkyl; R6 represents linear, branched or cyclic C1 to C20 fluoroalkyl; R7 represents linear, branched or cyclic C1 to C20 fluoroalkyl; L3 represents a multivalent linking group; and m is an integer of from 1 to 5; wherein the second polymer is free of non-fluorinated side chains; and wherein the second polymer is present in an amount of from 1 to 30 wt % based on total solids of the composition and a solvent. The invention finds particular applicability in the manufacture of semiconductor devices.

Abstract: An online centrifugal system includes a conveying device, a balancing and weighing mechanism, a manipulator, and a centrifuge. The conveying device, the balancing and weighing mechanism and the centrifuge are sequentially arranged. The conveying device is used to convey a sample holder for holding blood collection tubes, the balancing and weighing mechanism is used to weigh an adapter, and the centrifuge is used to perform centrifugation to blood collection tubes. The manipulator is used to grab the blood collection tubes and the adapter respectively, to convey the blood collection tubes between the adapter and the conveying device, and convey the adapter between the centrifuge and the balancing and weighing mechanism. An inlet and outlet window is provided on the centrifuge for passage of the adapter. The balancing and weighing mechanism is used to balance the adapter, thereby meeting balancing needs of the adapter.

Abstract: Methods of forming an electronic device, comprise: (a) providing a semiconductor substrate comprising one or more layers to be patterned; (b) forming a photoresist layer over the one or more layers to be patterned, wherein the photoresist layer is formed from a composition that comprises: a matrix polymer comprising a unit having an acid labile group; a photoacid generator; and an organic solvent; (c) coating a photoresist overcoat composition over the photoresist layer, wherein the overcoat composition comprises: a matrix polymer; an additive polymer; a basic quencher; and an organic solvent; wherein the additive polymer has a lower surface energy than a surface energy of the matrix polymer, and wherein the additive polymer is present in the overcoat composition in an amount of from 1 to 20 wt % based on total solids of the overcoat composition; (d) exposing the photoresist layer to activating radiation; (e) heating the substrate in a post-exposure bake process; and (f) developing the exposed film with an or

Abstract: A display panel and a display device are provided. The display panel includes: a plurality of first pixel units, a plurality of second pixel units, a plurality of third pixel units and a plurality of first data lines. An effective light-emitting area of the first pixel unit is larger than an effective light-emitting area of the second pixel unit, and larger than an effective light-emitting area of the third pixel unit; orthographic projection of the first data line on the base substrate is not overlapped with an orthographic projection of any one of the first electrode of the first pixel unit, the first electrode of the second pixel unit, and the first electrode of the third pixel unit on the base substrate.

Abstract: A display substrate includes a base (10) having installation area (Q3), transition area (Q2), and display area (Q1). Sub-pixel areas in the transition area (Q2) include at least first type sub-pixel areas (P) and second type sub-pixel areas (D); sub-pixel areas in the installation area (Q3) include at least third type sub-pixel areas (A); first type sub-pixel areas (P) include pixel circuits; the pixel circuits include driving sub-circuits (20) and light-emitting devices (OLED); second type sub-pixel areas (D) include driving sub-circuits (20); third type sub-pixel areas (A) include OLED; OLED in the third type sub-pixel areas (A) of the installation area (Q3) are coupled to driving sub-circuits (20) in second type sub-pixel areas (D) of transition area (Q2) via signal connection lines (1); and orthographic projections of at least some signal connection lines (1) overlap on base (10).

Abstract: Disclosed is a display panel, including: a base substrate including a first display region, a second display region, and a routing region: a first anode layer, a first light-emitting layer and a first cathode layer disposed in the first display region and sequentially stacked in a direction going away from the base substrate; a second cathode layer, a second anode layer, a second light-emitting layer, and a third cathode layer disposed in the second display area and sequentially stacked in the direction going away from the base substrate, and a first signal transmission layer disposed in the routing region; wherein the first signal transmission layer is connected to the second cathode layer and the first cathode layer, and the first signal transmission layer is further configured to receive a power supply signal.

Abstract: A display substrate and a display apparatus are disclosed. The display substrate includes a base substrate including a display region and a peripheral region located on at least one side of the display region, and a first gate drive circuit, the first gate drive circuit includes a first clock signal line, a second clock signal line and N shift register units that are cascaded; each shift register unit of the N shift register units includes a first output circuit; the first output circuit includes the first output transistor, the orthographic projection of the second clock signal line on the base substrate is located between an orthographic projection of the first output transistor on the base substrate and the orthographic projection of the first clock signal line on the base substrate. The display substrate can reduce load of the first clock signal line and the second clock signal line.

Abstract: Provided are a display panel and a display device. A plurality of second pixel circuit groups in a first display region in the display panel includes a first-type second pixel circuit group distal from a second display region and a second-type second pixel circuit group proximal to the second display region. The first-type second pixel circuit group is connected to a first-type second light-emitting unit group, distal from the first display region, in the second display region through a first connection trace. The second-type second pixel circuit group is connected to a second-type second light-emitting unit group, proximal to the first display region, in the second display region through a second connection trace.

Abstract: A display panel is described that includes a light-transmitting area, a main display area, a first transition display area, and a first wiring area. The display panel further includes: a plurality of first light-emitting units, a plurality of first pixel driving circuits, a plurality of first signal lines, a plurality of second signal lines, and a plurality of third signal lines. The plurality of first light-emitting units are located in the light-transmitting area; the plurality of first pixel driving circuits are located in the first transition display area; the plurality of first signal lines extend in the second direction and are located in the first transition display area for providing a potential signal to the first pixel driving circuit.

Abstract: A display panel includes pixel-driving circuits distributed in an array along a first direction and a second direction and including a driving transistor and a capacitor with a first electrode connected to a gate of the driving transistor and a second electrode connected to a power line; a substrate base; a second conductive layer and a fifth conductive layer which is located on a side of the second conductive layer away from the substrate base and includes the power lines connected to at least one conductive wire. The second conductive layer, located on a side of the substrate base, includes second conductive portions corresponding to the pixel-driving circuits and forming the second electrode of a corresponding capacitor, and at least two adjacent second conductive portions form the conductive wire; orthographic projections of the power lines are spaced along the first direction and extend along the second direction.

Abstract: A display substrate and a manufacturing method thereof, and a display device are provided. In the display substrate, each signal line includes a first conductive portion; for at least one signal line, the display substrate includes a multi-layer insulating pattern on a side of the first conductive portion away from the base substrate; a first insulating pattern in the multi-layer insulating pattern includes a hollow, and an orthographic projection of the hollow on the base substrate is at least partially in a region surrounded by an orthographic projection of the first conductive portion on the base substrate; and for at least one clock signal line included in the at least one signal line, a ratio between a size of the hollow in a first direction and a size of a shift register unit in the first direction ranges from ¾ to 1.