Patents by Inventor Craig L. Chaiken

Craig L. Chaiken has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11907052
    Abstract: An information handling system may include a processor, a display device communicatively coupled to the processor, and a management controller communicatively coupled to the processor and the display device and configured to, in response to a failure of the information handling system, determine a component of the information handling system as a source of failure, generate a unique failure code associated with the failure, encrypt the unique failure code to generate an encrypted unique failure code, and display the encrypted unique failure code to the display device.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: February 20, 2024
    Assignee: Dell Products L.P.
    Inventors: Craig L. Chaiken, Adolfo S. Montero, Geroncio O. Tan, Hong-Ji Huang, Yi-Fan Wang
  • Publication number: 20230409423
    Abstract: An information handling system includes a processor and an embedded controller. The processor executes operations while the information handling system is in an active power state. The embedded controller communicates with the processor. While the information handling system is in the active power state, the embedded controller detects a trigger event. In response to the trigger event, the embedded controller provides a ping command to the processor. Based on a response to the ping command not being received, the embedded controller determines a processor freeze, stores forensic data associated with the processor freeze, and stores an indication to perform a processor freeze recovery during a next boot operation.
    Type: Application
    Filed: June 16, 2022
    Publication date: December 21, 2023
    Inventors: Craig L. Chaiken, Balasingh P. Samuel, Siva Subramaniam Rajan
  • Patent number: 11599436
    Abstract: An information handling system may include a processor and a basic input/output system (BIOS) comprising a program of instructions executable on the processor, the basic input/output system configured to, upon occurrence of a predetermined number of failures to complete a power-on/self-test (POST) of the information handling system: for each particular critical boot variable of the BIOS stored in a memory associated with the BIOS, read a backup variable for the particular critical boot variable, if available, and write a value of the backup variable as the critical boot variable; and attempt to reboot the information handling system with values of the backup variables used for the critical boot variables.
    Type: Grant
    Filed: March 2, 2021
    Date of Patent: March 7, 2023
    Assignee: Dell Products L.P.
    Inventors: Craig L. Chaiken, Siva Subramaniam Rajan
  • Patent number: 11579893
    Abstract: Systems and methods are provided for supporting use of system BIOS components (e.g., such as BIOS debug messages, debugger firmware, UEFI drivers, etc.) that are stored separately from the remainder of system BIOS firmware for an information handling system. The system BIOS components may represent only a portion of the total BIOS firmware, and may be selectively retrieved and loaded from the separate storage into system memory when needed by the system BIOS for operating purposes (e.g., such as debugging operations).
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: February 14, 2023
    Assignee: Dell Products L.P.
    Inventors: Craig L. Chaiken, Michael W. Arms, Richard M. Tonry, Anand Prakash Joshi
  • Patent number: 11568072
    Abstract: A set of security templates is maintained including first and second templates. The first template specifies time and location stamp authentication for a file, and contextual security conditions that must be met before the file can be accessed. The second template specifies the time and location stamp authentication, but not the contextual security conditions. One of the first or second security templates is applied to the particular file. When the second security template is applied, a GPS-crypto device adds a time and location stamp to the particular file. The particular file is signed using a private key associated with the GPS-crypto device to generate an authentication signature based on the time and location stamp. The authentication signature is added to the particular file to allow a recipient to verify the time and location stamp of the particular file using a public key corresponding to the private key.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: January 31, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Craig L Chaiken, Richard M Tonry
  • Patent number: 11526411
    Abstract: An information handling system includes a non-volatile storage device communicatively coupled to a boot processor and an application processor. The boot processor, prior to the execution of a hang sensitive transaction, stores information associated with the hang sensitive transaction at a memory device. The application processor is configured to detect a catastrophic failure of the hang sensitive transaction. In response to the detection of the catastrophic failure, the application processor retrieves the information stored at the memory device and store the information at the non-volatile storage device.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: December 13, 2022
    Assignee: Dell Products L.P.
    Inventors: Craig L. Chaiken, Siva Subramaniam Rajan
  • Patent number: 11507464
    Abstract: A method of instructing a user prior to a boot-up process of an information handling system may include, with an embedded controller (EC) of the information handling system, executing a guided diagnostic flow module to: determine that a power-on process has been initiated at the information handling system; determine whether the EC detected a power sequencing timeout during boot up; and determine at which power rail boot-up has hung during the power-on process; and where the EC either determines that the power sequencing timeout has occurred, determining a fault at an issue-experiencing hardware component operatively coupled to the determined power rail.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: November 22, 2022
    Assignee: Dell Products, LP
    Inventors: Craig L. Chaiken, Geroncio O. Tan
  • Publication number: 20220283918
    Abstract: An information handling system may include a processor and a basic input/output system (BIOS) comprising a program of instructions executable on the processor, the basic input/output system configured to, upon occurrence of a predetermined number of failures to complete a power-on/self-test (POST) of the information handling system: for each particular critical boot variable of the BIOS stored in a memory associated with the BIOS, read a backup variable for the particular critical boot variable, if available, and write a value of the backup variable as the critical boot variable; and attempt to reboot the information handling system with values of the backup variables used for the critical boot variables.
    Type: Application
    Filed: March 2, 2021
    Publication date: September 8, 2022
    Applicant: Dell Products L.P.
    Inventors: Craig L. CHAIKEN, Siva Subramaniam RAJAN
  • Patent number: 11379330
    Abstract: Embodiments of information handling systems (IHSs) and computer-implemented methods are provided herein for testing system memory (or another volatile memory component) of an IHS. In the disclosed embodiments, memory testing is performed automatically: (a) during the pre-boot phase each time a new page of memory is allocated for the first time after a system boot, and (b) during OS runtime each time a read command is received and/or an event is detected. By proactively testing each page of memory, as the page is allocated but before information is stored therein, the systems and methods disclosed herein prevent “bad” memory pages from being used.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: July 5, 2022
    Assignee: Dell Products L.P.
    Inventors: Craig L. Chaiken, Siva Subramaniam Rajan
  • Patent number: 11341014
    Abstract: An information handling system includes an embedded controller that subsequent to a determination that a power button is activated, may determine a sequence of unplugging a connector from a port within a time threshold and subsequently plugging the connector from the port within another time threshold. The embedded controller may determine a hotkey associated with the sequence of unplugging the connector from the port and subsequently plugging the connector to the port, and execute a function based on the hotkey.
    Type: Grant
    Filed: October 2, 2020
    Date of Patent: May 24, 2022
    Assignee: Dell Products L.P.
    Inventors: Craig L. Chaiken, Chun Yi Yang
  • Publication number: 20220129349
    Abstract: A method of instructing a user prior to a boot-up process of an information handling system may include, with an embedded controller (EC) of the information handling system, executing a guided diagnostic flow module to: determine that a power-on process has been initiated at the information handling system; determine whether the EC detected a power sequencing timeout during boot up; and determine at which power rail boot-up has hung during the power-on process; and where the EC either determines that the power sequencing timeout has occurred, determining a fault at an issue-experiencing hardware component operatively coupled to the determined power rail.
    Type: Application
    Filed: October 28, 2020
    Publication date: April 28, 2022
    Applicant: Dell Products, LP
    Inventors: Craig L. Chaiken, Geroncio O. Tan
  • Patent number: 11314582
    Abstract: An information handling system may include a processor and a basic input/output system configured to, responsive to an occurrence of an exception error, triage among various hardware components of the information handling system to determine existence of any signatures of potential hardware failures, write a database structure to a non-volatile memory including the signatures of potential hardware failures, upon boot of the basic input/output system, enable one or more control methods for hardware failure mitigations associated with the signatures of potential hardware failures, and perform the mitigations during execution of an operating system of the information handling system.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: April 26, 2022
    Assignee: Dell Products L.P.
    Inventors: Craig L. Chaiken, Siva Subramaniam Rajan
  • Patent number: 11314578
    Abstract: Embodiments of information handling systems (HSs) and computer-implemented methods are provided herein to detect and recover from spurious PCIe device resets. One embodiment of a disclosed method is performed by a host processor of an IHS that includes a plurality of Peripheral Component Interconnect Express (PCIe) devices, each including a set of PCIe configuration registers containing configuration settings for the PCIe device. The disclosed method includes generating, in response to the IHS transitioning from a lower power state to a higher power state, a PCIe device table containing the configuration settings stored within the set of PCIe configuration registers for each of the PCIe devices; determining, in response to detecting a system management interrupt (SMI), whether or not a spurious reset has occurred for at least one of the PCIe devices; and recovering the at least one PCIe device if said determining indicates that a spurious reset has occurred for the at least one PCIe device.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: April 26, 2022
    Assignee: Dell Products L.P.
    Inventors: Craig L. Chaiken, Michael W. Arms
  • Publication number: 20220107873
    Abstract: An information handling system includes an embedded controller that subsequent to a determination that a power button is activated, may determine a sequence of unplugging a connector from a port within a time threshold and subsequently plugging the connector from the port within another time threshold. The embedded controller may determine a hotkey associated with the sequence of unplugging the connector from the port and subsequently plugging the connector to the port, and execute a function based on the hotkey.
    Type: Application
    Filed: October 2, 2020
    Publication date: April 7, 2022
    Inventors: Craig L. Chaiken, Chun Yi Yang
  • Publication number: 20210406113
    Abstract: An information handling system may include a processor and a basic input/output system configured to, responsive to an occurrence of an exception error, triage among various hardware components of the information handling system to determine existence of any signatures of potential hardware failures, write a database structure to a non-volatile memory including the signatures of potential hardware failures, upon boot of the basic input/output system, enable one or more control methods for hardware failure mitigations associated with the signatures of potential hardware failures, and perform the mitigations during execution of an operating system of the information handling system.
    Type: Application
    Filed: June 24, 2020
    Publication date: December 30, 2021
    Applicant: Dell Products L.P.
    Inventors: Craig L. CHAIKEN, Siva Subramaniam RAJAN
  • Publication number: 20210406143
    Abstract: Embodiments of information handling systems (IHSs) and computer-implemented methods are provided herein for testing system memory (or another volatile memory component) of an IHS. In the disclosed embodiments, memory testing is performed automatically: (a) during the pre-boot phase each time a new page of memory is allocated for the first time after a system boot, and (b) during OS runtime each time a read command is received and/or an event is detected. By proactively testing each page of memory, as the page is allocated but before information is stored therein, the systems and methods disclosed herein prevent “bad” memory pages from being used.
    Type: Application
    Filed: June 30, 2020
    Publication date: December 30, 2021
    Inventors: Craig L. Chaiken, Siva Subramaniam Rajan
  • Patent number: 11194684
    Abstract: Embodiments of information handling systems (IHSs) and methods are provided herein to automatically detect failure(s) on one or more power rails provided on a system motherboard of an IHS. One embodiment of such a method may include determining if a power rail test should be performed each time an information handling system (IHS) is powered on or rebooted. If a power rail test is performed, the method may perform a current measurement for each of the power rails separately to obtain actual current values for each power rail, compare the actual current values obtained for each power rail to expected current values stored for each power rail, and detect a failure on at least one of the power rails if the actual current value obtained for the at least one power rail differs from the expected current value stored for the at least one power rail by more than a predetermined percentage or amount.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: December 7, 2021
    Assignee: Dell Products L.P.
    Inventor: Craig L. Chaiken
  • Publication number: 20210326198
    Abstract: An information handling system may include a processor, a display device communicatively coupled to the processor, and a management controller communicatively coupled to the processor and the display device and configured to, in response to a failure of the information handling system, determine a component of the information handling system as a source of failure, generate a unique failure code associated with the failure, encrypt the unique failure code to generate an encrypted unique failure code, and display the encrypted unique failure code to the display device.
    Type: Application
    Filed: April 20, 2020
    Publication date: October 21, 2021
    Applicant: Dell Products L.P.
    Inventors: Craig L. CHAIKEN, Adolfo S. MONTERO, Geroncio O. TAN, Hong-Ji HUANG, Yi-Fan WANG
  • Publication number: 20210264044
    Abstract: A set of security templates is maintained including first and second templates. The first template specifies time and location stamp authentication for a file, and contextual security conditions that must be met before the file can be accessed. The second template specifies the time and location stamp authentication, but not the contextual security conditions. One of the first or second security templates is applied to the particular file. When the second security template is applied, a GPS-crypto device adds a time and location stamp to the particular file. The particular file is signed using a private key associated with the GPS-crypto device to generate an authentication signature based on the time and location stamp. The authentication signature is added to the particular file to allow a recipient to verify the time and location stamp of the particular file using a public key corresponding to the private key.
    Type: Application
    Filed: April 23, 2021
    Publication date: August 26, 2021
    Inventors: Craig L. Chaiken, Richard M. Tonry
  • Publication number: 20210255939
    Abstract: An information handling system includes a non-volatile storage device communicatively coupled to a boot processor and an application processor. The boot processor, prior to the execution of a hang sensitive transaction, stores information associated with the hang sensitive transaction at a memory device. The application processor is configured to detect a catastrophic failure of the hang sensitive transaction. In response to the detection of the catastrophic failure, the application processor retrieves the information stored at the memory device and store the information at the non-volatile storage device.
    Type: Application
    Filed: February 13, 2020
    Publication date: August 19, 2021
    Inventors: Craig L. Chaiken, Siva Subramaniam Rajan