Abstract: An indication is received to export a file from a host having an authentication device. A memory buffer is allocated for a signature region, a header region, and a content region. A location stamp and a time stamp are calculated for content of the file. The location and time stamps are copied to the header region. An authentication signature is generated using a private key associated with the authentication device. The authentication signature is based on the header and content regions, which include the copied location stamp and timestamp, and content of the file. The authentication signature is copied to the signature region. The memory buffer is written to a new file, the new file being a signed version of the file and including the signature region having the authentication signature, the header region having the location and time stamps, and the content region having the content of the file.

Abstract: A battery includes plural battery cells that output a source voltage to power a device, such as an information handling system. A controller of the battery disconnects each battery cell at a predetermined interval for a predetermined time period, such as from a range of between 15 and 60 seconds, while maintaining the source voltage. The predetermined time and interval are selected based upon the load supplied by the battery and an estimated increase in battery output efficiency.

Abstract: A method includes invoking, by an embedded controller at an information handling system, a test procedure to evaluate functionality of motherboard resources at the information handling system. A result of the test procedure is displayed at a primary display device using a built in self test function incorporated at the primary display device.

Abstract: Embodiments of information handling systems (IHSs) and methods are provided herein to automatically detect and recover from boot failures, such as no power failures and no POST failures, without suffering the information loss that typically occurs in conventional recovery methods. One embodiment of an IHS disclosed herein includes a system real-time clock (RTC) configured to maintain current date and time values, a host processor configured to execute boot firmware and perform a Power-On Self-Test (POST) during a boot process for the IHS, and an embedded controller (EC) configured to execute embedded controller firmware during the boot process to detect a no power failure or a no POST failure, and reset or remove power from the system RTC if a no power failure or a no POST failure is detected.

Abstract: An indication is received to export a file from a host having an authentication device. A memory buffer is allocated for a signature region, a header region, and a content region. A location stamp and a time stamp are calculated for content of the file. The location and time stamps are copied to the header region. An authentication signature is generated using a private key associated with the authentication device. The authentication signature is based on the header and content regions, which include the copied location stamp and timestamp, and content of the file. The authentication signature is copied to the signature region. The memory buffer is written to a new file, the new file being a signed version of the file and including the signature region having the authentication signature, the header region having the location and time stamps, and the content region having the content of the file.

Abstract: Systems and methods are provided for supporting use of system BIOS components (e.g., such as BIOS debug messages, debugger firmware, UEFI drivers, etc.) that are stored separately from the remainder of system BIOS firmware for an information handling system. The system BIOS components may represent only a portion of the total BIOS firmware, and may be selectively retrieved and loaded from the separate storage into system memory when needed by the system BIOS for operating purposes (e.g., such as debugging operations).

Abstract: Embodiments of information handling systems (IHSs) and methods are provided herein to dynamically detect and recover from thermally induced memory failures. Some embodiments include receiving an interrupt corresponding to a memory failure, detecting a current temperature of one or more memory components, and performing a series of memory tests on a specific block of memory within the memory components if the current temperature exceeds a maximum operating temperature specified for the memory components. Some embodiments include storing original contents of the specific block of memory within another memory component of the IHS, performing a first memory test on the specific block of memory at the current temperature, subsequently performing a second memory test on the specific block of memory at a temperature significantly lower than the current temperature, and determining that the memory failure is a thermally induced memory failure if the first memory test fails and the second memory test passes.

Abstract: Embodiments of information handling systems (HSs) and computer-implemented methods are provided herein to detect and recover from spurious PCIe device resets. One embodiment of a disclosed method is performed by a host processor of an IHS that includes a plurality of Peripheral Component Interconnect Express (PCIe) devices, each including a set of PCIe configuration registers containing configuration settings for the PCIe device. The disclosed method includes generating, in response to the IHS transitioning from a lower power state to a higher power state, a PCIe device table containing the configuration settings stored within the set of PCIe configuration registers for each of the PCIe devices; determining, in response to detecting a system management interrupt (SMI), whether or not a spurious reset has occurred for at least one of the PCIe devices; and recovering the at least one PCIe device if said determining indicates that a spurious reset has occurred for the at least one PCIe device.

Abstract: Embodiments of information handling systems (IHSs) and methods are provided herein to dynamically detect and recover from thermally induced memory failures. Some embodiments include receiving an interrupt corresponding to a memory failure, detecting a current temperature of one or more memory components, and performing a series of memory tests on a specific block of memory within the memory components if the current temperature exceeds a maximum operating temperature specified for the memory components. Some embodiments include storing original contents of the specific block of memory within another memory component of the IHS, performing a first memory test on the specific block of memory at the current temperature, subsequently performing a second memory test on the specific block of memory at a temperature significantly lower than the current temperature, and determining that the memory failure is a thermally induced memory failure if the first memory test fails and the second memory test passes.

Abstract: Embodiments of information handling systems (IHSs) and methods are provided herein to automatically detect failure(s) on one or more power rails provided on a system motherboard of an IHS. One embodiment of such a method may include determining if a power rail test should be performed each time an information handling system (IHS) is powered on or rebooted. If a power rail test is performed, the method may perform a current measurement for each of the power rails separately to obtain actual current values for each power rail, compare the actual current values obtained for each power rail to expected current values stored for each power rail, and detect a failure on at least one of the power rails if the actual current value obtained for the at least one power rail differs from the expected current value stored for the at least one power rail by more than a predetermined percentage or amount.

Abstract: Systems and methods are provided that may be implemented to detect and optionally recover corrupted system configuration data written to non-volatile random access memory (NVRAM). The disclosed systems and methods may be implemented by writing a copy of the NVRAM data to volatile system memory (e.g., RAM) while the system is active. Error correction code (ECC) data may written to the NVRAM when the system enters a lower power state. When the system resumes from the low power state, the copy of data is made in system RAM from the NVRAM, and the ECC data is used to determine whether there are errors in NVRAM data, in which case the ECC data may be used to correct data in the copy on RAM before writing the corrected data to NVRAM from the system RAM.

Abstract: Embodiments of information handling systems (IHSs) and methods are provided herein to automatically detect and recover from boot failures, such as no power failures and no POST failures, without suffering the information loss that typically occurs in conventional recovery methods. One embodiment of an IHS disclosed herein includes a system real-time clock (RTC) configured to maintain current date and time values, a host processor configured to execute boot firmware and perform a Power-On Self-Test (POST) during a boot process for the IHS, and an embedded controller (EC) configured to execute embedded controller firmware during the boot process to detect a no power failure or a no POST failure, and reset or remove power from the system RTC if a no power failure or a no POST failure is detected.

Abstract: Systems and methods are provided that may be implemented to hide operating system kernel data in system management mode memory. An information handling system includes a system memory, central processing unit (CPU), and Basic Input Output System (BIOS). The CPU is operable in a system management mode and is programmable to specify an SMM region of the system memory that is only accessible when the CPU is operating in the SMM. The BIOS is programmed to save kernel data from a non-SMM region of the system memory to the SMM region and then clear the kernel data from the non-SMM region in response to an operating system (OS) generating a system management interrupt (SMI) and to restore the kernel data to the non-SMM region of the system memory from the SMM region in response to the OS generating a SMI.

Abstract: Systems and methods are provided that may be implemented to hide operating system kernel data in system management mode memory. An information handling system includes a system memory, central processing unit (CPU), and Basic Input Output System (BIOS). The CPU is operable in a system management mode and is programmable to specify an SMM region of the system memory that is only accessible when the CPU is operating in the SMM. The BIOS is programmed to save kernel data from a non-SMM region of the system memory to the SMM region and then clear the kernel data from the non-SMM region in response to an operating system (OS) generating a system management interrupt (SMI) and to restore the kernel data to the non-SMM region of the system memory from the SMM region in response to the OS generating a SMI.

Abstract: A method includes invoking, by an embedded controller at an information handling system, a test procedure to evaluate functionality of motherboard resources at the information handling system. A result of the test procedure is displayed at a primary display device using a built in self test function incorporated at the primary display device.

Abstract: Systems and methods are provided that that may be implemented to detect and optionally recover corrupted data written to non-volatile random access memory (NVRAM), e.g., such as corrupted system configuration data (e.g., UEFI variables) stored in the NVRAM. The disclosed systems and methods may be implemented by writing a copy of the NVRAM data to volatile system memory (e.g., RAM) while the system is active, and satisfying requests to read data from the copy maintained in volatile RAM. Error correction code (ECC) data may written to the NVRAM when the system enters a lower power state. When the system resumes from the low power state, the copy of data is made in system RAM from the NVRAM, and the ECC data is used to determine whether there are errors in NVRAM data, in which case the ECC data may be used to correct data in the copy on RAM before writing the corrected data to NVRAM from the system RAM.

Abstract: A battery includes plural battery cells that output a source voltage to power a device, such as an information handling system. A controller of the battery disconnects each battery cell at a predetermined interval for a predetermined time period, such as from a range of between 15 and 60 seconds, while maintaining the source voltage. The predetermined time and interval are selected based upon the load supplied by the battery and an estimated increase in battery output efficiency.

Abstract: An information handling system pre-boot fault monitor tracks errors detected before boot of an operating system and stores the errors in persistent memory as error hashes generated from information associated with the error. Corrective actions associated with error hashes are determined by data mining error hashes provided from a population of deployed systems and stored in the persistent memory of the deployed systems. As the pre-boot fault monitor detects errors, a matching comparison between detected error hashes and stored corrective action hashes provides pre-boot instructions with corrective actions so that boot can be completed and the error managed with the operating system after POST.

Abstract: A Unified Extensible Firmware Interface protocol installer utilizes and modifies a list of global unique identifiers corresponding to Unified Extensible Firmware Interface protocols to determine whether to install a UEFI protocol.

Abstract: An information handling system pre-boot fault monitor tracks errors detected before boot of an operating system and stores the errors in persistent memory as error hashes generated from information associated with the error. Corrective actions associated with error hashes are determined by data mining error hashes provided from a population of deployed systems and stored in the persistent memory of the deployed systems. As the pre-boot fault monitor detects errors, a matching comparison between detected error hashes and stored corrective action hashes provides pre-boot instructions with corrective actions so that boot can be completed and the error managed with the operating system after POST.