Patents by Inventor D. Duan

D. Duan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for forming a void free isolation pattern and resulting structure
    Patent number: 4689656
    Abstract: The void-free pattern of isolation in a semiconductor substrate is described. There is contained within a semiconductor body a pattern of substantially vertically sided trenches. The pattern of isolation trenches isolate regions of monocrystalline semiconductor material which may contain active and passive semiconductor devices. The depth of the pattern of trenches is greater than about 3 micrometers. A first insulating layer is located upon the sidewalls of the trenches. The base or bottom of the trenches is open to the monocrystalline semiconductor body. An epitaxial layer extending from the base of the trenches fills the pattern of trenches up to between about 500 to 1500 nanometers from the upper surface of the trenches. A capping second insulating layer fills the additional portion of the pattern of trenches above the upper surfaces of the epitaxial layer for isolation of the pattern of trenches from the ambient.
    Type: Grant
    Filed: May 23, 1986
    Date of Patent: August 25, 1987
    Assignee: International Business Machines Corporation
    Inventors: Victor J. Silvestri, D. Duan-Lee Tang
  • Method for forming a void free isolation pattern utilizing etch and refill techniques
    Patent number: 4526631
    Abstract: The void-free pattern of isolation in a semiconductor substrate is described. There is contained within a semiconductor body a pattern of substantially vertically sided trenches. The pattern of isolation trenches isolate regions of monocrystalline semiconductor material which may contain active and passive semiconductor devices. The depth of the pattern of trenches is greater than about 3 micrometers. A first insulating layer is located upon the sidewalls of the trenches. The base or bottom of the trenches is open to the monocrystalline semiconductor body. An epitaxial layer extending from the base of the trenches fills the pattern of trenches up to between about 500 to 1500 nanometers from the upper surface of the trenches. A capping second insulating layer fills the additional portion of the pattern of trenches above the upper surfaces of the epitaxial layer for isolation of the pattern of trenches from the ambient.
    Type: Grant
    Filed: June 25, 1984
    Date of Patent: July 2, 1985
    Assignee: International Business Machines Corporation
    Inventors: Victor Silvestri, D. Duan-Lee Tang