Abstract: Embodiments related to an undervoltage detector are described and depicted. An undervoltage detector is formed to detect a low input bias voltage with a voltage divider network including first and second series circuits of semiconductor devices coupled to terminals of the input bias voltage source, and a resistor voltage divider including first and second voltage divider resistors coupled in series with the first and second series circuits. A ratio representing the numbers of semiconductor devices in the series circuits is substantially equal to a ratio of resistances in the resistor voltage divider. The equality of the ratios may be corrected by the presence of other resistances in the undervoltage detector. The semiconductor devices are each coupled in a diode configuration. The first series circuit is coupled to a current mirror to provide a bias current for a comparator that produces an output signal for the undervoltage detector.

Abstract: An embodiment of the invention relates to a power converter formed with an error amplifier and a related method. In an embodiment, a first switch is coupled in series with an error amplifier compensation capacitor. Upon detection of a current level greater than a threshold level, the compensation capacitor is decoupled from the error amplifier by opening the first switch. In an embodiment, a second switch is coupled in parallel with the compensation capacitor, and the current-sensing circuit enables conductivity of the second switch to discharge the compensation capacitor upon detection of the current level greater than the threshold level. The second switch is opened upon detection of the current level less than the threshold level. In an embodiment, the current-sensing circuit controls an output current of the power converter at a current-limit level upon detection of the internal current level greater than the threshold level.

Abstract: Embodiments related to an undervoltage detector are described and depicted. An undervoltage detector is formed to detect a low input bias voltage with a voltage divider network including first and second series circuits of semiconductor devices coupled to terminals of the input bias voltage source, and a resistor voltage divider including first and second voltage divider resistors coupled in series with the first and second series circuits. A ratio representing the numbers of semiconductor devices in the series circuits is substantially equal to a ratio of resistances in the resistor voltage divider. The equality of the ratios may be corrected by the presence of other resistances in the undervoltage detector. The semiconductor devices are each coupled in a diode configuration. The first series circuit is coupled to a current mirror to provide a bias current for a comparator that produces an output signal for the undervoltage detector.