Abstract: A memory device configured to perform a ZQ calibration method may include a first die and a second die that share a resistor connected to a ZQ pin. The first die may be configured to perform a first calibration operation using the resistor in response to a ZQ calibration command applied from outside of the memory device. The first die may be configured to generate a ZQ flag signal after the first calibration operation ends and perform a second calibration operation. The second die may be configured to perform the first calibration operation in response to the ZQ flag signal and perform a second calibration after the first calibration operation of the second die ends.

Abstract: Disclosed is a substrate processing apparatus including a disc provided so as to be rotatable on its axis, at least one susceptor disposed on the disc such that a substrate is seated on an upper surface thereof, the susceptor being configured to rotate on its axis and to revolve around a center of the disc as the disc rotates on its axis, a metal ring coupled to a lower portion of the susceptor, the metal ring being arranged such that a center thereof coincides with a center of the susceptor, and a magnet provided below the disc so as to be radially arranged on a basis of the center of the disc, at least a portion of the magnet being opposite the metal ring in a vertical direction.

Abstract: A memory module includes a first memory device including a first one-die termination circuit for impedance matching of a signal path and a second memory device sharing the signal path with the first memory device and including a second on-die termination circuit for impedance matching of the signal path, wherein the signal path corresponds to a command or address signal path provided from a host, and the first and second on-die termination circuits are individually controlled according to control of the host.

Abstract: A memory device includes a main driver and a pre-driver. The main driver provides an output signal to a host based on a plurality of driving signals. The pre-driver provides the main driver with the plurality of driving signals in order to calibrate a slew rate of the output signal based on an output resistance value of the main driver and a resistance value of an on-die termination circuit of the host. The pre-driver is configured to generate a first driving signal of the plurality of driving signals in response to an input signal regardless of a control signal, and to generate a second driving signal of the plurality of driving signals in response to the input signal and the control signal.

Abstract: An output buffer circuit may include a pulse generator, a transmitter, and an emphasis controller. The pulse generator generates a pulse signal for determining an emphasis execution period. The transmitter may receive an input data and to have a first output resistance value, which is determined by the input data and a resistance calibration code, and to have a second output resistance value different from the first output resistance value, which is determined by the input data and an emphasis code different from the resistance calibration code for executing an emphasis operation during the emphasis execution period, based on the pulse signal. The emphasis controller provides the resistance calibration code or the emphasis code to the transmitter based on the pulse signal. The emphasis code may include a first code determined by the input data regardless of the resistance calibration code.

Abstract: A delay locked loop according to some example embodiments of the inventive concepts may include first, second, and third delay circuits, first and second phase detectors, and first and second controllers. The first delay circuit may generate a first clock by delaying a reference clock. The second and third delay circuits may be configured to generate a second and third clock respectively by delaying the first clock. The first and second phase detector may be configured to detect a phase difference between the second clock and the third clock and the third clock respectively. The first controller may be configured to adjust a delay of the third delay circuit using a detection result of the first phase detector. The second controller may be configured to adjust a delay of the first delay circuit using a detection result of the second phase detector.

Abstract: According to an embodiment of the present invention, a method of operating first user equipment (UE) in a wireless communication system includes: determining whether a size of a relay discovery message to be transmitted by the first UE exceeds a permitted size; and broadcasting a plurality of relay discovery messages, based on the relay discovery message and information about a group related to the first UE, when it is determined that the size of the relay discovery message exceeds the permitted size.

Abstract: Disclosed are a resin composition and a molded product obtained using the same. By using the resin composition according to the present invention, a molded product having excellent tensile strength, tensile modulus, electromagnetic shielding effects, anti-static effects, and the like may be provided.

Abstract: The present invention relates to a composition comprising an extract of a mixture of Undaria pinnatifida sporophylls and ascidian shells for treating atopic dermatitis, wherein the composition has the excellent effect of treating atopic dermatitis through the synergistic interaction of the anti-inflammatory effect of Undaria pinnatifida sporophylls and the cell regenerative effect of ascidian shells. The composition of the invention is not involved in the suppression of cytokine production. However, it is assumed that the composition has the effects of suppressing inflammation as well as regenerating skin.

Abstract: Provided is a delay-locked loop circuit for providing a delay-locked clock signal to a data output buffer, the delay-locked loop circuit including: a first delay-locked-mode-based selector configured to select, as a first selected clock signal, one of a first divided clock signal, which is obtained by dividing a reference clock signal by N, and the reference clock signal; and a delay-locked mode controller configured to determine a delay-locked mode on the basis of a command received from the outside and to control the first delay-locked-mode-based selector according to the delay-locked mode. The delay-locked clock signal is generated by comparing a phase of a feedback clock signal generated from the first selected clock signal with a phase of the reference clock signal.

Abstract: A memory device including a command window generator is provided. The command window generator is configured to generate a delay signal by converting a delay time between a clock signal input to a write path circuit and a clock signal output to a write path replica circuit into a number of cycles of an internal clock signal, by using the write path circuit and the write path replica circuit, and generate a command window to correspond to a data window using the delay signal. The delay window may correspond to a burst length of write data.

Abstract: A memory device includes a first on-die termination circuit, a second on-die termination circuit, a voltage generator, and a code generator. The first on-die termination circuit may correspond to a data input buffer. The second on-die termination circuit may correspond to a command/address buffer. The voltage generator may generate a reference voltage. The code generator may generate a resistance calibration code of a selected one of the on-die termination circuits in response to the reference voltage. The reference calibration code may calibrate a resistance value of the selected on-die termination circuit.

Abstract: Provided is a delay-locked loop circuit for providing a delay-locked clock signal to a data output buffer, the delay-locked loop circuit including: a first delay-locked-mode-based selector configured to select, as a first selected clock signal, one of a first divided clock signal, which is obtained by dividing a reference clock signal by N, and the reference clock signal; and a delay-locked mode controller configured to determine a delay-locked mode on the basis of a command received from the outside and to control the first delay-locked-mode-based selector according to the delay-locked mode. The delay-locked clock signal is generated by comparing a phase of a feedback clock signal generated from the first selected clock signal with a phase of the reference clock signal.

Abstract: Provided is a thermoplastic resin composition for a radar cover which exhibits excellent mechanical properties as well as a good balance between electromagnetic reflection loss and electromagnetic penetration loss, which is required for a radar protection, by including 85 wt % to 95 wt % of a thermoplastic resin, 1 wt % to 5 wt % of carbon nanotubes, and 3 wt % to 10 wt % of carbon black, wherein a weight ratio of the carbon nanotubes to the carbon black is in a range of 3:7 to 1:7.

Abstract: Provided is a semiconductor device comprising a signal generator that generates a differential data strobe signal, and a converter that extends a length of a postamble section of the differential data strobe signal from a first length to a second length, wherein the differential data strobe signal enters a high impedance state after the postamble section.

Abstract: Methods, devices, and systems are provided herein related to a connection management server connected to a signaling server, a push server, at least one home device, and at least two smart devices. The connection management server includes a connection management request receiver for receiving a video call connection request or a user switching request. A connection management request transmitter is also included for transmitting a connection state releasing request to the home device and the first smart device, for transmitting a video call push notification transmission request to the push server upon the video call connection request, and for transmitting a user switching push notification transmission request to the push server upon the user switching request. A group manager is also included for managing, in a group, smart device identity corresponding to a push notification sent from the push server.

Abstract: A memory module includes a first memory device including a first one-die termination circuit for impedance matching of a signal path and a second memory device sharing the signal path with the first memory device and including a second on-die termination circuit for impedance matching of the signal path, wherein the signal path corresponds to a command or address signal path provided from a host, and the first and second on-die termination circuits are individually controlled according to control of the host.

Abstract: Provided is a delay-locked loop circuit for providing a delay-locked clock signal to a data output buffer, the delay-locked loop circuit including: a first delay-locked-mode-based selector configured to select, as a first selected clock signal, one of a first divided clock signal, which is obtained by dividing a reference clock signal by N, and the reference clock signal; and a delay-locked mode controller configured to determine a delay-locked mode on the basis of a command received from the outside and to control the first delay-locked-mode-based selector according to the delay-locked mode. The delay-locked clock signal is generated by comparing a phase of a feedback clock signal generated from the first selected clock signal with a phase of the reference clock signal.

Abstract: Provided are a reference voltage training device and a method thereof. The reference voltage training device includes a comparator configured to compare a toggle signal with a reference voltage and output a comparison signal, a duty cycle detector configured to check a duty ratio of the comparison signal, and a reference voltage level changing unit configured to fix the reference voltage when the duty ratio meets a predetermined condition and to change a level of the reference voltage when the duty ratio does not meet the predetermined condition. The comparator outputs a changed comparison signal using the changed reference voltage.

Abstract: Provided is a thermoplastic resin composition for a radar cover which exhibits excellent mechanical properties as well as a good balance between electromagnetic reflection loss and electromagnetic penetration loss, which is required for a radar protection, by including 85 wt % to 95 wt % of a thermoplastic resin, 1 wt % to 5 wt % of carbon nanotubes, and 3 wt % to 10 wt % of carbon black, wherein a weight ratio of the carbon nanotubes to the carbon black is in a range of 3:7 to 1:7.