Patents by Inventor Dae-gyu Park
Dae-gyu Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 12187714Abstract: The present invention provides an improved process for preparing an aminopyrimidine derivative or pharmaceutically acceptable salt thereof having a selective inhibitory activity against protein kinases, especially against the protein kinases for mutant epidermal growth factor receptors. Additionally, the present invention provides novel intermediates useful for said process and processes for preparing the same.Type: GrantFiled: June 2, 2023Date of Patent: January 7, 2025Assignee: Yuhan CorporationInventors: Sang-Ho Oh, Ja-Heouk Khoo, Jong-Chul Lim, Seong-Ran Lee, Hyun Ju, Woo-Seob Shin, Dae-Gyu Park, Su-Min Park, Yoon-Ah Hwang
-
Publication number: 20230312545Abstract: The present invention provides an improved process for preparing an aminopyrimidine derivative or pharmaceutically acceptable salt thereof having a selective inhibitory activity against protein kinases, especially against the protein kinases for mutant epidermal growth factor receptors. Additionally, the present invention provides novel intermediates useful for said process and processes for preparing the same.Type: ApplicationFiled: June 2, 2023Publication date: October 5, 2023Inventors: Sang-Ho Oh, Ja-Heouk Khoo, Jong-Chul Lim, Seong-Ran Lee, Hyun Ju, Woo-Seob Shin, Dae-Gyu Park, Su-Min Park, Yoon-Ah Hwang
-
Patent number: 11708362Abstract: The present invention provides an improved process for preparing an aminopyrimidine derivative or pharmaceutically acceptable salt thereof having a selective inhibitory activity against protein kinases, especially against the protein kinases for mutant epidermal growth factor receptors. Additional, the present invention provides novel intermediates useful for said process and processes for preparing the same.Type: GrantFiled: March 25, 2022Date of Patent: July 25, 2023Assignee: Yuhan CorporationInventors: Sang-Ho Oh, Ja-Heouk Khoo, Jong-Chul Lim, Seong-Ran Lee, Hyun Ju, Woo-Seob Shin, Dae-Gyu Park, Su-Min Park, Yoon-Ah Hwang
-
Publication number: 20220281861Abstract: The present invention provides an improved process for preparing an aminopyrimidine derivative or pharmaceutically acceptable salt thereof having a selective inhibitory activity against protein kinases, especially against the protein kinases for mutant epidermal growth factor receptors. Additional, the present invention provides novel intermediates useful for said process and processes for preparing the same.Type: ApplicationFiled: March 25, 2022Publication date: September 8, 2022Inventors: Sang-Ho Oh, Ja-Heouk Khoo, Jong-Chul Lim, Seong-Ran Lee, Hyun Ju, Woo-Seob Shin, Dae-Gyu Park, Su-Min Park, Yoon-Ah Hwang
-
Patent number: 11286253Abstract: The present invention provides an improved process for preparing an aminopyrimidine derivative or pharmaceutically acceptable salt thereof having a selective inhibitory activity against protein kinases, especially against the protein kinases for mutant epidermal growth factor receptors. Additional, the present invention provides novel intermediates useful for said process and processes for preparing the same.Type: GrantFiled: December 8, 2020Date of Patent: March 29, 2022Assignee: Yuhan CorporationInventors: Sang-Ho Oh, Ja-Heouk Khoo, Jong-Chul Lim, Seong-Ran Lee, Hyun Ju, Woo-Seob Shin, Dae-Gyu Park, Su-Min Park, Yoon-Ah Hwang
-
Publication number: 20210269427Abstract: The present invention provides an improved process for preparing an aminopyrimidine derivative or pharmaceutically acceptable salt thereof having a selective inhibitory activity against protein kinases, especially against the protein kinases for mutant epidermal growth factor receptors. Additional, the present invention provides novel intermediates useful for said process and processes for preparing the same.Type: ApplicationFiled: December 8, 2020Publication date: September 2, 2021Inventors: Sang-Ho Oh, Ja-Heouk Khoo, Jong-Chul Lim, Seong-Ran Lee, Hyun Ju, Woo-Seob Shin, Dae-Gyu Park, Su-Min Park, Yoon-Ah Hwang
-
Patent number: 10889578Abstract: The present invention provides an improved process for preparing an aminopyrimidine derivative or pharmaceutically acceptable salt thereof having a selective inhibitory activity against protein kinases, especially against the protein kinases for mutant epidermal growth factor receptors. And also, the present invention provides novel intermediates useful for said process and processes for preparing the same.Type: GrantFiled: July 25, 2018Date of Patent: January 12, 2021Assignee: Yuhan CorporationInventors: Sang-Ho Oh, Ja-Heouk Khoo, Jong-Chul Lim, Seong-Ran Lee, Hyun Ju, Woo-Seob Shin, Dae-Gyu Park, Su-Min Park, Yoon-Ah Hwang
-
Publication number: 20200320305Abstract: The present invention relates to a sports game recording and broadcasting system which broadcasts a local amateur sports game using an ordinary camera or smartphone camera, rather than an expensive camera for sports game, for economical and stereoscopically dynamic broadcasting and game-records inputting of the local amateur sports game. Particularly, the present invention relates to a sports game recording and broadcasting system which can systematically input and manage, in an easy and convenient manner through a touch-type recording terminal, game records of local amateur sports players participating in the sports game.Type: ApplicationFiled: March 19, 2018Publication date: October 8, 2020Applicant: SECOND GROUND INC.Inventor: Dae Gyu PARK
-
Publication number: 20200165236Abstract: The present invention provides an improved process for preparing an aminopyrimidine derivative or pharmaceutically acceptable salt thereof having a selective inhibitory activity against protein kinases, especially against the protein kinases for mutant epidermal growth factor receptors. And also, the present invention provides novel intermediates useful for said process and processes for preparing the same.Type: ApplicationFiled: July 25, 2018Publication date: May 28, 2020Inventors: Sang-Ho OH, Ja-Heouk KHOO, Jong-Chul LIM, Seong-Ran LEE, Hyun JU, Woo-Seob SHIN, Dae-Gyu PARK, Su-Min PARK, Yoon-Ah HWANG
-
Patent number: 9812599Abstract: A method of forming a semiconductor material of a photovoltaic device that includes providing a surface of a hydrogenated amorphous silicon containing material, and annealing the hydrogenated amorphous silicon containing material in a deuterium containing atmosphere. Deuterium from the deuterium-containing atmosphere is introduced to the lattice of the hydrogenated amorphous silicon containing material through the surface of the hydrogenated amorphous silicon containing material. In some embodiments, the deuterium that is introduced to the lattice of the hydrogenated amorphous silicon containing material increases the stability of the hydrogenated amorphous silicon containing material.Type: GrantFiled: August 3, 2015Date of Patent: November 7, 2017Assignee: International Business Machines CorporationInventors: Bahman Hekmatshoar-Tabari, Marinus Hopstaken, Dae-Gyu Park, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
-
Patent number: 9711417Abstract: A semiconductor fin including a single crystalline semiconductor material is formed on a dielectric layer. A semiconductor shell including an epitaxial semiconductor material is formed on all physically exposed surfaces of the semiconductor fin by selective epitaxy, which deposits the semiconductor material only on semiconductor surfaces and not on dielectric surfaces. The epitaxial semiconductor material can be different from the single crystalline semiconductor material, and the semiconductor shell can be bilaterally strained due to lattice mismatch. A fin field effect transistor including a strained channel can be formed. Further, the semiconductor shell can advantageously alter properties of the source and drain regions, for example, by allowing incorporation of more dopants or by facilitating a metallization process.Type: GrantFiled: July 11, 2016Date of Patent: July 18, 2017Assignee: International Business Machines CorporationInventors: Kevin K. Chan, Young-Hee Kim, Masaharu Kobayashi, Jinghong Li, Dae-Gyu Park
-
Patent number: 9711416Abstract: A semiconductor fin including a single crystalline semiconductor material is formed on a dielectric layer. A semiconductor shell including an epitaxial semiconductor material is formed on all physically exposed surfaces of the semiconductor fin by selective epitaxy, which deposits the semiconductor material only on semiconductor surfaces and not on dielectric surfaces. The epitaxial semiconductor material can be different from the single crystalline semiconductor material, and the semiconductor shell can be bilaterally strained due to lattice mismatch. A fin field effect transistor including a strained channel can be formed. Further, the semiconductor shell can advantageously alter properties of the source and drain regions, for example, by allowing incorporation of more dopants or by facilitating a metallization process.Type: GrantFiled: July 11, 2016Date of Patent: July 18, 2017Assignee: International Business Machines CorporationInventors: Kevin K. Chan, Young-Hee Kim, Masaharu Kobayashi, Jinghong Li, Dae-Gyu Park
-
Patent number: 9679775Abstract: An approach to providing a method of forming a dopant junction in a semiconductor device. The approach includes performing a surface modification treatment on an exposed surface of a semiconductor layer and depositing a dopant material on the exposed surface of the semiconductor layer. Furthermore, the approach includes alloying a metal layer with a dopant layer to form a semiconductor device junction where the semiconductor layer is composed of a Group III-V semiconductor material, the surface modification treatment occurs in a vacuum chamber to remove surface oxides from the exposed surface of the semiconductor layer, and each of the above processes occur at a low temperature.Type: GrantFiled: July 15, 2016Date of Patent: June 13, 2017Assignee: International Business Machines CorporationInventors: Kevin K. Chan, Marinus J. P. Hopstaken, Young-Hee Kim, Masaharu Kobayashi, Effendi Leobandung, Deborah A. Neumayer, Dae-Gyu Park, Uzma Rana, Tsong-Lin Tai
-
Patent number: 9590054Abstract: Embodiments of the present invention provide semiconductor structures and methods for making the same that include a boron nitride (BN) spacer on a gate stack, such as a gate stack of a planar FET or FinFET. The boron nitride spacer is fabricated using atomic layer deposition (ALD) and/or plasma enhanced atomic layer deposition (PEALD) techniques to produce a boron nitride spacer at relatively low temperatures that are conducive to devices made from materials such as silicon (Si), silicon germanium (SiGe), germanium (Ge), and/or III-V compounds. Furthermore, the boron nitride spacer may be fabricated to have various desirable properties, including a hexagonal textured structure.Type: GrantFiled: January 20, 2016Date of Patent: March 7, 2017Assignee: International Business Machines CorporationInventors: Kevin K. Chan, Alfred Grill, Deborah A. Neumayer, Dae-Gyu Park, Norma E. Sosa, Min Yang
-
Patent number: 9576964Abstract: At least one dielectric pad layer is formed on a semiconductor-on-insulator (SOI) substrate. A deep trench is formed in the SOI substrate, and a combination of an outer electrode, a node dielectric, and an inner electrode are formed such that the top surface of the inner electrode is recessed below the top surface of a buried insulator layer of the SOI substrate. Selective epitaxy is performed to fill a cavity overlying the inner electrode with an epitaxial semiconductor material portion. A top semiconductor material layer and the epitaxial semiconductor material portion are patterned to form a fin structure including a portion of the top semiconductor material layer and a portion of the epitaxial semiconductor material portion. The epitaxial semiconductor material portion functions as a conductive strap structure between the inner electrode and a semiconductor device to be formed on the fin structure.Type: GrantFiled: April 5, 2013Date of Patent: February 21, 2017Assignee: INTERNATIONAL BUSINESSS MACHINES CORPORATIONInventors: Kevin K. Chan, Babar A. Khan, Dae-Gyu Park, Xinhui Wang
-
Patent number: 9564444Abstract: At least one dielectric pad layer is formed on a semiconductor-on-insulator (SOI) substrate. A deep trench is formed in the SOI substrate, and a combination of an outer electrode, a node dielectric, and an inner electrode are formed such that the top surface of the inner electrode is recessed below the top surface of a buried insulator layer of the SOI substrate. Selective epitaxy is performed to fill a cavity overlying the inner electrode with an epitaxial semiconductor material portion. A top semiconductor material layer and the epitaxial semiconductor material portion are patterned to form a fin structure including a portion of the top semiconductor material layer and a portion of the epitaxial semiconductor material portion. The epitaxial semiconductor material portion functions as a conductive strap structure between the inner electrode and a semiconductor device to be formed on the fin structure.Type: GrantFiled: October 3, 2015Date of Patent: February 7, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kevin K. Chan, Babar A. Khan, Dae-Gyu Park, Xinhui Wang
-
Patent number: 9564505Abstract: Ion implantation to change an effective work function for dual work function metal gate integration is presented. One method may include forming a high dielectric constant (high-k) layer over a first-type field effect transistor (FET) region and a second-type FET region; forming a metal layer having a first effective work function compatible for a first-type FET over the first-type FET region and the second-type FET region; and changing the first effective work function to a second, different effective work function over the second-type FET region by implanting a species into the metal layer over the second-type FET region.Type: GrantFiled: April 17, 2014Date of Patent: February 7, 2017Assignee: GLOBALFOUNDRIES INC.Inventors: Michael P. Chudzik, Martin M. Frank, Herbert L. Ho, Mark J. Hurley, Rashmi Jha, Naim Moumen, Vijay Narayanan, Dae-Gyu Park, Vamsi K. Paruchuri
-
Patent number: 9553107Abstract: A method for fabricating a semiconductor device includes receiving a finned substrate comprising an isolation layer with a plurality of semiconductor fins formed thereon, forming a gate structure over a fin that comprises a gate and a seed layer disposed below the gate and immediately adjacent to the fin, and epitaxially growing a gate extender from the seed layer that laterally extends over a source or drain region of the fin. In one embodiment, a semiconductor device includes a finned substrate comprising an isolation layer with a plurality of semiconductor fins formed thereon, a gate structure formed over a fin of the plurality of fins, the gate structure comprising a gate and a seed layer disposed below the gate and immediately adjacent to the fin, and a gate extender epitaxially grown from the seed layer that laterally extends over a source or drain region of the fin.Type: GrantFiled: January 14, 2016Date of Patent: January 24, 2017Assignee: International Business Machines CorporationInventors: Kevin K. Chan, Pouya Hashemi, Effendi Leobandung, Dae-Gyu Park, Min Yang
-
Publication number: 20160329211Abstract: An approach to providing a method of forming a dopant junction in a semiconductor device. The approach includes performing a surface modification treatment on an exposed surface of a semiconductor layer and depositing a dopant material on the exposed surface of the semiconductor layer. Furthermore, the approach includes alloying a metal layer with a dopant layer to form a semiconductor device junction where the semiconductor layer is composed of a Group III-V semiconductor material, the surface modification treatment occurs in a vacuum chamber to remove surface oxides from the exposed surface of the semiconductor layer, and each of the above processes occur at a low temperature.Type: ApplicationFiled: July 15, 2016Publication date: November 10, 2016Inventors: Kevin K. Chan, Marinus J.P. Hopstaken, Young-Hee Kim, Masaharu Kobayashi, Effendi Leobandung, Deborah A. Neumayer, Dae-Gyu Park, Uzma Rana, Tsong-Lin Tai
-
Publication number: 20160322264Abstract: A semiconductor fin including a single crystalline semiconductor material is formed on a dielectric layer. A semiconductor shell including an epitaxial semiconductor material is formed on all physically exposed surfaces of the semiconductor fin by selective epitaxy, which deposits the semiconductor material only on semiconductor surfaces and not on dielectric surfaces. The epitaxial semiconductor material can be different from the single crystalline semiconductor material, and the semiconductor shell can be bilaterally strained due to lattice mismatch. A fin field effect transistor including a strained channel can be formed. Further, the semiconductor shell can advantageously alter properties of the source and drain regions, for example, by allowing incorporation of more dopants or by facilitating a metallization process.Type: ApplicationFiled: July 11, 2016Publication date: November 3, 2016Applicant: International Business Machines CorporationInventors: Kevin K. Chan, Young-Hee Kim, Masaharu Kobayashi, Jinghong Li, Dae-Gyu Park