Abstract: A display device includes a display panel including a main portion, a first bent portion and a second bent portion each extending from the main portion, and a corner portion which connects the first bent portion and the second bent portion to each other and is bendable relative to the main portion. The corner portion which is bendable includes a plurality of protrusion patterns partially disconnected from each other and each bendable relative to the main portion, and each of the plurality of protrusion patterns including a display pixel.

Abstract: The present disclosure relates to a light-emitting element structure and a display device. According to one or more embodiments, the display device includes a growth substrate, light-emitting elements including a first light-emitting element for emitting light of a first wavelength and a second light-emitting element for emitting light of a second wavelength on the growth substrate, and including current-spreading layers including a first current-spreading layer having a first width on the first light-emitting element and a second current-spreading layer having a second width that is less than the first width on the second light-emitting element, and an insulating layer between the light-emitting elements.

Abstract: A display device includes: a first pixel electrode comprising a first reflective electrode in a first emission area, a first light transmitting pattern on the first reflective electrode, and a first light transmitting electrode on the first reflective electrode and the first light transmitting pattern and connected to the first reflective electrode; a second pixel electrode comprising a second reflective electrode in a second emission area and a second light transmitting electrode on the second reflective electrode; a light emitting stack on the first and second pixel electrodes and comprising at least one light emitting layer; a common electrode on the light emitting stack; and a bank pattern surrounding the first and second emission areas, and having at least a portion between the first emission area and the second emission area, wherein the first light transmitting pattern and the bank pattern contain a same material and are spaced apart.

Abstract: A display device includes a lower metal layer disposed on a surface of a substrate and including a first opening overlapping a rear emission pixel in a plan view; a first electrode and a second electrode disposed in each of the rear emission pixel and a front emission pixel, the first electrode and the second electrode being spaced apart from each other on the lower metal layer; first light emitting elements disposed between the first electrode and the second electrode disposed in the rear emission pixel; second light emitting elements disposed between the first electrode and the second electrode disposed in the front emission pixel; and a reflective layer disposed on the first light emitting elements and overlapping the rear emission pixel in a plan view, the reflective layer overlaps at least one of the first light emitting elements in a plan view.

Abstract: The present disclosure relates to a heterocyclic compound represented by Chemical Formula 1, an organic light emitting device including the same, and a composition for an organic material layer: in Chemical Formula 1, each substituent has the same definition as described in the detailed description.

Abstract: Disclosed is a method for removing nitrogen and phosphorus from sewage and wastewater through a combination of a biological nitrogen and phosphorus removal process using nitrite nitrogen and an anaerobic ammonium oxidation process. An objective of an embodiment of the present invention is to provide an apparatus for removing nitrogen and phosphorus in which, by inducing a denitritation- and nitritation-based biological nitrogen and phosphorus removal process in a bioreactor and applying an anaerobic ammonium oxidation process, nitrogen and phosphorus can be economically and effectively removed without separately injecting organic materials.

Abstract: A novel compound for a capping layer, and an organic light emitting device containing the same are disclosed.

Abstract: A novel compound for a light emitting device, and an organic light emitting device containing the same are disclosed.

Abstract: A polyesterimide resin composition, a polyesterimide resin layer, a flexible metal foil laminate, and methods of preparing the polyesterimide resin composition, the polyesterimide resin layer, and the flexible metal foil laminate are provided. The polyesterimide resin composition includes a compound having a structural unit represented by Chemical Formula 1: In Chemical Formula 1, m and n are mole fractions, and “m+n=1” “0.2?m?0.8” and “0.2?n?0.8” are satisfied. Ar1 and Ar2 are the same as or different from each other and are each independently a tetravalent organic group having at least one aromatic ring. R1, R2, and R4 to R6 each independently include at least one of —H, —F, —CH3, —OCH3, —CF3, and —OCF3. R3 is an ester group and includes —COO— or —OOC—.

Abstract: The present invention provides antisense oligonucleotides for the treatment of various T-type calcium channel ?1G subunit-related disorders, and more specifically, antisense oligonucleotides for inhibiting expression of the gene encoding Cav3.1, targeting SEQ ID NO: 1, for the treatment of various neuropsychiatric disorders, including Parkinson's disease, epilepsy, essential tremor, depression, anxiety disorders, and unconsciousness.

Abstract: A novel compound for a capping layer, and an organic light-emitting device containing the same are disclosed.

Abstract: An electronic device including a memory device with improved reliability is provided. The semiconductor device comprises a data pin configured to transmit a data signal, a command/address pin configured to transmit a command and an address, a command/address receiver connected to the command/address pin, and a computing unit connected to the command/address receiver, wherein the command/address receiver receives a first command and a first address from the outside through the command/address pin and generates a first instruction on the basis of the first command and the first address, and the computing unit receives the first instruction and performs computation based on the first instruction.

Abstract: An operation method of a memory device, having a plurality of memory cells, includes receiving a partial write command, which includes a partial write enable signal (PWE) and a plurality of mask signals, during a command/address input interval. A data strobe signal is received through a data strobe line after receiving the partial write command Data is received through a plurality of data lines in synchronization with the data strobe signal during a data input interval. A part of the data is stored in the plurality of memory cells based on the plurality of mask signals, in response to the partial write enable signal, during a data write interval.

Abstract: An operation method of a memory controller, which is configured to control a memory module including a plurality of memory devices and at least one error correction code (ECC) device, is provided. The method includes reading a data set including user data stored in the plurality of memory devices and ECC data stored in the at least one ECC device, based on a read command and a first address, and writing uncorrectable data in a memory area, which is included in each of the plurality of memory devices and the at least one ECC device and corresponds to the first address, when an error of the user data is not corrected based on the ECC data.

Abstract: A memory module includes a memory device configured to receive a first refresh command from a host, and perform a refresh operation in response to the first refresh command during a refresh time, and a computing unit configured to detect the first refresh command provided from the host to the memory device, and write a first error pattern at a first address of the memory device during the refresh time.

Abstract: An operation method of a memory device, having a plurality of memory cells, includes receiving a partial write command, which includes a partial write enable signal (PWE) and a plurality of mask signals, during a command/address input interval. A data strobe signal is received through a data strobe line after receiving the partial write command Data is received through a plurality of data lines in synchronization with the data strobe signal during a data input interval. A part of the data is stored in the plurality of memory cells based on the plurality of mask signals, in response to the partial write enable signal, during a data write interval.

Abstract: A method for accessing a memory module includes; encoding first data of a first partial burst length to generate first parities and first cyclic redundancy codes, encoding second data of a second partial burst length to generate second parities and second cyclic redundancy codes, writing the first data and the second data to first memory devices, and writing the first parities, the first cyclic redundancy codes, the second parities, and the second cyclic redundancy codes to a second memory device and a third memory device.

Abstract: Memory systems include a first semiconductor memory module and a processor. The processor is configured to access the first semiconductor memory module by units of a page, and further configured to respond to an occurrence of a page fault in a specific page, which is associated with a virtual address corresponding to an access target, by adjusting a number of pages and allocating pages in the first semiconductor memory module corresponding to the adjusted number of the pages, which are associated with the virtual address.

Abstract: An electronic device including a memory device with improved reliability is provided. The semiconductor device comprises a data pin configured to transmit a data signal, a command/address pin configured to transmit a command and an address, a command/address receiver connected to the command/address pin, and a computing unit connected to the command/address receiver, wherein the command/address receiver receives a first command and a first address from the outside through the command/address pin and generates a first instruction on the basis of the first command and the first address, and the computing unit receives the first instruction and performs computation based on the first instruction.

Abstract: Disclosed is a bio illuminance measuring apparatus including a circadian lambda filter passing external light along according to a circadian rhythm sensitivity curve, a visual lambda filter passing the external light along according to a visual sensitivity curve, a photo sensing portion sensing and converting the external light, which has passed through the circadian lambda filter, into a circadian wavelength signal and sensing and converting the external light, which has passed through the visual lambda filter, into a visual wavelength signal, and an illuminance calculating portion which calculates a ratio between the circadian wavelength signal and the visual wavelength signal, calculates a circadian action factor by applying the ratio between the circadian wavelength signal and the visual wavelength signal to a circadian action function which varies according to the visual wavelength signal, and calculates a bio illuminance value of the external light on the basis of the circadian action factor.