Abstract: Spaced apart bonding surfaces are formed on a first substrate. A second substrate is bonded to the bonding surfaces of the first substrate and cleaved to leave respective semiconductor regions from the second substrate on respective ones of the spaced apart bonding surfaces of the first substrate. The bonding surfaces may include surfaces of at least one insulating region on the first substrate, and at least one active device may be formed in and/or on at least one of the semiconductor regions. A device isolation region may be formed adjacent the at least one of the semiconductor regions.

Abstract: In a method of recycling a substrate having an edge portion on which a stepped portion is formed, the substrate is chemically mechanically polished using a first slurry composition including fumed silica to remove the stepped portion. The substrate is then chemically mechanically polished using a second slurry composition including colloidal silica to improve the surface roughness of the substrate. The substrate having the edge region on which the stepped portion is formed may include a donor substrate used for manufacturing a silicon-on-insulator (SOI) substrate.

Abstract: Methods of fabricating a semiconductor device include forming a mask pattern on a semiconductor substrate and which exposes defined regions of the semiconductor substrate. Oxygen ions are implanted into the defined regions of the semiconductor substrate using the mask pattern as an ion implantation mask. The oxygen ion implanted regions of the semiconductor substrate are annealed at one or more temperatures in a range that is sufficiently high to form silicon oxide substantially throughout the oxygen ion implanted regions by reacting the implanted oxygen ions with silicon in the oxygen ion implanted regions, and that is sufficiently low to substantially prevent oxidation of the semiconductor substrate adjacent to the oxygen ion implanted regions.

Abstract: A method of fabricating a three-dimensional semiconductor device is provided along with a three-dimensional semiconductor device fabricated thereby. The method includes forming a heat conductive plug to channel heat away from devices on a substrate, while high temperature processes are performed on a stacked semiconductor layer. The ability to use high temperature processes on the stacked semiconductor layer without adversely effecting devices on the substrate allows the formation of a high quality single-crystalline stacked semiconductor layer. The high quality single-crystalline semiconductor layer can then be used to fabricate improved thin film transistors.

Abstract: Integrated circuit contact structures are fabricated by forming a first layer comprising niobium (Nb) on a silicon substrate and forming a second layer comprising a near noble metal on the first layer, opposite the silicon substrate. The near noble metal, also referred to as a Group VIII metal, is preferably cobalt (Co). The near noble metal has higher diffusion coefficient than the niobium and the silicon substrate. Annealing is then performed to diffuse at least some of the near noble metal through the first layer and react the diffused near noble metal with the silicon substrate to form a third layer comprising a near noble metal silicide, and to form a fourth layer comprising niobium-near noble metal alloy on the third layer. It has been found that the use of niobium can reduce substrate consumption compared to conventional cobalt titanium double-metal silicide fabrication processes.

Abstract: Integrated circuit contact structures are fabricated by forming a first layer comprising niobium (Nb) on a silicon substrate and forming a second layer comprising a near noble metal on the first layer, opposite the silicon substrate. The near noble metal, also referred to as a Group VIII metal, is preferably cobalt (Co). The near noble metal has higher diffusion coefficient than the niobium and the silicon substrate. Annealing is then performed to diffuse at least some of the near noble metal through the first layer and react the diffused near noble metal with the silicon substrate to form a third layer comprising a near noble metal silicide, and to form a fourth layer comprising niobium-near noble metal alloy on the third layer. It has been found that the use of niobium can reduce substrate consumption compared to conventional cobalt titanium double-metal silicide fabrication processes.