Abstract: A non-volatile memory device including: a page buffer configured to latch a plurality of page data constituting one bit page of a plurality of bit pages, and a control logic configured to compare results of a plurality of read operations performed in response to a high-priority read signal set to select one of a plurality of read signals included in the high-priority read signal set as a high-priority read signal, and determine a low-priority read signal corresponding to the high-priority read signal, wherein the high-priority read signal set is for reading high-priority page data, and the low-priority read signal is for reading low-priority page data.

Abstract: A foldable display comprises a flexible display panel including a screen which displays an image; a measuring part configured to measure a folding angle of the flexible display panel; and an image processor configured to vary a size of the image displayed on the screen and a size of a black pattern displayed on the screen of the flexible display panel while the folding angle of the flexible display panel is varied.

Abstract: The non-volatile memory device includes a memory cell array including a plurality of memory cells and a voltage generator configured to supply a voltage to the memory cell array. The voltage generator includes a charge pump circuit, a switching circuit, and a stage controller. The charge pump circuit includes a plurality of pump units and is configured to output a pump voltage and a pump current in accordance with a number of pump units that have received an input voltage among the plurality of pump units. The switching circuit is configured to output the pump voltage. The stage controller is configured to receive an input signal corresponding to the pump current and perform a stage control operation of generating a stage control signal for controlling the number of pump units to be driven.

Abstract: Disclosed herein are a gate driving circuit and a flexible display using the same. In gate driving circuit, a control block including an nth controller configured to generate one among a gate-off voltage, an EM start signal, and a carry signal from a (n?1)th EM signal transfer part as an nth EM output control signal to apply the nth EM output control signal to a start terminal of an nth EM signal transfer part on the basis of an nth scan signal (n is a natural number) from the first shift register, a first control signal designating an off-driving signal transfer parts and an on-driving signal transfer parts among the EM signal transfer parts, a second control signal designating a first on-driving signal transfer part, and a third control signal designating second to last on-driving signal transfer parts.

Abstract: A semiconductor wafer includes unit regions that are repeatedly arranged, and each unit region of the unit regions includes: at least one first chip region; and at least one second chip region spaced apart from the at least one first chip region by a scribe line, wherein a first area size of each of the at least one first chip region is different from a second area size of each of the at least one second chip region from a planar viewpoint.

Abstract: Provided is a semiconductor memory device. In order to permit dense integration of a high number of stacked word lines in the semiconductor memory device, a charge pump is included in the semiconductor Mary device. The charge pump makes use of a capacitor. The capacitor is implemented with respect to the dense integration. Some components are placed under the stacked word lines, and some are not under the stacked word lines. The capacity of the capacitor not under the stacked word lines is provided in part by a parallel structure.

Abstract: A non-volatile memory device including: a page buffer configured to latch a plurality of page data constituting one bit page of a plurality of bit pages, and a control logic configured to compare results of a plurality of read operations performed in response to a high-priority read signal set to select one of a plurality of read signals included in the high-priority read signal set as a high-priority read signal, and determine a low-priority read signal corresponding to the high-priority read signal, wherein the high-priority read signal set is for reading high-priority page data, and the low-priority read signal is for reading low-priority page data.

Abstract: An interior material of a vehicle includes: a fabric layer made of a tricoat fabric, a foam layer disposed on a lower surface of the fabric layer, and an antifouling layer disposed at least between an upper surface of the fabric layer or the fabric layer and the foam layer. The tricoat fabric includes a combination of at least one of a polyurethane yarn, a high-elongation polyester yarn, or a polyester yarn.

Abstract: A semiconductor device includes a first semiconductor chip including bitlines, wordlines, common source line, first bonding pads, second bonding pads, third bonding pads and memory cells, the memory cells being electrically connected to the bitlines, the wordlines, and the common source line, the first bonding pads being electrically connected to the bitlines, the second bonding pads being electrically connected to the wordlines, and the third bonding pads being electrically connected to the common source line; a second semiconductor chip including fourth bonding pads, fifth bonding pads, sixth bonding pads and an input/output circuit, the fourth bonding pads being electrically connected to the first bonding pads, the fifth bonding pads being electrically connected to the second bonding pads, the sixth bonding pads being electrically connected to the third bonding pads and the input/output circuit being configured to write data to the memory cells via the fourth bonding pads and the fifth bonding pads; a sens

Abstract: A semiconductor device includes a first semiconductor chip, a second semiconductor chip, an input/output circuit, a sensing line, and a detecting circuit. The first semiconductor chip includes bitlines, wordlines, first bonding pads electrically connected to the bitlines, second bonding pads electrically connected to the wordlines, and memory cells electrically connected to the bitlines and the wordlines. The second semiconductor chip includes third bonding pads that are electrically connected to the first bonding pads and fourth bonding pads that are electrically connected to the second bonding pads. The input/output circuit writes data to the memory cells via the third bonding pads. The sensing line extends along edge portions of at least one of the first and second semiconductor chips. The detecting circuit is in the second semiconductor chip and can detect defects from at least one of the first and second semiconductor chips using the sensing line.

Abstract: Provided are a die pickup module and a die bonding apparatus including the same. The die pickup module includes a wafer stage for supporting a wafer including dies attached on a dicing tape, a die ejector arranged under the dicing tape and for separating a die to be picked up from the dicing tape, a non-contact picker for picking up the die in a non-contact manner so as not to contact a front surface of the die, a vertical driving unit for moving the non-contact picker in a vertical direction to pick up the die and an inverting driving unit for inverting the non-contact picker to invert a die picked up by the non-contact picker.

Abstract: The present disclosure relates to a substrate processing apparatus and a substrate processing method using the same, the substrate processing method including: introducing a substrate into a chamber; processing the substrate while heating the substrate by using a heat source unit provided in the chamber; and reciprocating at least any one of the substrate and the heat source unit in an extending direction of the substrate. Thus, while the substrate is processed, the temperature of the substrate may be uniformly adjusted, and the efficiency of thermal processing of the substrate may thereby be improved.

Abstract: A non-volatile memory device including: a page buffer configured to latch a plurality of page data constituting one bit page of a plurality of bit pages, and a control logic configured to compare results of a plurality of read operations performed in response to a high-priority read signal set to select one of a plurality of read signals included in the high-priority read signal set as a high-priority read signal, and determine a low-priority read signal corresponding to the high-priority read signal, wherein the high-priority read signal set is for reading high-priority page data, and the low-priority read signal is for reading low-priority page data.

Abstract: There are provided a method of operating a voltage generator. The method includes providing a reference voltage, sensing a magnitude of a charge current for increasing voltages of a plurality of word lines based on the reference voltage, determining whether the sensed magnitude of the charge current is greater than a peak current value, increasing the reference voltage in accordance with a first slope when the sensed magnitude of the charge current is less than or equal to the peak current value, and increasing the reference voltage in accordance with a second slope less than the first slope when the detected magnitude of the charge current is greater than the peak current value.

Abstract: A nonvolatile memory device may include a page buffer including a plurality of latch sets that latch each page datum of selected memory cells among a plurality of memory cells according to each of read signal sets including at least one read signal, and a control logic configured to detect a degradation level of the memory cells and determine a read parameter applied to at least one of the read signal sets based on the detected degradation level.

Abstract: A vehicle for estimating a moving path of an object approaching from behind, and determining a probability for entering a rear lane and a probability of collision is provided. The vehicle includes a speed sensor that detects speed information, a direction sensor that detects driving direction information, and a radar that senses an object approaching the vehicle. A controller then estimates a moving path of an object traveling on a rear lane and approaching the vehicle from behind and determines whether the vehicle is able to enter the rear lane, based on the speed information acquired by the speed sensor, the driving direction information acquired by the direction sensor, and data of the object sensed by the radar. Accordingly, the controller detects a probability of collision with the object approaching the vehicle on the rear lane.

Abstract: A storage device including, a plurality of non-volatile memories configured to include a memory cell region including at least one first metal pad; and a peripheral circuit region including at least one second metal pad and vertically connected to the memory cell region by the at least one first metal pad and the at least one second metal pad, and a controller connected to the plurality of non-volatile memories through a plurality of channels and configured to control the plurality of non-volatile memories, wherein the controller selects one of a first read operation mode and a second read operation mode and transfers a read command corresponding to the selected read operation mode to the plurality of non-volatile memories, wherein one sensing operation is performed to identify one program state among program sates in the first read operation mode, and wherein at least two sensing operations are performed to identify the one program state among the program states in the second read operation mode.

Abstract: A method for initializing a channel in a non-volatile memory device comprising a memory block including a plurality of word lines and a plurality of string selection lines, includes applying a voltage to the plurality of string selection lines; converting a bit line passing through the block into a floating state; and a releasing the floating state of the bit line.

Abstract: A foldable display comprises a flexible display panel including a screen which displays an image; a measuring part configured to measure a folding angle of the flexible display panel; and an image processor configured to vary a size of the image displayed on the screen and a size of a black pattern displayed on the screen of the flexible display panel while the folding angle of the flexible display panel is varied.

Abstract: The memory device includes a memory cell array including a plurality of memory cells and a voltage generator configured to supply a voltage to the memory cell array. The voltage generator includes a charge pump circuit, a switching circuit, and a stage controller. The charge pump circuit includes a plurality of pump units and is configured to output a pump voltage and a pump current in accordance with a number of pump units that have received an input voltage among the plurality of pump units. The switching circuit is configured to output the pump voltage. The stage controller is configured to receive an input signal corresponding to the pump current and perform a stage control operation of generating a stage control signal for controlling the number of pump units to be driven.