Patents by Inventor Dae-Sik Choi

Dae-Sik Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080313417
    Abstract: Provided are an apparatus and method of detecting and controlling a privilege level violation process. The apparatus monitors whether higher-privileged processes depend on information provided from lower-privileged objects or denies the higher-privileged processes to access the lower-privileged objects. The apparatus is provided in a process, and monitors whether a process accesses to a lower-privileged object. The apparatus gives a warning message or denies an access of the process to the lower-privileged object when it detects that the higher-privileged process access to the lower-privileged object. Therefore, the apparatus of detecting and controlling a privilege level violation process detects weaknesses that may be caused by privilege level violation, thus allowing a system to be safely operated.
    Type: Application
    Filed: March 26, 2008
    Publication date: December 18, 2008
    Inventors: Su Yong KIM, Dae Sik CHOI, Dong Hyun LEE, Do Hoon LEE
  • Publication number: 20080307006
    Abstract: Provided are a file mutation method and a system using file section information and mutation rules. The file mutation system includes: a file section information extraction module obtaining file section information with respect to a sample file of a known file format; a file section information production module producing file section information with respect to a sample file of an unknown format; a mutation rule production module receiving a user input that a mutation rule is applied and producing a mutation rule, the mutation rule defining a mutation function that is to be applied to each data type; and a file mutation module receiving the sample file and producing a plurality of test case files that are created by mutating the sample file through the file section information processed in the file section information extraction module and the file section information production module and the mutation rule from the mutation rule production module.
    Type: Application
    Filed: February 27, 2008
    Publication date: December 11, 2008
    Inventors: Dong Hyun LEE, Dae Sik CHOI, Do Hoon LEE
  • Patent number: 7425493
    Abstract: A capacitor including a dielectric structure, a lower electrode may be formed on a substrate. The dielectric structure may be formed on the lower electrode, and may include a first thin film, which may improve a morphology of the dielectric structure, and a second thin film, which may have at least one of an EOT larger than that of the first thin film and a dielectric constant higher than that of the first thin film. An upper electrode may be formed on the dielectric structure, and the dielectric structure may have an improved morphology and/or a higher dielectric constant.
    Type: Grant
    Filed: February 17, 2005
    Date of Patent: September 16, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoung-Ryul Yoon, Han-Mei Choi, Seung-Hwan Lee, Dae-Sik Choi, Ki-Yeon Park, Young-Sun Kim, Sung-Tae Kim, Cha-Young You
  • Patent number: 7279392
    Abstract: A thin film structure and a capacitor using the film structure and methods for forming the same. The thin film structure may include a first film formed on a substrate using a first reactant and an oxidant for oxidizing the first reactant. A second film may be formed on the first film to suppress crystallization of the first film. A capacitor may include a dielectric layer, which may further include the first thin film and the second thin film.
    Type: Grant
    Filed: February 1, 2005
    Date of Patent: October 9, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-Hwan Lee, Kyoung-Ryul Yoon, Han-Mei Choi, Dae-Sik Choi, Ki-Yeon Park, Sung-Tae Kim, Young-Sun Kim, Cha-Young Yoo
  • Publication number: 20060252281
    Abstract: A semiconductor device and/or gate structure having a composite dielectric layer and methods of manufacturing the same is provided. In the semiconductor device, gate structure, and methods provided, a first conductive layer may be formed on a substrate. A native oxide layer formed on the first conductive layer may be removed. A surface of the first conductive layer may be nitrided so that the surface may be altered into a nitride layer. A composite dielectric layer including the first and/or second dielectric layers may be formed on the nitride layer. A second conductive layer may be formed on the composite dielectric layer. The first dielectric layer may include a material having a higher dielectric constant. The second dielectric layer may be capable of suppressing crystallization of the first dielectric layer.
    Type: Application
    Filed: March 3, 2006
    Publication date: November 9, 2006
    Inventors: Ki-Yeon Park, Kyoung-Ryul Yoon, Dae-Sik Choi, Han-Mei Choi, Seung-Hwan Lee
  • Publication number: 20060141695
    Abstract: Methods of forming a zirconium hafnium oxide thin layer on a semiconductor substrate by supplying tetrakis(ethylmethylamino)zirconium ([Zr{N(C2H5)(CH3)}4], TEMAZ) and tetrakis(ethylmethylamino)hafnium ([Hf{N(C2H5)(CH3)}4], TEMAH) to a substrate are provided. The TEMAZ and the TEMAH may be reacted with an oxidizing agent. The thin layer including zirconium hafnium oxide may be used for a gate insulation layer in a gate structure, a dielectric layer in a capacitor, or a dielectric layer in a flash memory device.
    Type: Application
    Filed: November 22, 2005
    Publication date: June 29, 2006
    Inventors: Dae-Sik Choi, Kyoung-Ryul Yoon, Han-Mei Choi, Ki-Yeon Park, Seung-Hwan Lee, Sung-Tae Kim, Young-Sun Kim, Cha-Young Yoo
  • Publication number: 20060046387
    Abstract: Flash memory devices include a semiconductor substrate having an active region. A gate pattern on the active region includes a floating gate pattern and a control gate pattern with an inter-gate dielectric layer pattern therebetween. The inter-gate dielectric layer pattern includes a plurality of hafnium oxide layers and a plurality of aluminum oxide layers, ones of which are alternately arrayed.
    Type: Application
    Filed: July 13, 2005
    Publication date: March 2, 2006
    Inventors: Han-Mei Choi, Jong-Cheol Lee, Seung-Hwan Lee, Dae-Sik Choi, Ki-Yeon Park, Young-sun Kim, Cha-Young Yoo, Sung-Tae Kim
  • Publication number: 20050170566
    Abstract: A thin film structure and a capacitor using the film structure and methods for forming the same. The thin film structure may include a first film formed on a substrate using a first reactant and an oxidant for oxidizing the first reactant. A second film may be formed on the first film to suppress crystallization of the first film. A capacitor may include a dielectric layer, which may further include the first thin film and the second thin film.
    Type: Application
    Filed: February 1, 2005
    Publication date: August 4, 2005
    Inventors: Seung-Hwan Lee, Kyoung-Ryul Yoon, Han-Mei Choi, Dae-Sik Choi, Ki-Yeon Park, Sung-Tae Kim, Young-Sun Kim, Cha-Young Yoo
  • Publication number: 20050170601
    Abstract: A capacitor including a dielectric structure, a lower electrode may be formed on a substrate. The dielectric structure may be formed on the lower electrode, and may include a first thin film, which may improve a morphology of the dielectric structure, and a second thin film, which may have at least one of an EOT larger than that of the first thin film and a dielectric constant higher than that of the first thin film. An upper electrode may be formed on the dielectric structure, and the dielectric structure may have an improved morphology and/or a higher dielectric constant.
    Type: Application
    Filed: February 17, 2005
    Publication date: August 4, 2005
    Inventors: Kyoung-Ryul Yoon, Han-Mei Choi, Seung-Hwan Lee, Dae-Sik Choi, Ki-Yeon Park, Young-Sun Kim, Sung-Tae Kim, Cha-Young You