Abstract: The invention is directed to an improved semiconductor chip that reduces crack initiation and propagation into the active area of a semiconductor chip. A semiconductor wafer includes dicing channels that separate semiconductor chips and holes through a portion of a semiconductor chip, which are located at the intersection of the dicing channels. Once diced from the semiconductor wafer, semiconductor chips are created without ninety degree angle corners.

Abstract: The invention is directed to an improved semiconductor chip that reduces crack initiation and propagation into the active area of a semiconductor chip. A semiconductor wafer includes dicing channels that separate semiconductor chips and holes through a portion of a semiconductor chip, which are located at the intersection of the dicing channels. Once diced from the semiconductor wafer, semiconductor chips are created without ninety degree angle corners.

Abstract: The present invention provides bond pads structures between semiconductor integrated circuits and the chip package with enhanced resistance to fracture and improved reliability. Mismatch in the coefficient of temperature expansion (CTE) among the materials used in bond structures induces stress and shear on them that may result in fractures within the back end dielectric stacks and cause reliability problems of the packaging. By placing multiple metal pads which are connected to the bond pad through multiple metal via, the adhesion between the bond pads and the back end dielectric stacks is enhanced.

Abstract: Method of inhibiting metal diffusion arising from laser dicing is provided. The method includes dividing a wafer into at least one chip. The chip includes internal metallic features. The dividing deposits at least one metallic substance on the outer surface of the chip. After so dividing the chip, the method exposes the chip to a heated ambient environment having a given pressure (e.g., less than one atmosphere). The environment includes a chemical agent capable of bonding with the metallic substance. Additionally, wet chemical etch may be performed on the chip.

Abstract: Method of inhibiting metal diffusion arising from laser dicing is provided. The method includes dividing a wafer into at least one chip. The chip includes internal metallic features. The dividing deposits at least one metallic substance on the outer surface of the chip. After so dividing the chip, the method exposes the chip to a heated ambient environment having a given pressure (e.g., less than one atmosphere). The environment includes a chemical agent capable of bonding with the metallic substance. Additionally, wet chemical etch may be performed on the chip.

Abstract: A method of assembling a microelectronic flip-chip arrangement includes attaching a chip having a defined length to a supporting substrate, wherein the chip forms a chip shadow line of the defined length on the supporting substrate, creating a first non-wettable zone on an outer portion of the bottom surface of the chip, creating a second non-wettable zone on a portion of the supporting substrate outside the chip shadow line, underfilling the chip and forming a fillet, wherein the fillet does not extend beyond the chip shadow line, and hardening the underfill including the fillet.

Abstract: A crack stop void is formed in a low-k dielectric layer between adjacent fuse structures for preventing propagation of cracks between the adjacent fuse structures during a fuse blow operation. The crack stop void is formed simultaneously with the formation of an interconnect structure.

Abstract: The present invention provides bond pads structures between semiconductor integrated circuits and the chip package with enhanced resistance to fracture and improved reliability. Mismatch in the coefficient of temperature expansion (CTE) among the materials used in bond structures induces stress and shear on them that may result in fractures within the back end dielectric stacks and cause reliability problems of the packaging. By placing multiple metal pads which are connected to the bond pad through multiple metal via, the adhesion between the bond pads and the back end dielectric stacks is enhanced.

Abstract: The invention is directed to an improved semiconductor chip that reduces crack initiation and propagation into the active area of a semiconductor chip. A semiconductor wafer includes dicing channels that separate semiconductor chips and holes through a portion of a semiconductor chip, which are located at the intersection of the dicing channels. Once diced from the semiconductor wafer, semiconductor chips are created without ninety degree angle corners.

Abstract: The present invention provides bond pads structures between semiconductor integrated circuits and the chip package with enhanced resistance to fracture and improved reliability. Mismatch in the coefficient of temperature expansion (CTE) among the materials used in bond structures induces stress and shear on them that may result in fractures within the back end dielectric stacks and cause reliability problems of the packaging. By placing multiple metal pads which are connected to the bond pad through multiple metal via, the adhesion between the bond pads and the back end dielectric stacks is enhanced.

Abstract: Via stack structures are disclosed. In one embodiment, a structure includes a via stack including: a first substantially cross-shaped line in a first dielectric layer; a second substantially cross-shaped line set in a second dielectric layer, and a via stud coupling the first substantially cross-shaped line to the second substantially cross-shaped line. In another embodiment, a structure includes a first via stack, and a second via stack, wherein the first via stack and the second via stack extend in a divergent manner from one another. Each via stack structure is useful for support, for example, in under wire bond applications. The via stack structures can be mixed with other via stack structures and selectively placed within a layout to replace conventional metal plate and via stud array configurations.

Abstract: A method of compensating for channel interference of a display apparatus and a device for controlling driving of a data signal are provided. The method of compensating for the channel interference of the display apparatus includes: receiving pixel data of a scan line selected from an external screen memory; summing up the received pixel data and detecting a compensation time for compensating for channel interference which occurs in the selected scan line by using the sum of the pixel data; and adjusting at least one of a discharge time and a peak boost time of a driving current that is output to each data line according to the detected compensation time. Accordingly, it is possible to solve problems such as an increase of the circuit size caused by the existing compensation for the channel interference by controlling the discharge period or peak boost period with respect to each scan line and compensating for the channel interference phenomenon.

Abstract: The present invention relates to a laser fuse structure for high power applications. Specifically, the laser fuse structure of the present invention comprises first and second conductive supporting elements (12a, 12b), at least one conductive fusible link (14), first and second connection elements (20a, 20b), and first and second metal lines (22a, 22b). The conductive supporting elements (12a, 12b), the conductive fusible link (14), and the metal lines (22a, 22b) are located at a first metal level (3), while the connect elements (20a, 20b) are located at a second, different metal level (4) and are connected to the conductive supporting elements (12a, 12b) and the metal lines (22a, 22b) by conductive via stacks (18a, 18b, 23a, 23b) that extend between the first and second metal levels (3, 4).

Abstract: A TV receiving module and a display apparatus and a TV receiving system using the same, wherein the TV receiving module is small in size and is detachably mounted outside or inside of the display apparatus. The TV receiving module is adapted to select and receive a TV signal of a desired broadcast from among TV signals inputted from a TV broadcast receiving antenna or cable, and provide the received TV signal. A detachable connector unit includes a first connector installed in the TV receiving module for receiving external power and an external control signal and providing the TV signal received by the TV receiving module externally, and a second connector detachably coupled with the first connector.

Abstract: A mesh-like reinforcing structure to inhibit delamination and cracking is fabricated in a multilayer semiconductor device using low-k dielectric materials and copper-based metallurgy. The mesh-like interconnection structure comprises conductive pads interconnected by conductive lines at each wiring level with each pad conductively connected to its adjacent pad at the next wiring level by a plurality of conductive vias. The conductive pads, lines and vias are fabricated during the normal BEOL wiring level integration process. The reinforcing structure provides both vertical and horizontal reinforcement and may be fabricated on the periphery of the active device region or within open regions of the device that are susceptible to delamination and cracking.

Abstract: A TV receiving module and a display apparatus and a TV receiving system using the same, wherein the TV receiving module is small in size and is detachably mounted outside or inside of the display apparatus. The TV receiving module is adapted to select and receive a TV signal of a desired broadcast from among TV signals inputted from a TV broadcast receiving antenna or cable, and provide the received TV signal. A detachable connector unit includes a first connector installed in the TV receiving module for receiving external power and an external control signal and providing the TV signal received by the TV receiving module externally, and a second connector detachably coupled with the first connector.

Abstract: A mesh-like reinforcing structure to inhibit delamination and cracking is fabricated in a multilayer semiconductor device using low-k dielectric materials and copper-based metallurgy. The mesh-like interconnection structure comprises conductive pads interconnected by conductive lines at each wiring level with each pad conductively connected to its adjacent pad at the next wiring level by a plurality of conductive vias. The conductive pads, lines and vias are fabricated during the normal BEOL wiring level integration process. The reinforcing structure provides both vertical and horizontal reinforcement and may be fabricated on the periphery of the active device region or within open regions of the device that are susceptible to delamination and cracking.

Abstract: A mesh-like reinforcing structure to inhibit delamination and cracking is fabricated in a multilayer semiconductor device using low-k dielectric materials and copper-based metallurgy. The mesh-like interconnection structure comprises conductive pads interconnected by conductive lines at each wiring level with each pad conductively connected to its adjacent pad at the next wiring level by a plurality of conductive vias. The conductive pads, lines and vias are fabricated during the normal BEOL wiring level integration process. The reinforcing structure provides both vertical and horizontal reinforcement and may be fabricated on the periphery of the active device region or within open regions of the device that are susceptible to delamination and cracking.

Abstract: A mesh-like reinforcing structure to inhibit delamination and cracking is fabricated in a multilayer semiconductor device using low-k dielectric materials and copper-based metallurgy. The mesh-like interconnection structure comprises conductive pads interconnected by conductive lines at each wiring level with each pad conductively connected to its adjacent pad at the next wiring level by a plurality of conductive vias. The conductive pads, lines and vias are fabricated during the normal BEOL wiring level integration process. The reinforcing structure provides both vertical and horizontal reinforcement and may be fabricated on the periphery of the active device region or within open regions of the device that are susceptible to delamination and cracking.