Abstract: A method of forming the patterns of a semiconductor device uses a photomask employed therein is disclosed. In a semiconductor device having a first region where a plurality of first patterns are separated from each other by a first space and a plurality of second patterns having a larger size than that of the first patterns are separated from each other by a second space that is wider than the first space, the first and second regions being formed on the same layer, a fine gap for transmitting light is formed in a central portion of a mask pattern that corresponds to the second pattern on the photomask for patterning the first and second patterns to reduce the proximity effect. Lifting margin and bridge margin with respect to a pattern where the pattern pitch varies are improved through the use of the fine gap.

Abstract: A method for forming a minute pattern includes forming a mask layer on an object being patterned. The mask layer is patterned to form a first mask pattern having a first width larger than a predetermined width. The first mask pattern is thermally treated to form a second mask pattern having a second width smaller than the first width. A polymer layer is formed on the second mask pattern. The polymer layer reacts with the second mask pattern to form a hardened layer on a boundary surface between the polymer layer and the second mask pattern, thereby forming a third mask pattern having a third width substantially identical to the predetermined width. The limits of the present photolithography equipment are overcome. Also, a semiconductor device having a CD of below about 100 nm is manufactured.

Abstract: Disclosed is a method for manufacturing a semiconductor device by employing a dual damascene process. After a first insulation film including a conductive pattern is formed on a substrate, at least one etch stop film and at least one insulation film are alternatively formed on the first insulation film. A via hole for a contact or a trench for a metal wiring is formed through the insulation film, and then the via hole or the trench is filled with a filling film including a water-soluble polymer. After a photoresist film is coated on the filling film, the photoresist film is patterned to form a photoresist pattern and to remove the filling film. The DOF and processing margin of the photolithography process for forming the photoresist pattern can be improved because the photoresist film can have greatly reduced thickness due to the filling film.

Abstract: A method of forming the patterns of a semiconductor device uses a photomask employed therein is disclosed. In a semiconductor device having a first region where a plurality of first patterns are separated from each other by a first space and a plurality of second patterns having a larger size than that of the first patterns are separated from each other by a second space that is wider than the first space, the first and second regions being formed on the same layer, a fine gap for transmitting light is formed in a central portion of a mask pattern that corresponds to the second pattern on the photomask for patterning the first and second patterns to reduce the proximity effect. Lifting margin and bridge margin with respect to a pattern where the pattern pitch varies are improved through the use of the fine gap.

Abstract: A photoresist pattern is formed, without being exposed, by using photoresist having a residual layer proportion characteristic by which the photoresist dissolves at a suitable rate in a developing solution. First, a target layer to be patterned and a photoresist layer are sequentially formed on a substrate having a pattern that defines a step on the substrate. Some of the photoresist layer is treated with the developing solution, to thereby form a photoresist pattern whose upper surface is situated beneath the step and hence, exposes part of the target layer. Next, the exposed part of the target layer, and the photoresist pattern are removed. A silicidation process may be carried out thereafter on the area(s) from which the target layer has been removed. The method is relatively simple because it does not involve an exposure process. Furthermore, the method can be used to manufacture devices having very fine linewidths, i.e.

Abstract: A method of fabricating a flash memory device uses a self-aligned non-exposure pattern formation process. A conductive layer and an oxidation-blocking layer are formed on a stepped pattern including a floating gate pattern and an inter-gate insulating layer pattern such that the conductive layer and the oxidation-blocking layer conform to the stepped pattern. A photoresist layer is formed on the oxidation-blocking layer such that the photoresist layer has an upper surface situated above the oxidation-blocking layer. A portion of the photoresist layer is dissolved, without having photo-exposed the photoresist layer, by soaking the photoresist layer in developing solution. This soaking alone, or supplemented with an etch back process, is carried out until the upper surface of the photoresist layer is situated below the upper surface of the oxidation-blocking layer on the stepped pattern. The resulting photoresist pattern exposes that part of the oxidation-blocking layer on the stepped pattern.

Abstract: A method of forming fine patterns in a semiconductor device through a double photo lithography process. A layer to be etched and a hard mask layer are sequentially formed on a semiconductor substrate. A first photo resist pattern is formed on the hard mask layer. A first hard mask layer pattern is formed by etching the hard mask layer using the first photo resist pattern. After the first photo resist pattern is removed, a second photo resist pattern is formed on the resultant structure. A second hard mask layer pattern is formed by etching the first hard mask layer pattern using the second photo resist pattern. The layer to be etched is then etched using the second hard mask layer pattern after the second photo resist pattern has been removed, resulting in patterns have line edges without rounding.

Abstract: A photoresist composition may include formulas 1 and 2: 1

Abstract: A method of fabricating a flash memory device uses a self-aligned non-exposure pattern formation process. A conductive layer and an oxidation-blocking layer are formed on a stepped pattern including a floating gate pattern and an inter-gate insulating layer pattern such that the conductive layer and the oxidation-blocking layer conform to the stepped pattern. A photoresist layer is formed on the oxidation-blocking layer such that the photoresist layer has an upper surface situated above the oxidation-blocking layer. A portion of the photoresist layer is dissolved, without having exposed the photoresist layer, by soaking the photoresist layer in developing solution. This soaking alone, or supplemented with an etch back process, is carried out until the upper surface of the photoresist layer is situated below the upper surface of the oxidation-blocking layer on the stepped pattern. The resulting photoresist pattern exposes that part of the oxidation-blocking layer on the stepped pattern.

Abstract: A photoresist pattern is formed, without being exposed, by using photoresist having a residual layer proportion characteristic by which the photoresist dissolves at a suitable rate in a developing solution. First, a target layer to be patterned and a photoresist layer are sequentially formed on a substrate having a pattern that defines a step on the substrate. Some of the photoresist layer is treated with the developing solution, to thereby form a photoresist pattern whose upper surface is situated beneath the step and hence, exposes part of the target layer. Next, the exposed part of the target layer, and the photoresist pattern are removed. A silicidation process may be carried out thereafter on the area(s) from which the target layer has been removed. The method is relatively simple because it does not involve an exposure process. Furthermore, the method can be used to manufacture devices having very fine linewidths, i.e.

Abstract: A method of forming fine patterns in a semiconductor device through a double photo lithography process. A layer to be etched and a hard mask layer are sequentially formed on a semiconductor substrate. A first photo resist pattern is formed on the hard mask layer. A first hard mask layer pattern is formed by etching the hard mask layer using the first photo resist pattern. After the first photo resist pattern is removed, a second photo resist pattern is formed on the resultant structure. A second hard mask layer pattern is formed by etching the first hard mask layer pattern using the second photo resist pattern. The layer to be etched is then etched using the second hard mask layer pattern after the second photo resist pattern has been removed, resulting in patterns have line edges without rounding.

Abstract: A method of generating a circuit pattern of a semiconductor device, comprises sequentially depositing a first patternable layer and photoresist layer, converting a given depth of the photoresist layer into a second patternable layer insoluble in an alkaline solution, selectively etching the second patternable layer to form a photoresist pattern mask, applying an O2 plasma through the photoresist pattern mask to form a photoresist pattern in the unconverted part of the photoresist layer, and selectively etching the first patternable layer by using the photoresist pattern as a mask to obtain a fine circuit pattern.

Abstract: A positive photoresist composition, including an alkali soluble novolak resin, an esterification compound represented by the following formula II as a photosensitive agent and a solvent: ##STR1## wherein R.sub.1 through R.sub.

Abstract: Copolymers comprising 1-50 mole % of sulfur dioxide and 50-99 mole % of trialkylgermylstyrene, having a weight average molecular weight of 500-10,000,000 and exhibiting a high sensitivity to light, electron beam, and X-ray, as well as having an excellent anti-dry etching resistance, and their application as a positive resisting material.