Patents by Inventor Daimotsu Kato
Daimotsu Kato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10964802Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first to third layers, and a first insulating layer. The first layer includes first to fifth partial regions. The first partial region is between the fourth and third partial regions. The second partial region is between the third and fifth partial regions. The first insulating layer includes first and second inter-layer regions. The second layer includes first and second intermediate regions. The first intermediate region is provided between the first partial region and the first inter-layer region. The second intermediate region is provided between the second partial region and the second inter-layer region. The third layer includes first to third nitride regions. The first inter-layer region is between the first intermediate region and the first nitride region. The second inter-layer region is between the second intermediate region and the second nitride region.Type: GrantFiled: March 11, 2019Date of Patent: March 30, 2021Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Akira Mukai, Yosuke Kajiwara, Daimotsu Kato, Masahiko Kuraguchi
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Patent number: 10916646Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor regions, and a first insulating film. The first semiconductor region includes a first partial region, a second partial region, a third partial region between the first and second partial regions, a fourth partial region between the first and third partial regions, and a fifth partial region between the third and second partial regions. The second semiconductor region includes a sixth partial region and a seventh partial region. The third electrode overlaps the sixth and seventh partial regions. The first insulating film includes a portion provided between the third electrode and the third partial region, between the third electrode and the fourth partial region, between the third electrode and the fifth partial region, between the third electrode and the sixth partial region, and between the third electrode and the seventh partial region.Type: GrantFiled: March 11, 2019Date of Patent: February 9, 2021Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Daimotsu Kato, Toshiya Yonehara, Hiroshi Ono, Yosuke Kajiwara, Masahiko Kuraguchi, Tatsuo Shimizu
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Patent number: 10910490Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first to fourth semiconductor regions, a first layer including, and a first insulating layer. The first semiconductor region includes Alx1Ga1-x1N and includes first to fifth partial regions. The third partial region includes a first element including at least one selected from the group consisting of Mg, Zn, and C. The second semiconductor region includes Alx2Ga1-x2N and includes a sixth partial region and a seventh partial region. The third semiconductor region includes Alx3Ga1-x3N and includes an eighth partial region and a ninth partial region. The fourth semiconductor region includes Alx4Ga1-x4N and includes a tenth partial region and an eleventh partial region. The first layer includes AlyGa1-yN and includes a first portion provided between the third partial region and the third electrode. The first insulating layer includes a second portion provided between the first portion and the third electrode.Type: GrantFiled: September 10, 2019Date of Patent: February 2, 2021Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Masahiko Kuraguchi, Yosuke Kajiwara, Aya Shindome, Hiroshi Ono, Daimotsu Kato, Akira Mukai, Toshiki Hikosaka, Jumpei Tajima
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Publication number: 20200411675Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first nitride region, a second nitride region, and a first insulating film. The first nitride region includes Alx1Ga1-x1N. The first nitride region includes first and second partial regions, a third partial region between the first and second partial regions, a fourth partial region between the first and third partial regions, and a fifth partial region between the third and second partial regions. The second nitride region includes Alx2Ga1-x2N. The second nitride region includes sixth and seventh partial regions. The first insulating film includes a first insulating region and is between the third partial region and the third electrode. The third partial region has a first surface opposing the first insulating region. The fourth partial region has a second surface opposing the sixth partial region.Type: ApplicationFiled: March 3, 2020Publication date: December 31, 2020Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Daimotsu KATO, Yosuke KAJIWARA, Akira MUKAI, Aya SHINDOME, Hiroshi ONO, Masahiko KURAGUCHI
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Publication number: 20200373422Abstract: According to one embodiment, a semiconductor device includes first, second and third electrodes, first and second semiconductor layers, a first conductive part, first and second insulating layers. The third electrode includes first and second portions. The first portion is between the first electrode and the second electrode. The first semiconductor layer includes first, second, third, fourth and fifth partial regions. The third partial region is between the first and second partial regions. The fourth partial region is between the first and third partial regions. The fifth partial region is between the third and second partial regions. The second semiconductor layer includes first and second semiconductor regions. The first conductive part is electrically connected to the first electrode. The first insulating layer includes a first insulating portion. The second insulating layer includes first and second insulating regions.Type: ApplicationFiled: February 25, 2020Publication date: November 26, 2020Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Masahiko KURAGUCHI, Yosuke KAJIWARA, Aya SHINDOME, Hiroshi ONO, Daimotsu KATO, Akira MUKAI
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Publication number: 20200335587Abstract: According to one embodiment, a semiconductor device includes first, second and third electrodes, first and second semiconductor layers, and a first compound member. A position of the third electrode is between a position of the second electrode and a position of the first electrode. The first semiconductor layer includes first, second, third, fourth, and fifth partial regions. The fourth partial region is between the third and first partial regions. The fifth partial region is between the second and third partial regions. The second semiconductor layer includes first, second, and third semiconductor regions. The third semiconductor region is between the first partial region and the first electrode. The first compound member includes first compound portions between the third semiconductor region and the first electrode. A portion of the first electrode is between one of the first compound portions and an other one of the first compound portions.Type: ApplicationFiled: February 11, 2020Publication date: October 22, 2020Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Hiroshi ONO, Akira MUKAI, Yosuke KAJIWARA, Daimotsu KATO, Aya SHINDOME, Masahiko KURAGUCHI
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Publication number: 20200295169Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first to third nitride regions, and first and second insulating films. The first nitride region includes AlxiGai-x1N, and includes first and second partial regions, a third partial region between the first and second partial regions, a fourth partial region between the first and third partial regions, and a fifth partial region between the third and second partial regions. The first nitride region includes first to fifth partial regions. The second nitride region includes Alx2Ga1-x2N, and sixth and seventh partial regions. At least a portion of the third electrode is between the sixth and seventh partial regions. The first insulating film includes silicon and oxygen and includes first and second insulating regions. The third nitride region includes Alx3Ga1-x3N, and first to seventh portions. The second insulating film includes silicon and oxygen and includes third to seventh insulating regions.Type: ApplicationFiled: September 12, 2019Publication date: September 17, 2020Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Daimotsu KATO, Yosuke Kajiwara, Akira Mukai, Aya Shindome, Hiroshi Ono, Masahiko Kuraguchi
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Patent number: 10714608Abstract: According to one embodiment, a semiconductor device includes first and second regions, a first insulating portion, and first, second, and third electrodes. The first region includes first and second partial regions, and a third partial region between the first and second partial regions. The second region includes fourth and fifth partial regions. The fourth partial region overlaps the first partial region. The fifth partial region overlaps the second partial region. The first insulating portion includes first, second, and third insulating regions. The first insulating region is provided between the second insulating region and the third partial region and between the third insulating region and the third partial region. The first electrode is electrically connected to the fourth partial region. The second electrode is away from the first electrode and is electrically connected to the fifth partial region. The third electrode is provided between the first and second electrodes.Type: GrantFiled: March 5, 2019Date of Patent: July 14, 2020Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Masahiko Kuraguchi, Yosuke Kajiwara, Aya Shindome, Hiroshi Ono, Daimotsu Kato, Akira Mukai
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Publication number: 20200220003Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first to fourth semiconductor regions, a first layer including, and a first insulating layer. The first semiconductor region includes Alx1Ga1-x1N and includes first to fifth partial regions. The third partial region includes a first element including at least one selected from the group consisting of Mg, Zn, and C. The second semiconductor region includes Alx2Ga1-x2N and includes a sixth partial region and a seventh partial region. The third semiconductor region includes Alx3Ga1-x3N and includes an eighth partial region and a ninth partial region. The fourth semiconductor region includes Alx4Ga1-x4N and includes a tenth partial region and an eleventh partial region. The first layer includes AlyGa1-yN and includes a first portion provided between the third partial region and the third electrode. The first insulating layer includes a second portion provided between the first portion and the third electrode.Type: ApplicationFiled: September 10, 2019Publication date: July 9, 2020Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Masahiko Kuraguchi, Yosuke Kajiwara, Aya Shindome, Hiroshi Ono, Daimotsu Kato, Akira Mukai, Toshiki Hikosaka, Jumpei Tajima
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Patent number: 10600900Abstract: In one embodiment, a semiconductor device is provided with a semiconductor layer made of a nitride semiconductor, a first gate electrode, a first structure body between the first gate electrode and the semiconductor layer, and a first insulating layer between the semiconductor layer and the first structure body. The first structure body has a first intermediate layer made of a conductor to suppress generation of charges at respective interfaces with adjacent layers, a first layer having dielectric property between the first gate electrode and the first intermediate layer, and a second layer having dielectric property between the first gate electrode and the first layer, and has dipoles at an interface between the first layer and the second layer.Type: GrantFiled: August 31, 2018Date of Patent: March 24, 2020Assignee: Kabushiki Kaisha ToshibaInventors: Toshiya Yonehara, Tatsuo Shimizu, Hiroshi Ono, Daimotsu Kato
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Publication number: 20200027978Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor layers, a nitride layer, and an oxide layer. A direction from the second electrode toward the first electrode is aligned with a first direction. A position in the first direction of the third electrode is between the first electrode and the second electrode in the first direction. The first semiconductor layer includes first to fifth partial regions. The first partial region is between the fourth and third partial regions in the first direction. The second partial region is between the third and fifth partial regions in the first direction. The nitride layer includes first and second nitride regions. The second semiconductor layer includes first and second semiconductor regions. The oxide layer includes silicon and oxygen. The oxide layer includes first to third oxide regions.Type: ApplicationFiled: March 5, 2019Publication date: January 23, 2020Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Yosuke KAJIWARA, Daimotsu KATO, Masahiko KURAGUCHI
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Publication number: 20200027976Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first to third layers, and a first insulating layer. The first layer includes first to fifth partial regions. The first partial region is between the fourth and third partial regions. The second partial region is between the third and fifth partial regions. The first insulating layer includes first and second inter-layer regions. The second layer includes first and second intermediate regions. The first intermediate region is provided between the first partial region and the first inter-layer region. The second intermediate region is provided between the second partial region and the second inter-layer region. The third layer includes first to third nitride regions. The first inter-layer region is between the first intermediate region and the first nitride region. The second inter-layer region is between the second intermediate region and the second nitride region.Type: ApplicationFiled: March 11, 2019Publication date: January 23, 2020Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Akira MUKAI, Yosuke Kajiwara, Daimotsu Kato, Masahiko Kuraguchi
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Patent number: 10535744Abstract: A semiconductor device according to an embodiment includes a first nitride semiconductor layer; a second nitride semiconductor layer on the first nitride semiconductor layer; a first electrode and a second electrode disposed on or above the first nitride semiconductor layer; a gate electrode above the first nitride semiconductor layer; and a gate insulating layer, the gate insulating layer including a silicon oxide film and an aluminum oxynitride film, the aluminum oxynitride film disposed between the first nitride semiconductor layer and the silicon oxide film, a first atomic ratio of nitrogen relative to a sum of oxygen and nitrogen at a first position in the aluminum oxynitride film being higher than a second atomic ratio of nitrogen relative to a sum of oxygen and nitrogen at a second position in the aluminum oxynitride film, and the second position being closer to the silicon oxide film than the first position.Type: GrantFiled: February 13, 2019Date of Patent: January 14, 2020Assignee: Kabushiki Kaisha ToshibaInventors: Tatsuo Shimizu, Toshiya Yonehara, Hiroshi Ono, Daimotsu Kato, Akira Mukai
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Publication number: 20190386127Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor regions, and a first insulating film. The first semiconductor region includes a first partial region, a second partial region, a third partial region between the first and second partial regions, a fourth partial region between the first and third partial regions, and a fifth partial region between the third and second partial regions. The second semiconductor region includes a sixth partial region and a seventh partial region. The third electrode overlaps the sixth and seventh partial regions. The first insulating film includes a portion provided between the third electrode and the third partial region, between the third electrode and the fourth partial region, between the third electrode and the fifth partial region, between the third electrode and the sixth partial region, and between the third electrode and the seventh partial region.Type: ApplicationFiled: March 11, 2019Publication date: December 19, 2019Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Daimotsu KATO, Toshiya Yonehara, Hiroshi Ono, Yosuke Kajiwara, Masahiko Kuraguchi, Tatsuo Shimizu
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Publication number: 20190371928Abstract: According to one embodiment, a semiconductor device includes first and second regions, a first insulating portion, and first, second, and third electrodes. The first region includes first and second partial regions, and a third partial region between the first and second partial regions. The second region includes fourth and fifth partial regions. The fourth partial region overlaps the first partial region. The fifth partial region overlaps the second partial region. The first insulating portion includes first, second, and third insulating regions. The first insulating region is provided between the second insulating region and the third partial region and between the third insulating region and the third partial region. The first electrode is electrically connected to the fourth partial region. The second electrode is away from the first electrode and is electrically connected to the fifth partial region. The third electrode is provided between the first and second electrodes.Type: ApplicationFiled: March 5, 2019Publication date: December 5, 2019Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Masahiko KURAGUCHI, Yosuke Kajiwara, Aya Shindome, Hiroshi Ono, Daimotsu Kato, Akira Mukai
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Patent number: 10355119Abstract: According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method can include forming a trench and exposing a portion of a first film at a bottom portion of the trench by removing a portion of a second film by performing dry etching using a gas including a first element. The second film is provided on the first film. The first film includes Alx1Ga1-x1N (0?x1<1). The second film includes Alx2Ga1-x2N (0<x2<1 and x1<x2). The method can include performing heat treatment while causing the portion being exposed of the first film to contact an atmosphere including NH3, forming an insulating film on the portion of the first film after the heat treatment, and forming an electrode on the insulating film.Type: GrantFiled: August 7, 2017Date of Patent: July 16, 2019Assignee: Kabushiki Kaisha ToshibaInventors: Kenjiro Uesugi, Aya Shindome, Daimotsu Kato, Masahiko Kuraguchi, Shinya Nunoue
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Publication number: 20190189758Abstract: A semiconductor device according to an embodiment includes a first nitride semiconductor layer; a second nitride semiconductor layer on the first nitride semiconductor layer; a first electrode and a second electrode disposed on or above the first nitride semiconductor layer; a gate electrode above the first nitride semiconductor layer; and a gate insulating layer, the gate insulating layer including a silicon oxide film and an aluminum oxynitride film, the aluminum oxynitride film disposed between the first nitride semiconductor layer and the silicon oxide film, a first atomic ratio of nitrogen relative to a sum of oxygen and nitrogen at a first position in the aluminum oxynitride film being higher than a second atomic ratio of nitrogen relative to a sum of oxygen and nitrogen at a second position in the aluminum oxynitride film, and the second position being closer to the silicon oxide film than the first position.Type: ApplicationFiled: February 13, 2019Publication date: June 20, 2019Applicant: Kabushiki Kaisha ToshibaInventors: Tatsuo SHIMIZU, Toshiya YONEHARA, Hiroshi ONO, Daimotsu KATO, Akira MUKAI
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Publication number: 20190115461Abstract: In one embodiment, a semiconductor device is provided with a semiconductor layer made of a nitride semiconductor, a first gate electrode, a first structure body between the first gate electrode and the semiconductor layer, and a first insulating layer between the semiconductor layer and the first structure body. The first structure body has a first intermediate layer made of a conductor to suppress generation of charges at respective interfaces with adjacent layers, a first layer having dielectric property between the first gate electrode and the first intermediate layer, and a second layer having dielectric property between the first gate electrode and the first layer, and has dipoles at an interface between the first layer and the second layer.Type: ApplicationFiled: August 31, 2018Publication date: April 18, 2019Applicant: Kabushiki Kaisha ToshibaInventors: Toshiya Yonehara, Tatsuo Shimizu, Hiroshi Ono, Daimotsu Kato
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Patent number: 10256308Abstract: A semiconductor device according to an embodiment includes a first nitride semiconductor layer; a second nitride semiconductor layer on the first nitride semiconductor layer; a first electrode and a second electrode disposed on or above the first nitride semiconductor layer; a gate electrode above the first nitride semiconductor layer; and a gate insulating layer, the gate insulating layer including a silicon oxide film and an aluminum oxynitride film, the aluminum oxynitride film disposed between the first nitride semiconductor layer and the silicon oxide film, a first atomic ratio of nitrogen relative to a sum of oxygen and nitrogen at a first position in the aluminum oxynitride film being higher than a second atomic ratio of nitrogen relative to a sum of oxygen and nitrogen at a second position in the aluminum oxynitride film, and the second position being closer to the silicon oxide film than the first position.Type: GrantFiled: February 27, 2018Date of Patent: April 9, 2019Assignee: Kabushiki Kaisha ToshibaInventors: Tatsuo Shimizu, Toshiya Yonehara, Hiroshi Ono, Daimotsu Kato, Akira Mukai
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Patent number: 10243058Abstract: According to one embodiment, a semiconductor device includes a first semiconductor layer including a nitride semiconductor, a first electrode separated from the first semiconductor layer in a first direction, and a first insulating film including silicon and oxygen and being provided between the first semiconductor layer and the first electrode. The first insulating film has a first thickness in the first direction. The first insulating film includes a first position, and a distance between the first position and the first semiconductor layer is ½ of the first thickness. A first hydrogen concentration of hydrogen at the first position is 2.5×1019 atoms/cm3 or less.Type: GrantFiled: August 21, 2017Date of Patent: March 26, 2019Assignee: Kabushiki Kaisha ToshibaInventors: Toshiya Yonehara, Hisashi Saito, Yosuke Kajiwara, Daimotsu Kato, Tatsuo Shimizu, Yasutaka Nishida