Patents by Inventor Daisuke Koizumi

Daisuke Koizumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050088259
    Abstract: Formed on a dielectric substrate 11 are a center conductor 12 having a length L1 which is equivalent in electrical length to one quarter wavelength and ground conductors 13 disposed on the opposite sides of the center conductor with a gap portion therebetween in coplanar manner. The center conductor 12 and the ground conductors 13 located on the opposite sides thereof are connected together by shorting ends 14 resulting in forming corner areas, respectively whereby obtaining a coplanar waveguide resonator, wherein the edge line of the shorting end 14 is recessed to have an arcuate curve configuration so that each corner area has an angle of greater than 90° to reduce power current concentration at the corner points in the respective corner areas.
    Type: Application
    Filed: September 7, 2004
    Publication date: April 28, 2005
    Applicant: NTT DoCoMo, Inc.
    Inventors: Kei Satoh, Shoichi Narahashi, Daisuke Koizumi, Yasushi Yamao
  • Publication number: 20040266272
    Abstract: A contactor has contact electrodes elastically deformable in a direction of thickness of the contactor so that the contactor can make a contact with a semiconductor device with an appropriate contact pressure. The contactor is positioned between the semiconductor device and a test board so as to electrically connect the semiconductor device to the test board. Each of a plurality of contact electrodes has a first contact electrode part, a second contact electrode part and a connecting part electrically connecting the first contact electrode part to the second contact electrode part. The first contact electrode part contacts an electrode of the semiconductor device. The second contact electrode part contacts a terminal of the test board. A combining member has an insulating characteristic and holds the connecting part of each of the contact electrodes in a predetermined arrangement.
    Type: Application
    Filed: July 28, 2004
    Publication date: December 30, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Shigeyuki Maruyama, Kazuhiro Tashiro, Naoyuki Watanabe, Daisuke Koizumi, Takafumi Hashitani, Ei Yano
  • Publication number: 20040239357
    Abstract: A contactor configured to be electrically connected to the terminals of an electronic component is disclosed. The connector includes multiple contact electrodes contacting the terminals of the electronic component and multiple elastic electrodes each composed of an electrically conductive elastic body. The elastic electrodes generate a pressing force for pressing the contact electrodes against the terminals of the electronic component. The contact electrodes are separable from the elastic electrodes.
    Type: Application
    Filed: May 27, 2004
    Publication date: December 2, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Kazuhiro Tashiro, Shigeyuki Maruyama, Daisuke Koizumi, Takumi Kumatabara, Keisuke Fukuda
  • Patent number: 6791345
    Abstract: A contactor has contact electrodes elastically deformable in a direction of thickness of the contactor so that the contactor can make a contact with a semiconductor device with an appropriate contact pressure. The contactor is positioned between the semiconductor device and a test board so as to electrically connect the semiconductor device to the test board. Each of a plurality of contact electrodes has a first contact electrode part, a second contact electrode part and a connecting part electrically connecting the first contact electrode part to the second contact electrode part. The first contact electrode part contacts an electrode of the semiconductor device. The second contact electrode part contacts a terminal of the test board. A combining member has an insulating characteristic and holds the connecting part of each of the contact electrodes in a predetermined arrangement.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: September 14, 2004
    Assignee: Fujitsu Limited
    Inventors: Shigeyuki Maruyama, Kazuhiro Tashiro, Naoyuki Watanabe, Daisuke Koizumi, Takafumi Hashitani, Ei Yano
  • Patent number: 6774650
    Abstract: A probe card for testing a wafer having formed a plurality of semiconductor chips, the probe card including a board and a multi-layer substrate. The probe card may also include a flexible substrate. A contact electrode, located opposite from an electrode on one of the chips, is disposed above or below the flexible substrate, or may be provided on an elastic material on the multi-layered substrate. A first wiring has a first portion connected to the contact electrode, a level transitioning portion extending from a level of the first portion to the multi-layer substrate at a lower level, and a connecting terminal at an end of the level transitioning portion connected to an internal terminal on the multi-layered substrate. A second wiring in the multi-layered substrate connects the internal terminal to an external terminal at a periphery of the multi-layer substrate. A third wiring on the board connects the external terminal on the multi-layer substrate to an external connecting terminal on the board.
    Type: Grant
    Filed: March 21, 2003
    Date of Patent: August 10, 2004
    Assignee: Fujitsu Limited
    Inventors: Shigeyuki Maruyama, Daisuke Koizumi, Naoyuki Watanabe, Yoshito Konno, Eiji Yoshida, Toshiyuki Honda, Toshimi Kawahara, Kenichi Nagashige
  • Publication number: 20040097379
    Abstract: A signal switching device is disclosed that is capable of transmitting signals with less signal loss while securing a good isolation characteristic. The signal switching device includes a first section formed from a superconducting material connected to a first transmission path. The first section has a smaller cross section at the input end than at the output end or, the signal switching device may include a first section formed from a superconducting material connected to a first transmission path in series, and a second section formed from a superconducting material connected to a second transmission path in parallel. The cross section of the second section is smaller than that of the second transmission path. The length of the second transmission path is determined in such a way that an input impedance of the second transmission path is sufficiently large when the second section is in a superconducting state.
    Type: Application
    Filed: November 7, 2003
    Publication date: May 20, 2004
    Applicant: NTT DoCoMo, Inc.
    Inventors: Kunihiro Kawai, Daisuke Koizumi, Kei Satoh, Shoichi Narahashi, Tetsuo Hirota
  • Publication number: 20040055150
    Abstract: An electronic component attaching tool suitable for an external shape of a semiconductor device is prepared. The electronic component attaching tool has a function of aligning a position of the semiconductor device to an IC socket. The electronic component attaching tool is mounted on the standard surface that is formed on the IC socket substantially regardless of the external shape of the semiconductor device. The semiconductor device is then aligned and attached to the IC socket by using the electronic component attaching tool, and the electronic component attaching tool is removed from the IC socket. Another electronic component attaching tool suitable for an external shape of another semiconductor device is prepared, and the same procedure as the above is performed to align and attach this semiconductor device to the same type IC socket.
    Type: Application
    Filed: September 5, 2003
    Publication date: March 25, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Daisuke Koizumi, Shigeyuki Maruyama, Kazuhiro Tashiro, Naoyuki Watanabe
  • Publication number: 20030160626
    Abstract: A probe card for testing a wafer having formed a plurality of semiconductor chips, the probe card including a board and a multi-layer substrate. The probe card may also include a flexible substrate. A contact electrode, located opposite from an electrode on one of the chips, is disposed above or below the flexible substrate, or may be provided on an elastic material on the multi-layered substrate. A first wiring has a first portion connected to the contact electrode, a level transitioning portion extending from a level of the first portion to the multi-layer substrate at a lower level, and a connecting terminal at an end of the level transitioning portion connected to an internal terminal on the multi-layered substrate. A second wiring in the multi-layered substrate connects the internal terminal to an external terminal at a periphery of the multi-layer substrate. A third wiring on the board connects the external terminal on the multi-layer substrate to an external connecting terminal on the board.
    Type: Application
    Filed: March 21, 2003
    Publication date: August 28, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Shigeyuki Maruyama, Daisuke Koizumi, Naoyuki Watanabe, Yoshito Konno, Eiji Yoshida, Toshiyuki Honda, Toshimi Kawahara, Kenichi Nagashige
  • Publication number: 20030127246
    Abstract: A contactor comprises a film substrate of an insulating material and plural wiring patterns on the substrate, wherein a first end of each wiring pattern extends out from a first edge of the substrate as a first contact terminal and a second end of each wiring pattern extends out from a second edge of the substrate as a second contact terminal, and a part of the contactor located between the first end and second end can be deformed resiliently.
    Type: Application
    Filed: October 9, 2002
    Publication date: July 10, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Naoyuki Watanabe, Shigeyuki Maruyama, Kazuhiro Tashiro, Daisuke Koizumi, Takafumi Hashitani
  • Patent number: 6563330
    Abstract: A probe card for testing a wafer having formed a plurality of semiconductor chips, the probe card including a board and a multi-layer substrate. The probe card may also include a flexible substrate. A contact electrode, located opposite from an electrode on one of the chips, is disposed above or below the flexible substrate, or may be provided on an elastic material on the multi-layered substrate. A first wiring has a first portion connected to the contact electrode, a level transitioning portion extending from a level of the first portion to the multi-layer substrate at a lower level, and a connecting terminal at an end of the level transitioning portion connected to an internal terminal on the multi-layered substrate. A second wiring in the multi-layered substrate connects the internal terminal to an external terminal at a periphery of the multi-layer substrate. A third wiring on the board connects the external terminal on the multi-layer substrate to an external connecting terminal on the board.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: May 13, 2003
    Assignee: Fujitsu Limited
    Inventors: Shigeyuki Maruyama, Daisuke Koizumi, Naoyuki Watanabe, Yoshito Konno, Eiji Yoshida, Toshiyuki Honda, Toshimi Kawahara, Kenichi Nagashige
  • Publication number: 20020105347
    Abstract: A contactor has contact electrodes elastically deformable in a direction of thickness of the contactor so that the contactor can make a contact with a semiconductor device with an appropriate contact pressure. The contactor is positioned between the semiconductor device and a test board so as to electrically connect the semiconductor device to the test board. Each of a plurality of contact electrodes has a first contact electrode part, a second contact electrode part and a connecting part electrically connecting the first contact electrode part to the second contact electrode part. The first contact electrode part contacts an electrode of the semiconductor device. The second contact electrode part contacts a terminal of the test board. A combining member has an insulating characteristic and holds the connecting part of each of the contact electrodes in a predetermined arrangement.
    Type: Application
    Filed: January 31, 2002
    Publication date: August 8, 2002
    Applicant: Fujitsu Limited
    Inventors: Shigeyuki Maruyama, Kazuhiro Tashiro, Naoyuki Watanabe, Daisuke Koizumi, Takafumi Hashitani, Ei Yano
  • Patent number: 6410354
    Abstract: A semiconductor substrate test device includes a contactor having contact electrodes to be connected with terminals formed on a semiconductor substrate, and a drag supply part supplying a drag to prevent a deformation of the contactor caused by a contact force resulting from contacts of the contact electrodes with the terminals.
    Type: Grant
    Filed: July 18, 2001
    Date of Patent: June 25, 2002
    Assignee: Fujitsu Limited
    Inventors: Shigeyuki Maruyama, Naoyuki Watanabe, Daisuke Koizumi, Akira Sawamori
  • Publication number: 20020031849
    Abstract: A semiconductor substrate test device includes a contactor having contact electrodes to be connected with terminals formed on a semiconductor substrate, and a drag supply part supplying a drag to prevent a deformation of the contactor caused by a contact force resulting from contacts of the contact electrodes with the terminals.
    Type: Application
    Filed: July 18, 2001
    Publication date: March 14, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Shigeyuki Maruyama, Naoyuki Watanabe, Daisuke Koizumi, Akira Sawamori
  • Patent number: 6203332
    Abstract: An attachment structure between a semiconductor device socket and a test circuit substrate is provided. The semiconductor device socket includes a socket body and a contact film disposed therein. Extension conductive wires extended from a contact portion to be connected to a semiconductor device are formed on the contact film. The contact film is also provided with socket connectors connected to the extension conductive wires. The test circuit substrate is provided with circuit substrate connectors corresponding to the socket connectors. The socket connectors and the circuit substrate connectors are in a male-female connector relationship.
    Type: Grant
    Filed: December 16, 1999
    Date of Patent: March 20, 2001
    Assignee: Fujitsu Limited
    Inventors: Kazuhiro Tashiro, Daisuke Koizumi