Patents by Inventor Daisuke Matsubayashi

Daisuke Matsubayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140175435
    Abstract: A semiconductor device having a reduced amount of oxygen vacancy in a channel formation region of an oxide semiconductor is provided. Further, a semiconductor device which includes an oxide semiconductor and has improved electric characteristics is provided. Furthermore, a methods for manufacturing the semiconductor device is provided. An oxide semiconductor film is formed; a conductive film is formed over the oxide semiconductor film at the same time as forming a low-resistance region between the oxide semiconductor film and the conductive film; the conductive film is processed to form a source electrode and a drain electrode; and oxygen is added to the low-resistance region between the source electrode and the drain electrode, so that a channel formation region having a higher resistance than the low-resistance region is formed and a first low-resistance region and a second low-resistance region between which the channel formation region is positioned are formed.
    Type: Application
    Filed: December 20, 2013
    Publication date: June 26, 2014
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Hideomi Suzawa, Tetsuhiro Tanaka, Hirokazu Watanabe, Yuhei Sato, Yasumasa Yamane, Daisuke Matsubayashi
  • Patent number: 8760959
    Abstract: A selection operation is performed for individual memory cells. A device includes a first memory cell and a second memory cell provided in the same row as the first memory cell, each of which includes a field-effect transistor having a first gate and a second gate. The field-effect transistor controls at least data writing and data holding in the memory cell by being turned on or off. The device further includes a row selection line electrically connected to the first gates of the field-effect transistors included in the first memory cell and the second memory cell, a first column selection line electrically connected to the second gate of the field-effect transistor included in the first memory cell, and a second column selection line electrically connected to the second gate of the field-effect transistor included in the second memory cell.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: June 24, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Daisuke Matsubayashi
  • Publication number: 20140151691
    Abstract: A semiconductor device in which deterioration of electrical characteristics which becomes more noticeable as the transistor is miniaturized can be suppressed is provided. The semiconductor device includes an oxide semiconductor stack in which a first oxide semiconductor layer, a second oxide semiconductor layer, and a third oxide semiconductor layer are stacked in this order from the substrate side over a substrate; a source electrode layer and a drain electrode layer which are in contact with the oxide semiconductor stack; a gate insulating film over the oxide semiconductor stack, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating film. The first oxide semiconductor layer includes a first region. The gate insulating film includes a second region. When the thickness of the first region is TS1 and the thickness of the second region is TG1, TS1?TG1.
    Type: Application
    Filed: December 2, 2013
    Publication date: June 5, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daisuke Matsubayashi, Satoshi Shinohara, Wataru Sekine
  • Publication number: 20140145625
    Abstract: To prevent an influence of normally-on characteristics of the transistor which a clock signal is input to a terminal of, a wiring to which a first low power supply potential is appled and a wiring to which a second low power supply potential lower than the first low power supply potential is applied are electrically connected to a gate electrode of the transistor. A semiconductor device including the transistor can operate stably.
    Type: Application
    Filed: November 26, 2013
    Publication date: May 29, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Hiroyuki MIYAKE, Daisuke MATSUBAYASHI
  • Publication number: 20140138676
    Abstract: A highly reliable semiconductor device is provided. The semiconductor device includes a gate electrode, a gate insulating film over the gate electrode, a semiconductor film overlapping with the gate electrode with the gate insulating film positioned therebetween, a source electrode and a drain electrode that are in contact with the semiconductor film, and an oxide film over the semiconductor film, the source electrode, and the drain electrode. An end portion of the semiconductor film is spaced from an end portion of the source electrode or the drain electrode in a region overlapping with the semiconductor film in a channel width direction. The semiconductor film and the oxide film each include a metal oxide including In, Ga, and Zn. The oxide film has an atomic ratio where the atomic percent of In is lower than the atomic percent of In in the atomic ratio of the semiconductor film.
    Type: Application
    Filed: November 14, 2013
    Publication date: May 22, 2014
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Daisuke MATSUBAYASHI, Hiroyuki MIYAKE
  • Publication number: 20140131702
    Abstract: Provided is a semiconductor device having a structure which can suppress a decrease in electrical characteristics, which becomes more significant with miniaturization. The semiconductor device includes a plurality of gate electrode layers separated from each other. One of the plurality of gate electrode layers includes a region which overlaps with a part of an oxide semiconductor layer, a part of a source electrode layer, and a part of a drain electrode layer. Another of the plurality of gate electrode layers overlaps with a part of an end portion of the oxide semiconductor layer. The length in the channel width direction of each of the source electrode layer and the drain electrode layer is shorter than that of the one of the plurality of gate electrode layers.
    Type: Application
    Filed: November 14, 2013
    Publication date: May 15, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daisuke Matsubayashi, Satoshi Shinohara, Wataru Sekine, Naoto Kusumoto
  • Publication number: 20140110707
    Abstract: In a semiconductor device including a transistor including a gate electrode formed over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, a first oxide insulating film covering the transistor, and a second oxide insulating film formed over the first oxide insulating film, the multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the oxide semiconductor film has an amorphous structure or a microcrystalline structure, the first oxide insulating film is an oxide insulating film through which oxygen is permeated, and the second oxide insulating film is an oxide insulating film containing more oxygen than that in the stoichiometric composition.
    Type: Application
    Filed: October 23, 2013
    Publication date: April 24, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Yukinori Shima, Hajime Tokunaga, Toshinari Sasaki, Keisuke Murayama, Daisuke Matsubayashi
  • Publication number: 20140110705
    Abstract: To reduce defects in an oxide semiconductor film in a semiconductor device. To improve the electrical characteristics and the reliability of a semiconductor device including an oxide semiconductor film. In a semiconductor device including a transistor including a gate electrode formed over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, a first oxide insulating film covering the transistor, and a second oxide insulating film formed over the first oxide insulating film, the multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the first oxide insulating film is an oxide insulating film through which oxygen is permeated, and the second oxide insulating film is an oxide insulating film containing more oxygen than that in the stoichiometric composition.
    Type: Application
    Filed: October 23, 2013
    Publication date: April 24, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Yukinori Shima, Hajime Tokunaga, Toshinari Sasaki, Keisuke Murayama, Daisuke Matsubayashi
  • Publication number: 20140110708
    Abstract: A semiconductor device includes a transistor including a gate electrode over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, and an oxide insulating film covering the transistor. The multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the oxide insulating film contains more oxygen than that in the stoichiometric composition, and in the transistor, by a bias-temperature stress test, threshold voltage does not change or the amount of the change in a positive direction or a negative direction is less than or equal to 1.0 V, preferably less than or equal to 0.5 V.
    Type: Application
    Filed: October 24, 2013
    Publication date: April 24, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Yukinori Shima, Hajime Tokunaga, Toshinari Sasaki, Keisuke Murayama, Daisuke Matsubayashi
  • Patent number: 8675394
    Abstract: An object is to provide a semiconductor device which can hold stored data even when not powered and which achieves high integration by reduction of the number of wirings. The semiconductor device is formed using a material which can sufficiently reduce the off-state current of a transistor, e.g., an oxide semiconductor material which is a wide bandgap semiconductor. When a semiconductor material which allows a sufficient reduction in the off-state current of a transistor is used, data can be held for a long period. One line serves as the word line for writing and the word line for reading and one line serves as the bit line for writing and the bit line for reading, whereby the number of wirings is reduced. Further, by reducing the number of source lines, the storage capacity per unit area is increased.
    Type: Grant
    Filed: July 27, 2011
    Date of Patent: March 18, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Daisuke Matsubayashi
  • Publication number: 20140034954
    Abstract: To provide a semiconductor device including a capacitor whose charge capacity is increased without reducing the aperture ratio. The semiconductor device includes a transistor including a light-transmitting semiconductor film, a capacitor where a dielectric film is provided between a pair of electrodes, an insulating film provided over the light-transmitting semiconductor film, and a light-transmitting conductive film provided over the insulating film. In the capacitor, a metal oxide film containing at least indium (In) or zinc (Zn) and formed on the same surface as the light-transmitting semiconductor film in the transistor serves as one electrode, the light-transmitting conductive film serves as the other electrode, and the insulating film provided over the light-transmitting semiconductor film serves as the dielectric film.
    Type: Application
    Filed: August 2, 2013
    Publication date: February 6, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hiroyuki Miyake, Hideaki Shishido, Jun Koyama, Daisuke Matsubayashi, Keisuke Murayama
  • Publication number: 20130285047
    Abstract: A transistor including an oxide semiconductor film, in which the threshold voltage is prevented from being a negative value, is provided. A high quality semiconductor device having the transistor including an oxide semiconductor film is provided. A transistor includes an oxide semiconductor film having first to third regions. The top surface of the oxide semiconductor film in the first region is in contact with a source electrode or a drain electrode. The top surface of the oxide semiconductor film in the second region is in contact with a protective insulating film. The thickness of the second region is substantially uniform and smaller than the maximum thickness of the first region. The top surface and a side surface of the oxide semiconductor film in the third region are in contact with the protective insulating film.
    Type: Application
    Filed: April 18, 2013
    Publication date: October 31, 2013
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Daisuke MATSUBAYASHI, Keisuke MURAYAMA
  • Publication number: 20130270552
    Abstract: A transistor includes oxide semiconductor stacked layers between a first gate electrode layer and a second gate electrode layer through an insulating layer interposed between the first gate electrode layer and the oxide semiconductor stacked layers and an insulating layer interposed between the second gate electrode layer and the oxide semiconductor stacked layers. The thickness of a channel formation region is smaller than the other regions in the oxide semiconductor stacked layers. Further in this transistor, one of the gate electrode layers is provided as what is called a back gate for controlling the threshold voltage. Controlling the potential applied to the back gate enables control of the threshold voltage of the transistor, which makes it easy to maintain the normally-off characteristics of the transistor.
    Type: Application
    Filed: April 11, 2013
    Publication date: October 17, 2013
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Daisuke MATSUBAYASHI, Keisuke MURAYAMA
  • Patent number: 8537600
    Abstract: An object is to provide a semiconductor device which can hold stored data even when not powered and which achieves high integration by reduction of the number of wirings. The semiconductor device is formed using a material which can sufficiently reduce the off-state current of a transistor, e.g., an oxide semiconductor material which is a wide bandgap semiconductor. When a semiconductor material which allows a sufficient reduction in the off-state current of a transistor is used, data can be held for a long period. One line serves as the word line for writing and the word line for reading and one line serves as the bit line for writing and the bit line for reading, whereby the number of wirings is reduced. Accordingly, the storage capacity per unit area is increased.
    Type: Grant
    Filed: July 27, 2011
    Date of Patent: September 17, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Daisuke Matsubayashi
  • Publication number: 20120314470
    Abstract: A memory cell includes a first transistor controlling writing of the first date by being in an on state, and holding of the first data by being in an off state, a second transistor in which a potential of one of a source and a drain is a potential of the second data and a potential of a gate is a potential of the first data, and a third transistor which has a conductivity type opposite to that of the second transistor, which has one of a source and a drain electrically connected to the other of the source and the drain of the second transistor, and in which a potential of a gate is a potential of the first data.
    Type: Application
    Filed: June 5, 2012
    Publication date: December 13, 2012
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Daisuke MATSUBAYASHI
  • Publication number: 20120292614
    Abstract: A content addressable memory has many elements in one memory cell; thus, the area of one memory cell tends to be large. In view of the above, it is an object of an embodiment of the present invention to reduce the area of one memory cell. Charge can be held with the use of a channel capacitance in a reading transistor (capacitance between a gate electrode and a channel formation region). In other words, the reading transistor also serves as a charge storage transistor. One of a source and a drain of a charge supply transistor is electrically connected to a gate of the reading and charge storage transistor.
    Type: Application
    Filed: May 11, 2012
    Publication date: November 22, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Daisuke Matsubayashi
  • Publication number: 20120262979
    Abstract: A memory device includes a memory cell storing data as stored data, an output signal line, and a wiring to which a voltage is applied. The memory cell includes a comparison circuit performing a comparison operation between the stored data and search data and taking a conduction state or a non-conduction state in accordance with the operation result, and a field-effect transistor controlling writing and holding of the stored data. A voltage of the output signal line is equal to the voltage of the wiring when the comparison circuit is in the conduction state.
    Type: Application
    Filed: April 11, 2012
    Publication date: October 18, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Daisuke Matsubayashi
  • Publication number: 20120236634
    Abstract: A selection operation is performed for individual memory cells. A device includes a first memory cell and a second memory cell provided in the same row as the first memory cell, each of which includes a field-effect transistor having a first gate and a second gate. The field-effect transistor controls at least data writing and data holding in the memory cell by being turned on or off. The device further includes a row selection line electrically connected to the first gates of the field-effect transistors included in the first memory cell and the second memory cell, a first column selection line electrically connected to the second gate of the field-effect transistor included in the first memory cell, and a second column selection line electrically connected to the second gate of the field-effect transistor included in the second memory cell.
    Type: Application
    Filed: March 13, 2012
    Publication date: September 20, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Daisuke Matsubayashi
  • Publication number: 20120228688
    Abstract: A memory device that is as small in area as possible and has an extremely long data retention period. A transistor with extremely low leakage current is used as a cell transistor of a memory element in a memory device. Moreover, in order to reduce the area of a memory cell, the transistor is formed so that its source and drain are stacked in the vertical direction in a region where a bit line and a word line intersect each other. Further, a capacitor is stacked above the transistor.
    Type: Application
    Filed: March 2, 2012
    Publication date: September 13, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Daisuke MATSUBAYASHI
  • Publication number: 20120104480
    Abstract: A storage device in which stored data can be held even when power is not supplied, and stored data can be read at high speed without turning on a transistor included in a storage element is provided. In the storage device, a memory cell having a transistor including an oxide semiconductor layer as a channel region and a storage capacitor is electrically connected to a capacitor to form a node. The voltage of the node is boosted up in accordance with stored data by capacitive coupling through a storage capacitor and the potential is read with an amplifier circuit to distinguish data.
    Type: Application
    Filed: October 25, 2011
    Publication date: May 3, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Daisuke Matsubayashi, Tatsuya Ohnuki