Abstract: A rendering device according to the present invention comprises an information acquiring unit for acquiring system information or rendering object information, a control point generating section for setting a curved surface interpolating level serving to determine number of control points for creating a curved surface or a curved line based on the acquired information and thereby generating the control point in accordance with the curved surface interpolating level, and a curved surface creating section for creating the curved surface based on the control point, wherein an operation quantity for rendering the curved surface of a display object is dynamically changed based on the acquired information.

Abstract: A holder 1 has a shank portion 2 provided with a pocket 4 having the shape of a nearly rectangular solid. The pocket 4 is placed at a position relatively close to the tip of the tool. In the cross section of the shank, the pocket 4 has a width of 50% to 100% of the shank diameter or width, a height of 20% to 50% of the shank height, and a length of 50% to 250% of the shank diameter or height. A weight 5 is inserted into the pocket 4 such that the weight is movable but unable to rush out. The weight 5 has the shape of a nearly rectangular solid and is made of a material having a specific gravity comparable to or greater than that of the material of the shank portion.

Abstract: A resource management apparatus comprises an information selection unit having an operation speed different to an operation speed of a common resource and selecting from information transferred from a plurality of bus masters, a buffer unit for storing the information selected by the information selection unit, and a timing adjustment unit for controlling timings of the information selections in the information selection unit. The information selection unit selects the information comprised of a command and data transferred from any of the plurality of bus masters to the common resource. The timing adjustment unit controls the timings of the information selections in the information selection unit so that the sum of time required for selecting a plurality of predetermined volumes of information in the information selection unit and the sum of processing time in the common resource are substantially equal to each other.

Abstract: The present invention's cutting tool coated using the PVD process can cut with high geometrical precision, produce a good machined surface, and cut for a prolonged time. Its substrate is composed of cemented carbide or cermet, has a surface roughness, Ra, of at most 0.3 &mgr;m, is structured by hard particles having an average particle diameter of 0.3 to 1.5 &mgr;m, and has a cutting part having a sharp positive edge. Its coating is formed over the substrate using the PVD process and comprises an inner layer and an outer layer. The total thickness of the inner and outer layers is at most 2.0 &mgr;m. The inner layer comprises (a) at least one of the 4a-, 5a-, 6a-group elements, Al, and Si and (b) at least one of carbon, nitrogen, and oxygen. The outer layer comprises (c) at least one of boron, silicon, carbon, and nitrogen and (d) Ti.

Abstract: A resource management device of the present invention, used in a system where at least one bus master is connected to each of a plurality of buses, includes: a bus arbitration section for arbitrating an amount of access to be made from the buses to a shared resource; an arbitration information management section for managing, as bus arbitration information, a bus priority order and a highest access priority pattern for ensuring a predetermined access bandwidth to the shared resource for each bus for an arbitration operation by the bus arbitration section; and a resource control section for controlling, based on characteristics of the shared resource, an access to the shared resource from the bus whose access request has been granted by the bus arbitration section. Thus, it is possible to guarantee a minimum bandwidth for access to the shared resource for each of the plurality of bus masters.

Abstract: A material to be cut has a face to be cut with a cutting tool, and a cutout which temporarily brings the cutting tool into a noncontact state. Images of the cutting tool during the period when it attains an exposed state by passing over the cutout are captured with a camera mechanism at an interval of a predetermined delay time .tau.. A plurality of image information items obtained by these capturing operations include temperature change information of each location as the cutting tool gradually passes from the point of instant when it enters the cutout. Therefore, the image information items are arranged in relation to the exposure time from the point of instant, and a two-dimensional temperature distribution of the cutting tool at the point of instance is computed according to the tendency of change in image information.

Abstract: An indexable insert with a chip breaker configured such that chips produced under various cutting conditions from rough cutting to finish cutting can be disposed of in an optimum way. Protrusions are provided in a chip breaker groove to extend from a central land toward the respective corners of the insert. Each protrusion has a breaker wall which is concave and curved such that chips produced always collide against the breaker wall at an angle of 10.degree.-40.degree. so that the chips are curled helically with a helix angle of 10.degree.-40.degree. and broken into small pieces reliably.

Abstract: An improved coated hard alloy tool having a substrate made of a hard alloy, and a multi-layer ceramic coating film provided on the surface of the substrate, the coating film including at least one oxide layer. The top several layers of the coating film are missing partially or completely in an area where the tool is brought into frictional contact with a workpiece. At least one oxide layer (such as Al.sub.2 O.sub.3 layer) is included in the missing layers. This increases wear resistance of the coated hard alloy tool.

Abstract: An improved coated hard alloy tool having a substrate made of a hard alloy, and a multi-layer ceramic coating film provided on the surface of the substrate, the coating film including at least one oxide layer. The top several layers of the coating film are missing partially or completely in an area where the tool is brought into frictional contact with a workpiece. At least one oxide layer (such as Al.sub.2 O.sub.3 layer) is included in the missing layers. This increases wear resistance of the coated hard alloy tool.

Abstract: A pulse width modulation apparatus outputs an output pulse having an arbitrary width with respect to an arbitrary point in a pulse period. A delay means associated with a pulse cycle have multi-stage delay output means. Before a control pulse CLKP is fed to each of multi-stage delay output means, a delay time for the delay output means can be set. A rising or falling to be latched by a latch means is controlled based on delay control pulses obtained by the delay output means. An output pulse having an arbitrary pulse width with respect to an arbitrary point can be supplied without occurrence of an offset pulse or a blank duration at the start of each pulse duration.

Abstract: A pulse width modulation circuit apparatus of a digital type using a delay circuit and a decoder, which is provided with a delay control circuit for driving the reset-set type flip-flop of a last output stage and which provides the flip-flop with a mode determination function, whereby the range of the operation frequency is broadened, the generation of a blank pulse and offset pulse can be suppressed, and a higher precision gradation expression can be realized.

Abstract: A pulse width modulation circuit apparatus comprises delay gates, delay circuits and an A/D converter. The delay gates are connected in cascade fashion and delay an input clock signal by the same delay time with each delay gate. The delay circuits are furnished interposingly between the delay gates and derive as their common output the delayed clock signal from the delay gates. Because the number of delay gates through which the input clock signal passes is proportional to the delay time acquired, these components constitute a delay circuit arrangement that offers high levels of linearity. With the delay circuit arrangement in use, any one of the delay circuits constituting part of that arrangement is supplied selectively with an operating current as per the digital output from the A/D converter. This provides a delayed clock signal whose delay time matches the level of the input analog signal.

Abstract: A signal detecting apparatus is to obtain hysteresis characteristic at a constant ratio regardless of signal amplitude fluctuations by supplying the threshold level adjusting signal corresponding to the input signal amplitude to the comparison circuit. The threshold value setting signal and the hysteresis adjusting signal is supplied to a comparison circuit through an amplifier and a hysteresis adjusting means having the identical characteristic with the peak hold circuit to set a threshold value and a hysteresis range. Therefore even in the case where the operating characteristic of the amplifier and the peak hold circuit for detecting the peak level of signal amplitude fluctuate, the threshold value and the hysteresis range fluctuation corresponding to the fluctuation. As a result, there can not need the adjustment for resetting the operating characteristic, the threshold value and the hysteresis range in each circuit and thus the time and labor required for adjustment can be further saved.

Abstract: A pulse signal generator comprising a plurality of stages of delay gates connected in series for receiving an input pulse signal and generating an output pulse signal, each stage consists of a differential connection circuit and an emitter follower circuit, and has a signal delay time which is changed by varying the voltage that controls the current flowing in the current sink of the emitter follower circuit.

Abstract: A pulse signal generator comprising a plurality of stages of delay gates connected in series to one another for delaying input signals fed to input terminals; first differential connection circuits interposed respectively between the stages of the delay gates so as to transmit, at a predetermined timing, the signals passed through the delay gates; first and second input lines for supplying the output signals of the first differential connection circuits to a cascode amplifier; and second differential connection circuits each consisting of a pair of transistors which are supplied with the same input signals as those fed to each pair of transistors constituting the first differential connection circuit, wherein the second differential connection circuit is connected to the first and second input lines in such a manner that the outputs of the transistors thereof become inverse in polarity to the outputs of the transistors of the corresponding first differential connection circuit.

Abstract: A programmable delay circuit comprising input terminals supplied with input signals to be delayed; output terminals for delivering the delayed signals therefrom; resistance elements inserted between the input terminals and the output terminals; n-stage capacitance elements having capacitance values of C, ZC, 4C . . . 2.sup.n-1 C respectively (where C is a unit capacitance value) and each connected at one end thereof to the output ends of the resistance elements; and n-stage selection means for selectively applyign to the other ends of the n-stage capacitance elements either a signal having an opposite-phase or in-phase relation to the input signal, or a reference potential level. The delay circuit is capable of performing a control operation relative to any short delay time on the order of picosecond and still ensuring satisfactory linearity in the delay characteristics.

Abstract: A programmable delay circuit of the present invention is comprised of an input terminal to which an input signal to be delayed is supplied, N (N.gtoreq.

Abstract: Disclosed is a series-parallel type analog-to-digital converter having an analog signal first digitized through coarse quantization to thereby obtain a high-order converted code, and then, the quantization error of the high-order converted code digitized to thereby obtain a low-order converted code, in which it is adapted such that low-order converted codes are sequentially classified into three groups, and when a specific group is output as a redundancy code, a correction code for correcting the high-order converted code is output from the low-order encoder providing the converted code of that group.

Abstract: In an apparatus for reproducing either a video signal or a PCM (pulse code modulated) audio signal from a record medium, the existence of a PCM audio signal recorded on the record medium is detected in response to an identifying pilot signal recorded together with the PCM audio signal, and, when a video signal is being reproduced, detection of a PCM audio signal is obviated. Thus, even if the identifying pilot signal and a portion of the video signal are superposed upon each other on a frequency axis, erroneous assumption of the presence of a recorded PCM audio signal can be avoided to prevent incorrect reproducing operation.

Abstract: A variable frequency oscillator comprises an oscillating loop and a variable phase shifter for imparting one of two different phase shifts depending upon the polarities of a DC control voltage to a signal from the oscillating loop. The phase-shifted signal has its amplitude controlled by the amplitude of the control voltage and is combined with the signal in the oscillating loop. The vector sum of the combined signals determines the phase angle of the oscillator signal and hence the frequency thereof.