Patents by Inventor Daisuke TOKUDA
Daisuke TOKUDA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210242559Abstract: A directional coupler (10) includes a main line (11), a sub-line (12), and a termination circuit (13) that is connected to one end (121) of the sub-line (12), and further includes an adjustment terminal (ADJ), as a lead-out terminal, that is led out from a node (N) between the one end (121) of the sub-line (12) and the termination circuit (13). The termination circuit (13) may be formed of a circuit in which a capacitance element (131) and a resistance element (132) are connected in parallel with each other, a capacitance value of the capacitance element (131) may be smaller than a capacitance value with which the directivity of the directional coupler (10) is optimized and a resistance value of the resistance element (132) may be larger than a resistance value with which the directivity of the directional coupler (10) is optimized.Type: ApplicationFiled: April 20, 2021Publication date: August 5, 2021Inventor: Daisuke TOKUDA
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Publication number: 20210234247Abstract: A coupler module (1) includes a first component (11) and a second component (21) that are mounted on a substrate. The first component (11) includes a coupler (100) having a main line and an auxiliary line, and the second component (21) includes an external circuit for processing a signal that flows into the main line or the auxiliary line and a plurality of first signal terminals (P5, P6) that are input and output terminals of the external circuit for the signal. The plurality of first signal terminals (P5, P6) are arranged in a first portion (A1) that is one of two portions (A1, A2) obtained by dividing the second component (21) and that is farther from the first component (11).Type: ApplicationFiled: April 12, 2021Publication date: July 29, 2021Inventors: Daisuke TOKUDA, Hiromichi KITAJIMA, Hisanori MURASE
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Publication number: 20210184022Abstract: A semiconductor device that includes a bipolar transistor, wherein a third opening, through which a pillar bump and a second wiring line, which is electrically connected to an emitter layer, contact each other, is shifted in a longitudinal direction of the emitter layer away from a position at which the third opening would be directly above the emitter layer. The third opening is arranged, with respect to the emitter layer, such that an end portion of the emitter layer in the longitudinal direction of the emitter layer and the edge of the opening of the third opening are substantially aligned with each other.Type: ApplicationFiled: March 1, 2021Publication date: June 17, 2021Applicant: Murata Manufacturing Co., Ltd.Inventors: Yasunari UMEMOTO, Daisuke TOKUDA, Tsunekazu SAIMEI, Hiroaki TOKUYA
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Patent number: 10978579Abstract: A semiconductor device that includes a bipolar transistor, wherein a third opening, through which a pillar bump and a second wiring line, which is electrically connected to an emitter layer, contact each other, is shifted in a longitudinal direction of the emitter layer away from a position at which the third opening would be directly above the emitter layer. The third opening is arranged, with respect to the emitter layer, such that an end portion of the emitter layer in the longitudinal direction of the emitter layer and the edge of the opening of the third opening are substantially aligned with each other.Type: GrantFiled: July 8, 2019Date of Patent: April 13, 2021Assignee: Murata Manufacturing Co., Ltd.Inventors: Yasunari Umemoto, Daisuke Tokuda, Tsunekazu Saimei, Hiroaki Tokuya
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Publication number: 20210098854Abstract: A directional coupler includes a substrate, a main line 121, a main line 122, and a sub-line. The main line 121 and the main line 122 each include a conductor pattern formed in the substrate, and are connected in parallel to each other. The sub-line includes a conductor pattern formed in the substrate. The sub-line is disposed at a position at least partially overlapping with the main line 121 in a plan view of the substrate.Type: ApplicationFiled: September 22, 2020Publication date: April 1, 2021Inventors: Daisuke TOKUDA, Yasushi SHIGENO
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Patent number: 10964996Abstract: Bidirectional detection is performed with a suppressed increase in return loss at an output terminal. A bidirectional coupler includes a detection port, a main line connected to a first port and a second port, a sub-line, a termination circuit, a switch circuit that switches each of one end and another end of the sub-line to the termination circuit or the detection port, and a matching network disposed between the switch circuit and the detection port and including at least one of a first variable capacitor, a first variable inductor, or a first variable resistor. In a first mode for detecting a first signal, the switch circuit connects the one end of the sub-line to the detection port, and connects the other end of the sub-line to the termination circuit.Type: GrantFiled: September 23, 2019Date of Patent: March 30, 2021Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Ryangsu Kim, Katsuya Shimizu, Yasushi Shigeno, Daisuke Tokuda, Mikiko Fukasawa
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Publication number: 20210043995Abstract: A directional coupler includes: a main line; a sub line; a first switch, a first end of which is directly connected to one end of the sub line and a second end of which is connected to a first signal path that extends to an isolation port (ISO), which is a first port; and a second switch, a first end of which is directly connected to another end of the sub line and a second end of which is connected to a second signal path that extends to a coupling port (CPL), which is a second port.Type: ApplicationFiled: October 22, 2020Publication date: February 11, 2021Inventors: Daisuke TOKUDA, Hisanori MURASE
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Publication number: 20210036395Abstract: A directional coupler includes a main line through which a signal is transmitted, first and second sub-lines that are selectively coupled to the main line, and a common output port that outputs a detection signal generated by the signal transmitted through the main line, wherein a first degree of coupling between the main line and the first sub-line is different than a second degree of coupling between the main line and the second sub-line.Type: ApplicationFiled: July 29, 2020Publication date: February 4, 2021Inventors: Kenta SEKI, Yasushi SHIGENO, Daisuke TOKUDA, Ryangsu KIM, Katsuya SHIMIZU, Kazuhito OSAWA
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Publication number: 20210036396Abstract: A directional coupler includes a main line, a first sub-line to be electromagnetically coupled to the main line, a second sub-line to be electromagnetically coupled to the main line, and a coupling terminal configured to output a detection signal corresponding to a radio frequency signal that is transmitted through the main line, the first sub-line and the second sub-line are different in length from each other, and connection between the first sub-line and the coupling terminal and connection between the second sub-line and the coupling terminal are switched.Type: ApplicationFiled: July 29, 2020Publication date: February 4, 2021Inventors: Kenta SEKI, Yasushi SHIGENO, Daisuke TOKUDA, Ryangsu KIM, Katsuya SHIMIZU, Kazuhito OSAWA
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Publication number: 20210013579Abstract: A directional coupler (1) includes a surface mounted component (10) and a mounting substrate (20) on which the surface mounted component (10) is mounted. Among a main line and a sub line of the directional coupler (1), the main line is formed of a first line (31) and a second line (32), one end (311) of the first line (31) and one end (321) of the second line (32) being connected to each other, the sub line is formed of a third line (33). The first line (31) and the third line (33) are formed in the surface mounted component (10). The second line (32) is formed on or in the mounting substrate (20). Furthermore, another end (312) of the first line (31) and another end (322) of the second line (32) may be connected to each other.Type: ApplicationFiled: September 25, 2020Publication date: January 14, 2021Inventor: Daisuke TOKUDA
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Publication number: 20210013858Abstract: A directional coupler (2) includes a main line (11), a sub-line (12), a variable terminator (13), and a variable filter circuit (15). The variable terminator (13) is a variable impedance circuit that terminates one end portion of the sub-line (12). The variable filter circuit (15) is connected to the other end portion of the sub-line (12). The variable filter circuit (15) may include a filter, a bypass path, and a switch which is connected to at least one of the filter and the bypass path.Type: ApplicationFiled: September 25, 2020Publication date: January 14, 2021Inventors: Daisuke TOKUDA, Ryangsu KIM, Yasushi SHIGENO, Katsuya SHIMIZU
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Publication number: 20200365964Abstract: A directional coupler (1) includes a substrate (10), a main line (20) formed directly or indirectly on the substrate (10), sub-lines (21, 22 and 23) at least part of each of which is formed directly or indirectly on the substrate (10) along the main line (20), a switch (30) switching connections among end portions of the plurality of sub-lines (21, 22 and 23), and detection output terminals (FWD and REV) connected to the sub-line (21), wherein, when looking at the substrate (10) in plan, the end portions of the sub-lines (21, 22 and 23) are disposed on the opposite side to the detection output terminals (FWD and REV) relative to the main line (20), and the sub-line (21) to which the detection output terminals (FWD and REV) are connected is overlapped with or surrounded by the sub-lines (22 and 23).Type: ApplicationFiled: August 4, 2020Publication date: November 19, 2020Inventors: Daisuke TOKUDA, Yasushi SHIGENO
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Publication number: 20200365965Abstract: A directional coupler (1) includes a substrate (10), a main line (20) formed directly or indirectly on the substrate (10), sub-lines (21, 22 and 23) at least part of each of which is formed directly or indirectly on the substrate (10) along the main line (20), a switch (30) switching connections among end portions of the plurality of sub-lines (21, 22 and 23), and detection output terminals (FWD and REV) connected to the sub-line (21), wherein, when looking at the substrate (10) in plan, the end portions of the sub-lines (21, 22 and 23) are disposed on the same side as the detection output terminals (FWD and REV) relative to the main line (20), and the sub-line (21) to which the detection output terminals (FWD and REV) are connected is overlapped with or surrounded by the sub-lines (22 and 23).Type: ApplicationFiled: August 4, 2020Publication date: November 19, 2020Inventors: Daisuke TOKUDA, Yasushi SHIGENO
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Publication number: 20200365963Abstract: A directional coupler (10) includes a main line (20), a sub-line (40), and a variable capacitor (60). At least part of the sub-line (40) is disposed along the main line (20). The variable capacitor (60) is connected between the main line (20) and the sub-line (40). The directional coupler (10) achieves a stable degree of coupling between the main line (20) and the sub-line (40).Type: ApplicationFiled: August 6, 2020Publication date: November 19, 2020Inventor: Daisuke TOKUDA
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Patent number: 10559547Abstract: A semiconductor chip includes a semiconductor substrate having a main surface, first and second electrodes, a first insulating layer, and first and second bumps. The first and second electrodes are formed above the main surface of the semiconductor substrate. The first insulating layer is formed above a first portion of the first electrode. The first bump is formed above a second portion of the first electrode and above the first insulating layer and is electrically connected to the first electrode. The second bump is formed above the second electrode. The area of the second bump is larger than that of the first bump in a plan view of the main surface of the semiconductor substrate. The first insulating layer adjusts the distance from the main surface of the semiconductor substrate to the top surface of the first bump in a direction normal to the main surface.Type: GrantFiled: June 12, 2018Date of Patent: February 11, 2020Assignee: Murata Manufacturing Co., Ltd.Inventors: Masahiro Shibata, Daisuke Tokuda, Atsushi Kurokawa, Hiroaki Tokuya, Yasunari Umemoto
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Publication number: 20200021003Abstract: Bidirectional detection is performed with a suppressed increase in return loss at an output terminal. A bidirectional coupler includes a detection port, a main line connected to a first port and a second port, a sub-line, a termination circuit, a switch circuit that switches each of one end and another end of the sub-line to the termination circuit or the detection port, and a matching network disposed between the switch circuit and the detection port and including at least one of a first variable capacitor, a first variable inductor, or a first variable resistor. In a first mode for detecting a first signal, the switch circuit connects the one end of the sub-line to the detection port, and connects the other end of the sub-line to the termination circuit.Type: ApplicationFiled: September 23, 2019Publication date: January 16, 2020Inventors: Ryangsu KIM, Katsuya SHIMIZU, Yasushi SHIGENO, Daisuke TOKUDA, Mikiko FUKASAWA
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Publication number: 20190333887Abstract: A semiconductor device that includes a bipolar transistor, wherein a third opening, through which a pillar bump and a second wiring line, which is electrically connected to an emitter layer, contact each other, is shifted in a longitudinal direction of the emitter layer away from a position at which the third opening would be directly above the emitter layer. The third opening is arranged, with respect to the emitter layer, such that an end portion of the emitter layer in the longitudinal direction of the emitter layer and the edge of the opening of the third opening are substantially aligned with each other.Type: ApplicationFiled: July 8, 2019Publication date: October 31, 2019Applicant: Murata Manufacturing Co., Ltd.Inventors: Yasunari UMEMOTO, Daisuke TOKUDA, Tsunekazu SAIMEI, Hiroaki TOKUYA
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Patent number: 10388623Abstract: A semiconductor device that includes a bipolar transistor, wherein a third opening, through which a pillar bump and a second wiring line, which is electrically connected to an emitter layer, contact each other, is shifted in a longitudinal direction of the emitter layer away from a position at which the third opening would be directly above the emitter layer. The third opening is arranged, with respect to the emitter layer, such that an end portion of the emitter layer in the longitudinal direction of the emitter layer and the edge of the opening of the third opening are substantially aligned with each other.Type: GrantFiled: April 16, 2018Date of Patent: August 20, 2019Assignee: Murata Manufacturing Co., Ltd.Inventors: Yasunari Umemoto, Daisuke Tokuda, Tsunekazu Saimei, Hiroaki Tokuya
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Publication number: 20190006306Abstract: A semiconductor chip includes a semiconductor substrate having a main surface, first and second electrodes, a first insulating layer, and first and second bumps. The first and second electrodes are formed above the main surface of the semiconductor substrate. The first insulating layer is formed above a first portion of the first electrode. The first bump is formed above a second portion of the first electrode and above the first insulating layer and is electrically connected to the first electrode. The second bump is formed above the second electrode. The area of the second bump is larger than that of the first bump in a plan view of the main surface of the semiconductor substrate. The first insulating layer adjusts the distance from the main surface of the semiconductor substrate to the top surface of the first bump in a direction normal to the main surface.Type: ApplicationFiled: June 12, 2018Publication date: January 3, 2019Applicant: Murata Manufacturing Co., Ltd.Inventors: Masahiro SHIBATA, Daisuke TOKUDA, Atsushi KUROKAWA, Hiroaki TOKUYA, Yasunari UMEMOTO
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Patent number: 10121746Abstract: A semiconductor device includes a semiconductor substrate, a first metal layer, an insulation layer, an organic layer, and a second metal layer. The first metal layer, the insulation layer, the organic layer, and the second metal layer are sequentially stacked on a surface of the semiconductor substrate. The first metal layer and the second metal layer are electrically connected to each other through vias formed in the insulation layer and the organic layer. The second metal layer includes an electrode pad at a position corresponding to the positions of the vias. At the interface between the surface of the semiconductor substrate and the first metal layer, a patch portion having a trapezoidal cross-sectional shape is disposed directly below the vias.Type: GrantFiled: November 16, 2017Date of Patent: November 6, 2018Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Kazuya Kobayashi, Yuichi Sano, Daisuke Tokuda, Hiroaki Tokuya