Patents by Inventor Daisuke Uchida
Daisuke Uchida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220183811Abstract: Provided is a technology that allows estrus of a sow to be accurately determined without relying on experience or in intuition of an observer. An estrus determination device for a sow includes a measurement unit that measures, per unit time, a frequency of standing up and lying down of a sow raised in a stall and a determination unit that determines estrus of the sow on the basis of a plurality of frequencies repetitively measured by the measurement unit over a set given period.Type: ApplicationFiled: March 4, 2022Publication date: June 16, 2022Inventors: Shin SUKEGAWA, Daisuke UCHIDA, Masaki OKUDA, Tatsuki YOSHIDA, Naoki MORITA, Yusuke OSHIRO
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Publication number: 20220113907Abstract: A memory system includes a nonvolatile memory that stores table data and a memory controller for writing and reading data to and from the nonvolatile memory. The memory controller includes a volatile memory that can be in either a retention state during which power is supplied thereto or a power down state during which the power supplied thereto is cut off, a timer that measures elapsed time starting from when the memory system transitions to the low power state, and a register in which previously measured elapsed times are stored, and in which a current measured elapsed time is stored when the memory system wakes up from the low power state. The controller controls the transitioning of the volatile memory from the retention state to the power down state, if the measured elapsed time is greater than a threshold value, which is calculated based on the previously measured elapsed times.Type: ApplicationFiled: February 25, 2021Publication date: April 14, 2022Inventors: Tasuku KOBAYASHI, Daisuke UCHIDA, Michita FUJII
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Publication number: 20220077940Abstract: An electronic apparatus includes a processor configured to determine, among first wireless communication apparatuses arranged at first positions in an environment, a second wireless communication apparatus and a third wireless communication apparatus based on a fault to be detected in the environment, the third wireless apparatus measuring first information associated with propagation of a radio wave with the second wireless communication apparatus.Type: ApplicationFiled: February 26, 2021Publication date: March 10, 2022Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Takafumi SAKAMOTO, Daisuke UCHIDA
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Patent number: 11147025Abstract: According to one embodiment, an electronic apparatus includes receiver circuitry, transmitter circuitry, and processor circuitry. The receiver circuitry receives a first signal including first data via a first frequency band. The transmitter circuitry starts transmission of a second signal via at least a part of the first frequency band. The processor circuitry reduces interference caused by the second signal to receive the first signal. The processor circuitry increases a power of the second signal until reducing the interference becomes stable for the first time since the transmitter circuitry has started transmission of the second signal.Type: GrantFiled: September 3, 2019Date of Patent: October 12, 2021Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Daiki Yoda, Koji Akita, Daisuke Uchida, Tamio Kawaguchi
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Patent number: 11133082Abstract: The non-volatile semiconductor memory device comprises a non-volatile semiconductor memory, a controller for controlling the non-volatile semiconductor memory, the controller includes a reset terminal capable of receiving a reset signal from a host, an interface circuit capable of receiving a sleep command, and a data storing circuit, when the reset signal is received in a state which the interface circuit is being supplied with power, the data storing circuit is reset, when a sleep command is received in a state which the interface circuit is being supplied with power, the data necessary for communication with the host or the non-volatile semiconductor memory device is stored into the data storing circuit and power to the interface circuit is interrupted and when the reset signal is received in a state which power to the interface circuit is interrupted, the data is read from the data storing circuit.Type: GrantFiled: March 10, 2020Date of Patent: September 28, 2021Assignee: Kioxia CorporationInventor: Daisuke Uchida
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Patent number: 11122370Abstract: A glass sheet composite includes at least two sheets and a liquid layer held between the two sheets, and at least one of the two sheets being a glass sheet. In the glass sheet composite, the two sheets have been disposed so that an edge surface of one of the two sheets and an edge surface of the other sheet are not flush with each other to constitute a step portion having a stair-like shape in a cross-sectional view, and the glass sheet composite further comprising a seal material provided to the step portion to seal up at least the liquid layer.Type: GrantFiled: August 23, 2019Date of Patent: September 14, 2021Assignee: AGC Inc.Inventors: Jun Akiyama, Shinya Tahara, Daisuke Uchida, Kento Sakurai
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Publication number: 20210271411Abstract: A memory controller that controls a nonvolatile memory in response to commands from a host includes a normal transfer queue and a priority transfer queue, a transfer packet priority determination unit, a transfer queue selector, and a transfer packet selector. The transfer packet priority determination unit determines whether a transfer packet is a priority packet based on transmission information of the transfer packet. The transfer queue selector selects the priority transfer queue and stores the transfer packet in the priority transfer queue if the transfer packet is determined as a priority packet, and selects the normal transfer queue and stores the transfer packet in the normal transfer queue if the transfer packet is not determined as a priority packet. The transfer packet selector transfers to the host a priority packet stored in the priority transfer queue preferentially with respect to a normal packet stored in the normal transfer queue.Type: ApplicationFiled: May 14, 2021Publication date: September 2, 2021Inventor: Daisuke UCHIDA
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Patent number: 11042321Abstract: A memory controller that controls a nonvolatile memory in response to commands from a host, includes a normal transfer queue and a priority transfer queue, a transfer packet priority determination unit, a transfer queue selector, and a transfer packet selector. The transfer packet priority determination unit determines whether a transfer packet is a priority packet based on transmission information of the transfer packet. The transfer queue selector selects the priority transfer queue and stores the transfer packet in the priority transfer queue when the transfer packet is determined as the priority packet, and selects the normal transfer queue and stores the transfer packet in the normal transfer queue when the transfer packet is not determined as the priority packet. The transfer packet selector transfers to a host a priority packet stored in the priority transfer queue preferentially with respect to a normal packet stored in the normal transfer queue.Type: GrantFiled: August 27, 2019Date of Patent: June 22, 2021Assignee: TOSHIBA MEMORY CORPORATIONInventor: Daisuke Uchida
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Publication number: 20210127452Abstract: According to one embodiment, an electronic apparatus includes a transmitter and a processor. The transmitter transmits a signal to a first electronic apparatus with one of patterns including at least a first pattern which is a first order and which uses first to n-th frequency bands in first to n-th periods and a second pattern which is a second order different from the first order and which uses the first to n-th frequency bands in the first to n-th periods, where n is an integer greater than or equal to two. The processor switches a pattern to be used among the patterns in accordance with a communication situation.Type: ApplicationFiled: September 8, 2020Publication date: April 29, 2021Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Daisuke UCHIDA, Koji AKITA, Takafumi SAKAMOTO
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Patent number: 10989780Abstract: According to one embodiment, a magnetic resonance imaging system includes a magnetic resonance imaging apparatus and a receiving coil unit. The apparatus includes first circuitry which transmits an RF pulse based on a first clock. The coil unit includes clock generating circuitry, a receiving coil and first conversion circuitry. The clock generating circuitry generates a second clock. The first conversion circuitry samples a magnetic resonance signal in accordance with the second clock. The coil unit further includes generation circuitry which generates shift information regarding a difference between the first clock and the second clock, and shift correction circuitry which corrects the sampled magnetic resonance signal by using the shift information.Type: GrantFiled: July 16, 2018Date of Patent: April 27, 2021Assignee: Canon Medical Systems CorporationInventors: Daisuke Uchida, Koji Akita
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Publication number: 20210012854Abstract: The non-volatile semiconductor memory device comprises a non-volatile semiconductor memory, a controller for controlling the non-volatile semiconductor memory, the controller includes a reset terminal capable of receiving a reset signal from a host, an interface circuit capable of receiving a sleep command, and a data storing circuit, when the reset signal is received in a state which the interface circuit is being supplied with power, the data storing circuit is reset, when a sleep command is received in a state which the interface circuit is being supplied with power, the data necessary for communication with the host or the non-volatile semiconductor memory device is stored into the data storing circuit and power to the interface circuit is interrupted and when the reset signal is received in a state which power to the interface circuit is interrupted, the data is read from the data storing circuit.Type: ApplicationFiled: March 10, 2020Publication date: January 14, 2021Applicant: Kioxia CorporationInventor: Daisuke UCHIDA
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Patent number: 10823796Abstract: According to one embodiment, a magnetic resonance imaging apparatus includes processing circuitry. The processing circuitry acquires a B1 sensitivity map of an imaging region that includes a subject. The processing circuitry sets a reference value in the B1 sensitivity map. The processing circuitry estimates an error generated when calculating a B1 map setting value based on the B1 sensitivity map, by using the reference value and the B1 sensitivity map. The processing circuitry calculates an amplitude and a phase of an RF pulse based on the error.Type: GrantFiled: October 30, 2018Date of Patent: November 3, 2020Assignee: Canon Medical Systems CorporationInventors: Koji Akita, Daisuke Uchida
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Publication number: 20200285413Abstract: A memory controller that controls a nonvolatile memory in response to commands from a host, includes a normal transfer queue and a priority transfer queue, a transfer packet priority determination unit, a transfer queue selector, and a transfer packet selector. The transfer packet priority determination unit determines whether a transfer packet is a priority packet based on transmission information of the transfer packet. The transfer queue selector selects the priority transfer queue and stores the transfer packet in the priority transfer queue when the transfer packet is determined as the priority packet, and selects the normal transfer queue and stores the transfer packet in the normal transfer queue when the transfer packet is not determined as the priority packet. The transfer packet selector transfers to a host a priority packet stored in the priority transfer queue preferentially with respect to a normal packet stored in the normal transfer queue.Type: ApplicationFiled: August 27, 2019Publication date: September 10, 2020Inventor: Daisuke UCHIDA
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Patent number: 10743783Abstract: A pulse wave analysis apparatus including a memory, and a processor coupled to the memory and the processor configured to execute a process, the process including extracting, from each of a plurality of captured images of a subject, a plurality of image areas corresponding to each of a plurality of parts of the subject respectively, generating pieces of waveform data corresponding to the plurality of parts based on an image analysis for the plurality of image areas, each of the pieces of waveform data indicating a pulse wave of the subject, calculating a first matching degree between the pieces of waveform data, and determining whether a noise is included in the pieces of waveform data based on the first matching degree.Type: GrantFiled: May 14, 2018Date of Patent: August 18, 2020Assignee: FUJITSU LIMITEDInventors: Tatsuya Mori, Daisuke Uchida, Kazuho Maeda, Akihiro Inomata
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Publication number: 20200229108Abstract: According to one embodiment, an electronic apparatus includes receiver circuitry, transmitter circuitry, and processor circuitry. The receiver circuitry receives a first signal including first data via a first frequency band. The transmitter circuitry starts transmission of a second signal via at least a part of the first frequency band. The processor circuitry reduces interference caused by the second signal to receive the first signal. The processor circuitry increases a power of the second signal until reducing the interference becomes stable for the first time since the transmitter circuitry has started transmission of the second signal.Type: ApplicationFiled: September 3, 2019Publication date: July 16, 2020Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Daiki YODA, Koji AKITA, Daisuke UCHIDA, Tamio KAWAGUCHI
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Publication number: 20200223187Abstract: A glass sheet composite includes a first glass sheet, a second sheet disposed opposite the first glass sheet, and a liquid layer formed by sealing up a liquid between the first glass sheet and the second sheet, in which the glass sheet composite has a plurality of vibration areas that are independent of each other in a plan view. The glass sheet composite is a diaphragm including at least one vibrator disposed on one side or both sides of the glass sheet composite. The glass sheet composite enables independent vibration at each of the vibration areas, and enables not only stereophonic or multiphonic reproduction but also local reproduction to be performed along with images. Since the diaphragm includes a vibrator, this diaphragm is excellent in sound reproduction.Type: ApplicationFiled: March 18, 2020Publication date: July 16, 2020Applicant: AGC Inc.Inventors: Kento SAKURAI, Jun AKIYAMA, Daisuke UCHIDA, Shinya TAHARA
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Patent number: 10684334Abstract: According to one embodiment, a magnetic resonance imaging apparatus includes processing circuitry. The processing circuitry calculates inverse characteristics of a B1 sensitivity map in an imaging area of a subject. The processing circuitry fits a multi-degree polynomial function to the inverse characteristics of the B1 sensitivity map. The processing circuitry calculates positions in k-space, amplitudes and phases of a plurality of RF pulses by associating the polynomial function fit to the inverse characteristics with a relational expression between the RF pulses and k-space. The processing circuitry controls application of the RF pulses in accordance with the positions, the amplitudes and the phases. The polynomial function and the relational expression have equal degrees.Type: GrantFiled: April 20, 2018Date of Patent: June 16, 2020Assignee: Canon Medical Systems CorporationInventors: Daisuke Uchida, Koji Akita
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Patent number: 10513999Abstract: An engine controller according to one aspect of the invention is applied to a cylinder injection engine including a fuel injection valve that directly injects fuel into a cylinder. The engine controller determines whether knocking is occurring based on a signal from a knocking sensor. When the knocking is occurring, the engine controller performs partial lift fuel injection at a predetermined timing close to an ignition timing. The partial lift fuel injection is performed with a lift amount of a valve body of the fuel injection valve limited within a range between a minimum lift amount (0) and a partial lift amount, which is smaller than a maximum lift amount.Type: GrantFiled: September 2, 2014Date of Patent: December 24, 2019Assignee: Toyota Jidosha Kabushiki KaishaInventors: Daisuke Uchida, Motonari Yarino, Susumu Hashimoto
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Publication number: 20190387322Abstract: A glass sheet composite includes at least two sheets and a liquid layer held between the two sheets, and at least one of the two sheets being a glass sheet. In the glass sheet composite, the two sheets have been disposed so that an edge surface of one of the two sheets and an edge surface of the other sheet are not flush with each other to constitute a step portion having a stair-like shape in a cross-sectional view, and the glass sheet composite further comprising a seal material provided to the step portion to seal up at least the liquid layer.Type: ApplicationFiled: August 23, 2019Publication date: December 19, 2019Applicant: AGC Inc.Inventors: Jun AKIYAMA, Shinya TAHARA, Daisuke UCHIDA, Kento SAKURAI
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Patent number: 10358999Abstract: An engine controller according to one aspect of the invention is applied to a cylinder injection engine including a fuel injection valve that directly injects fuel into a cylinder. The engine controller determines whether knocking is occurring based on a signal from a knocking sensor. When the knocking is occurring, the engine controller performs partial lift fuel injection at a predetermined timing close to an ignition timing. The partial lift fuel injection is performed with a lift amount of a valve body of the fuel injection valve limited within a range between a minimum lift amount (0) and a partial lift amount, which is smaller than a maximum lift amount.Type: GrantFiled: September 2, 2014Date of Patent: July 23, 2019Assignee: Toyota Jidosha Kabushiki KaishaInventors: Daisuke Uchida, Motonari Yarino, Susumu Hashimoto