Patents by Inventor Daisuke Umeda

Daisuke Umeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Trans-impedance amplifier
    Patent number: 7944290
    Abstract: Systems and apparatus for converting an input current signal into two or more output voltage signals on an integrated circuit. In one aspect, an integrated circuit includes a first trans-impedance amplifier that includes a first cascode amplifier; and a second trans-impedance amplifier that includes a second cascode amplifier, the second cascode amplifier and the first cascode amplifier sharing an input transistive element; where the first cascode amplifier is coupled to one or more first switches that disable the first trans-impedance amplifier, the second cascode amplifier is coupled to one or more second switches that disable the second trans-impedance amplifier, and control logic coupled to the one or more first switches and the one or more second switches disables at least one of the first trans-impedance amplifier or the second trans-impedance amplifier.
    Type: Grant
    Filed: January 26, 2009
    Date of Patent: May 17, 2011
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Pak-Ho Yeung, Daisuke Umeda
  • Trans-impedance amplifier
    Publication number: 20100188154
    Abstract: Systems and apparatus for converting an input current signal into two or more output voltage signals on an integrated circuit. In one aspect, an integrated circuit includes a first trans-impedance amplifier that includes a first cascode amplifier; and a second trans-impedance amplifier that includes a second cascode amplifier, the second cascode amplifier and the first cascode amplifier sharing an input transistive element; where the first cascode amplifier is coupled to one or more first switches that disable the first trans-impedance amplifier, the second cascode amplifier is coupled to one or more second switches that disable the second trans-impedance amplifier, and control logic coupled to the one or more first switches and the one or more second switches disables at least one of the first trans-impedance amplifier or the second trans-impedance amplifier.
    Type: Application
    Filed: January 26, 2009
    Publication date: July 29, 2010
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Pak-Ho Yeung, Daisuke Umeda