Patents by Inventor Dale A. Martin
Dale A. Martin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8180659Abstract: An approach to identifying and measuring adherence to software development requirements is presented. A software agent provides a user with product and technical questions. In turn, the user provides product and technical answers, or attributes, which are stored in a repository. A globalization plan generator uses the product and technical attributes to generate a software development plan. In addition, a globalization verification test generator uses the globalization plan to generate a test plan and measure the success of the software product based upon the test plan.Type: GrantFiled: March 15, 2008Date of Patent: May 15, 2012Assignee: International Business Machines CorporationInventors: Steven Edward Atkin, Michael Francis Moriarty, Dale Martin Schultz, William James Sullivan, Susan Jane Williams, Luis Zapata
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Patent number: 7883990Abstract: A method of forming a semiconductor-on-insulator (SOI) substrate using a thermal annealing process to provide a semiconductor base wafer having a thin high resistivity surface layer that is positioned at the interface with the buried insulating layer is provided. Specifically, the inventive method fabricates an a semiconductor-on-insulator (SOI) substrate having an SOI layer and a semiconductor base wafer that are separated, at least in part, by a buried insulating layer, wherein the semiconductor base wafer includes a high resistivity (HR) surface layer located on a lower resistivity semiconductor portion of the semiconductor base wafer, and the HR surface layer forms an interface with the buried insulating layer.Type: GrantFiled: October 31, 2007Date of Patent: February 8, 2011Assignee: International Business Machines CorporationInventors: Max Levy, Dale Martin, Gerd Pfeiffer, James A. Slinkman
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Patent number: 7855682Abstract: A transmitter of a platform is arranged to generate a transmission pulse, which is transmitted to a receiver of another platform and is also arranged to couple its transmission pulse to a digital receiver associated with its platform via an attenuator and a coupler. Another platform performs a similar task. Each digital receiver determines the time separation between its transmission pulse and a received pulse from the other platform. The determined time separation information is shared with the other platform, and each digital receiver then determines a time offset between the time at its platform and the other platform.Type: GrantFiled: July 5, 2006Date of Patent: December 21, 2010Assignee: Selex Galileo Ltd.Inventors: Dale Martin Gould, Robert David Cooper
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Patent number: 7793262Abstract: A method, apparatus, and computer instructions for testing software. A set of questions regarding the application is presented, wherein the set of questions are selected from a database. In response to receiving a user input to the set of questions, the application is tested to form identified testing. In response to identifying testing, a testing report is generated using the identified testing, wherein the testing report includes links to testing instructions for the identified testing for the application.Type: GrantFiled: July 29, 2004Date of Patent: September 7, 2010Assignee: International Business Machines CorporationInventors: Steven Edward Atkin, Mark Edward Davis, Michael Francis Moriarty, Dale Martin Schultz, William James Sullivan, Luis M. Zapata
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Publication number: 20090160699Abstract: A transmitter (106, 120, 118, 122 and 110) of a platform (100) is arranged to generate a transmission pulse which is transmitted to a receiver (212, 224 and 208) of another platform (200) and is also arranged to couple its transmission pulse to a digital receiver (104) associated with its platform (100) via attenuater (126) and coupler (124). The other platform (200) performs a similar task. Each digital receiver (108, 208) determines the time separation between its transmission pulse and received pulse from the other platform (100 or 200). The determined time separation information is shared with the other platform (100, 200) and each digital receiver (108, 208) then determines a time offset (?t) between the time at its platform (100) and the other platform (200).Type: ApplicationFiled: July 5, 2006Publication date: June 25, 2009Applicant: Selex Sensors and Airborne Systems, LimitedInventors: Dale Martin Gould, Robert David Cooper
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Publication number: 20090110898Abstract: A method of forming a semiconductor-on-insulator (SOI) substrate using a thermal annealing process to provide a semiconductor base wafer having a thin high resistivity surface layer that is positioned at the interface with the buried insulating layer is provided. Specifically, the inventive method fabricates an a semiconductor-on-insulator (SOI) substrate having an SOI layer and a semiconductor base wafer that are separated, at least in part, by a buried insulating layer, wherein the semiconductor base wafer includes a high resistivity (HR) surface layer located on a lower resistivity semiconductor portion of the semiconductor base wafer, and the HR surface layer forms an interface with the buried insulating layer.Type: ApplicationFiled: October 31, 2007Publication date: April 30, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Max Levy, Dale Martin, Gerd Pfeiffer, James A. Slinkman
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Patent number: 7496544Abstract: An improved method, apparatus, and computer instructions for evaluating acquisition costs for a software product. A set of questions regarding the software product is presented. The set of questions are selected from a source. Costs for acquiring the software product are identified in response to receiving a user input to the set of questions. A report is generated using the costs, wherein the report is used to evaluate whether to acquire the software product in response to identifying the costs.Type: GrantFiled: April 19, 2005Date of Patent: February 24, 2009Assignee: International Business Machines CorporationInventors: Steven Edward Atkin, Mark Edward Davis, Michael Francis Moriarty, Dale Martin Schultz, William James Sullivan, Luis Zapata
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Patent number: 7484777Abstract: An electronic push retraction exit device includes a support rail, a push rail and a latch mechanism having a latch bolt operably connected to the push rail and movable between latched and unlatched positions. A control circuit in the exit device drives a linear actuator to retract and hold the push rail and the latch bolt in the unlatched position. The linear actuator preferably includes a stepping motor and is connected to the push rail through a lost motion connection allowing the exit device to be mechanically operated without moving the linear actuator. The control circuit preferably includes an electrical adjustment for the retraction distance of the latch bolt and an adjustable relatch timer. The exit device may be operated by a remote switch attached to a control connection, which may be permanently closed to simulate a prior art electrically operated exit device for compatibility with third party control systems.Type: GrantFiled: June 30, 2006Date of Patent: February 3, 2009Assignee: Sargent Manufacturing CompanyInventors: Mark A. Condo, Darren C. Eller, Jon Hulse, Kosta G. Karachristos, Dale Martin, Brett E. Tannone
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Publication number: 20080163157Abstract: An approach to identifying and measuring adherence to software development requirements is presented. A software agent provides a user with product and technical questions. In turn, the user provides product and technical answers, or attributes, which are stored in a repository. A globalization plan generator uses the product and technical attributes to generate a software development plan. In addition, a globalization verification test generator uses the globalization plan to generate a test plan and measure the success of the software product based upon the test plan.Type: ApplicationFiled: March 15, 2008Publication date: July 3, 2008Inventors: Steven Edward Atkin, Michael Francis Moriarty, Dale Martin Schultz, William James Sullivan, Susan Jane Williams, Luis Zapata
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Publication number: 20070287275Abstract: A method of fabricating polysilicon lines and polysilicon gates, the method of including: forming a dielectric layer on a top surface of a substrate; forming a polysilicon layer on a top surface of the dielectric layer; implanting the polysilicon layer with N-dopant species, the N-dopant species essentially contained within the polysilicon layer; implanting the polysilicon layer with a nitrogen containing species, the nitrogen containing species essentially contained within the polysilicon layer.Type: ApplicationFiled: August 8, 2007Publication date: December 13, 2007Inventors: James Adkisson, John Ellis-Monaghan, Glenn MacDougall, Dale Martin, Kirk Peterson, Bruce Porth
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Publication number: 20070128776Abstract: The present invention provides a method of forming an ultra-thin and uniform layer of Si including the steps of providing a substrate having semiconducting regions separated by insulating regions; implanting dopants into the substrate to provide an etch differential doped portion in the semiconducting regions underlying an upper Si-containing surface of the semiconducting regions; forming a trench in the substrate including the semiconducting regions and the insulating regions; removing the etch differential doped portion from the semiconductor regions to produce a cavity underlying the upper surface of the semiconducting regions; and filling the trench with a trench dielectric, wherein the trench dielectric material encloses the cavity underlying the upper Si-containing surface of the semiconducting regions. The upper Si-containing surface of the semiconducting regions has a uniform thickness of less than about 100 ?.Type: ApplicationFiled: February 1, 2007Publication date: June 7, 2007Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Matthew Breitwisch, Chung Lam, Randy Mann, Dale Martin
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Patent number: 7221969Abstract: A new and improved method and apparatus for determining cerebral oxygenation. In one basic aspect, a new processing methodology for oxygenation determination, in particular cerebral oxygenation, is provided based on the apprehension and discovery that time-based photon quantity determinations of the wavelength-specific light leaving the head of the patient may be significantly improved, and simplified, by determining the quantity of returning photons in at least one set of two different but closely spaced points in time following the instant of injection, and then taking the ratio of the determinations in each set, to thereby cancel and remove several important sources of error.Type: GrantFiled: February 27, 2003Date of Patent: May 22, 2007Assignee: Neurophysics CorporationInventors: Hugh F. Stoddart, Hugh A. Stoddart, Thomas Christopher John Sefranek, Timothy Olden, Dale Martin
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Publication number: 20070029491Abstract: A collimator, and in particular a method for making a collimator for use with a small high resolution single-photon emission computed tomographic (SPECT) imaging tool for small animal research. The collimator is sized, both functionally and structurally, particularly smaller than known collimators and appropriately scaled to achieve a highly sensitive collimator which facilitates desired reconstruction resolutions for small animals, as well as compliments other functional imaging modalities such as positron emission tomography (PET), functional magnetic resonance imaging (fMRI), electroencephalography (EEG), and event-related potential (ERP), magneto-encephalography (MEG), and near-infrared optical imaging.Type: ApplicationFiled: August 4, 2005Publication date: February 8, 2007Inventors: Timothy Olden, Dale Martin, Thomas John Sefranek, Gordon LaPoint, Hugh Stoddart, Hugh Stoddart
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Publication number: 20060163670Abstract: A semiconducting structure and a method of forming thereof, includes a substrate having a p-type device region and an n-type device region; a first-type suicide contact to the n-type device region; the first-type suicide having a work function that is substantially aligned to the n-type device region conduction band; and a second-type silicide contact to the p-type device region; the second-type silicide having a work function that is substantially aligned to the p-type device region valence band. The present invention also provides a semiconducting structure and a method of forming therefore, in which the silicide contact material and silicide contact processing conditions are selected to provide strain based device improvements in pFET and nFET devices.Type: ApplicationFiled: January 27, 2005Publication date: July 27, 2006Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: John Ellis-Monaghan, Dale Martin, William Murphy, James Nakos, Kirk Peterson
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Patent number: 7032418Abstract: A vertical door locking system includes a door lock with a deadbolt that moves horizontally, a striker with an upward facing strike opening that vertically receives the deadbolt and a lock controller. The striker includes an electrically operated catch to engage and release the deadbolt. The door lock and striker are mounted opposite each other, one to the vertical door and the other to an adjacent fixed mounting point. The lock controller electrically operates the striker to release the deadbolt and allow it to move vertically out of engagement with the striker for primary access to a secure area and the door lock allows the deadbolt to be retracted horizontally away from the striker for secondary access. A remotely located control system optionally controls the lock controllers of multiple doors and a central office control system is optionally connected to multiple remotely located control systems.Type: GrantFiled: April 21, 2004Date of Patent: April 25, 2006Assignees: Sargent Manufacturing Company, Single Access Lock, Inc., Securitron Magnalock CorporationInventors: Dale Martin, Ronald S. Slusarski, Gurdev Bains, John Hayde, Shilin Yang, Herb Guck, Thomas E. Roth, Dennis E. Wojdan, Robert C. Hunt, Larry G. Corwin, Joshua M. Huff
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Publication number: 20060073688Abstract: A structure and fabrication method for a gate stack used to define source/drain regions in a semiconductor substrate. The method comprises (a) forming a gate dielectric layer on top of the substrate, (b) forming a gate polysilicon layer on top of the gate dielectric layer, (c) implanting n-type dopants in a top layer of the gate polysilicon layer, (d) etching away portions of the gate polysilicon layer and the gate dielectric layer so as to form a gate stack on the substrate, and (e) thermally oxidizing side walls of the gate stack with the presence of a nitrogen-carrying gas. As a result, a diffusion barrier layer is formed at the same depth in the polysilicon material of the gate stack regardless of the doping concentration. Therefore, the n-type doped region of the gate stack has the same width as that of the undoped region of the gate stack.Type: ApplicationFiled: October 1, 2004Publication date: April 6, 2006Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Dale Martin, Steven Shank, Michael Triplett, Deborah Tucker
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Publication number: 20060073689Abstract: A method of fabricating polysilicon lines and polysilicon gates, the method of including: providing a substrate; forming a dielectric layer on a top surface of the substrate; forming a polysilicon layer on a top surface of the dielectric layer; implanting the polysilicon layer with N-dopant species, the N-dopant species about contained within the polysilicon layer; implanting the polysilicon layer with a nitrogen containing species, the nitrogen containing species essentially contained within the polysilicon layer.Type: ApplicationFiled: October 4, 2004Publication date: April 6, 2006Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: James Adkisson, John Ellis-Monaghan, Glenn MacDougall, Dale Martin, Kirk Peterson, Bruce Porth
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Publication number: 20060027889Abstract: The present invention provides a method of forming an ultra-thin and uniform layer of Si including the steps of providing a substrate having semiconducting regions separated by insulating regions; implanting dopants into the substrate to provide an etch differential doped portion in the semiconducting regions underlying an upper Si-containing surface of the semiconducting regions; forming a trench in the substrate including the semiconducting regions and the insulating regions; removing the etch differential doped portion from the semiconductor regions to produce a cavity underlying the upper surface of the semiconducting regions; and filling the trench with a trench dielectric, wherein the trench dielectric material encloses the cavity underlying the upper Si-containing surface of the semiconducting regions. The upper Si-containing surface of the semiconducting regions has a uniform thickness of less than about 100 ?.Type: ApplicationFiled: August 5, 2004Publication date: February 9, 2006Applicant: International Business Machines CorporationInventors: Matthew Breitwisch, Chung Lam, Randy Mann, Dale Martin
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Publication number: 20050235711Abstract: A vertical door locking system includes a door lock with a deadbolt that moves horizontally, a striker with an upward facing strike opening that vertically receives the deadbolt and a lock controller. The striker includes an electrically operated catch to engage and release the deadbolt. The door lock and striker are mounted opposite each other, one to the vertical door and the other to an adjacent fixed mounting point. The lock controller electrically operates the striker to release the deadbolt and allow it to move vertically out of engagement with the striker for primary access to a secure area and the door lock allows the deadbolt to be retracted horizontally away from the striker for secondary access. A remotely located control system optionally controls the lock controllers of multiple doors and a central office control system is optionally connected to multiple remotely located control systems.Type: ApplicationFiled: April 21, 2004Publication date: October 27, 2005Inventors: Dale Martin, Ronald Slusarski, Gurdev Bains, John Hayde, Shilin Yang, Herb Guck, Thomas Roth, Dennis Wojdan, Robert Hunt, Larry Corwin, Joshua Huff
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Publication number: 20050128293Abstract: Described are a method and system for providing information into a video record from an object in a monitored area. A video image of the monitored area is generated and information is received in a signal transmitted from the object. An image is displayed which shows the information superimposed on the video image. Optionally, the displayed image shows the information at a location in a display that corresponds to a location of the object in the display. The displayed image can include an automatic scrolling of the information overlaid on the video image or an automatic or manual scrolling of the information in a region adjacent to a region showing the video image.Type: ApplicationFiled: November 24, 2004Publication date: June 16, 2005Applicant: Clifton Labs, Inc.Inventors: Philip Wilsey, Fred Beyette, Darryl Dieckman, Dale Martin