Abstract: A method is provided for developing, financing and administering an asset-protected executive benefit. An employer or Investor makes an investment in an LLC whereby the employer or Investor becomes the preferred, non-managing member and is entitled to receive a guaranteed payment plus pre-established rate of return. An Executive also makes an investment in the same LLC, becomes a non-preferred, managing member and is entitled to receive value created by the LLC in excess of the amount paid to the preferred member. The LLC invests in, owns, and is the beneficiary of two life insurance policies; a Preferred Policy designed to have a death benefit equal to the investment plus cumulative guaranteed return to the preferred member, and an Investment Policy designed to meet the long-term investment objectives of the members. The Executive may instruct the LLC to borrow against the Investment Policy from which the Executive receives a cash distribution.

Abstract: A self-service terminal includes a fascia having a document slot, and a document processing module. The document processing module includes a document path selector mechanism disposed along a bi-directional document transport path which extends between the document slot and a document processing zone. The document path selector mechanism enables a document to be transported along the document transport path between the document slot and the document processing zone when parts of the document path selector mechanism are in a first position. The document path selector mechanism enables a document to be transported along a divert path extending from the document processing zone to a location other than the document slot when parts of the document path selector mechanism are in a second position.

Abstract: Techniques for achieving the effects of significantly reducing the amount of computer memory needed to simulate the behavior of a multi-stage pipelined processor, as well as, significantly increasing the performance of the simulation process by eliminating the storing and copying of redundant information are described. These beneficial effects are achieved by reordering the chronological sequence of execution of software models of the various pipeline stages with respect to the actual instruction-flow sequence implemented by the processor hardware. This approach takes advantage of the independence of the stages within a cycle to make the results computed by a previous stage directly available to its subsequent stage without the use of transient data space or data copying. In particular, it is shown how to apply this technique to the simulation of a multi-parallel-stage VLIW array processor, such as the manifold array (ManArray) processor.

Abstract: A self-service terminal includes a fascia having a document slot, and a document processing module. The document processing module includes a document path selector mechanism disposed along a bi-directional document transport path which extends between the document slot and a document processing zone. The document path selector mechanism enables a document to be transported along the document transport path between the document slot and the document processing zone when parts of the document path selector mechanism are in a first position. The document path selector mechanism enables a document to be transported along a divert path extending from the document processing zone to a location other than the document slot when parts of the document path selector mechanism are in a second position.

Abstract: Details of a highly cost effective and efficient implementation of a manifold array (ManArray) architecture and instruction syntax for use therewith are described herein. Various aspects of this approach include the regularity of the syntax, the relative ease with which the instruction set can be represented in database form, the ready ability with which tools can be created, the ready generation of self-checking codes and parameterized testcases. Parameterizations can be fairly easily mapped and system maintenance is significantly simplified.

Abstract: Techniques for adding more complex instructions and their attendant multi-cycle execution units with a single instruction multiple data stream (SIMD) very long instruction word (VLIW) processing framework are described. In one aspect, an initiation mechanism also acts as a resynchronization mechanism to read the results of multi-cycle execution. This multi-purpose mechanism operates with a short instruction word (SIW) issue of the multi-cycle instruction, in a sequence processor (SP) alone, with a VLIW, and across all processing elements (PEs) individually or as an array of PEs. A number of advantageous floating point instructions are also described.