Patents by Inventor Dan Chilcott

Dan Chilcott has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11161737
    Abstract: A method of processing a double sided wafer of a microelectromechanical device includes spinning a resist onto a first side of a first wafer. The method further includes forming pathways within the resist to expose portions of the first side of the first wafer. The method also includes etching one or more depressions in the first side of the first wafer through the pathways, where each of the depressions have a planar surface and edges. Furthermore, the method includes depositing one or more adhesion metals over the resist such that the one or more adhesion metals are deposited within the depressions, and then removing the resist from the first wafer. The method finally includes depositing indium onto the adhesion metals deposited within the depressions and bonding a second wafer to the first wafer by compressing the indium between the second wafer and the first wafer.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: November 2, 2021
    Assignee: ELBIT SYSTEMS OF AMERICA, LLC
    Inventors: Arlynn W. Smith, Dan Chilcott
  • Patent number: 10943758
    Abstract: A light intensifier includes a semiconductor structure to multiply electrons and block stray particles. A thin gain substrate layer includes an electron multiplier region that is doped to generate a plurality of electrons for each electron that impinges on an input surface of the gain substrate layer and blocking structures that are doped to direct the plurality of electrons towards emission areas of an emission surface of the gain substrate layer. Respective ribs of a first plurality of ribs on the input surface of the gain substrate layer are vertically aligned with respective blocking structures, and respective blocking structures are vertically aligned with respective ribs of a second plurality of ribs at the emission surface. This alignment directs electrons along a path through the gain substrate layer to reduce noise. The support ribs provide mechanical strength to the gain substrate layer, improving robustness of the light intensifier while minimizing noise.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: March 9, 2021
    Assignee: ELBIT SYSTEMS OF AMERICA, LLC
    Inventors: Arlynn W. Smith, Dan Chilcott
  • Patent number: 10923244
    Abstract: A phosphor screen for a Micro-Electro-Mechanical-Systems (MEMS) image intensifier includes a wafer structure, a lattice of interior walls, a thin film phosphor layer, and a reflective metal layer. The wafer structure has a naturally opaque top layer and an active area defined within the naturally opaque top layer. The lattice of interior walls is formed, within the active area, from the naturally opaque top layer. The thin film phosphor layer is disposed in the active area, between the lattice of interior walls. The reflective metal layer that is disposed atop the thin film phosphor layer. In at least some instances, the thin film phosphor layer is a non-particle phosphor layer.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: February 16, 2021
    Assignee: Elbit Systems of America, LLC
    Inventors: Arlynn W. Smith, Dan CHiLCOTT
  • Publication number: 20200402757
    Abstract: A light intensifier includes a semiconductor structure to multiply electrons and block stray particles. A thin gain substrate layer includes an electron multiplier region that is doped to generate a plurality of electrons for each electron that impinges on an input surface of the gain substrate layer and blocking structures that are doped to direct the plurality of electrons towards emission areas of an emission surface of the gain substrate layer. Respective ribs of a first plurality of ribs on the input surface of the gain substrate layer are vertically aligned with respective blocking structures, and respective blocking structures are vertically aligned with respective ribs of a second plurality of ribs at the emission surface. This alignment directs electrons along a path through the gain substrate layer to reduce noise. The support ribs provide mechanical strength to the gain substrate layer, improving robustness of the light intensifier while minimizing noise.
    Type: Application
    Filed: June 21, 2019
    Publication date: December 24, 2020
    Inventors: Arlynn W. SMITH, Dan CHILCOTT
  • Patent number: 10734184
    Abstract: A method of manufacturing a multi-layer image intensifier wafer includes fabricating first and second glass wafers, each having an array of cavities that extend between respective openings in first and second surfaces of the respective glass wafer; doping a semiconductor wafer to generate a plurality of electrons for each electron that impinges a first surface of the semiconductor wafer and to direct the plurality of electrons to a second surface of the semiconductor wafer, bonding a photo-cathode wafer to the first glass wafer; bonding the semiconductor wafer between the first and second glass wafers, and bonding the second glass wafer between the semiconductor wafer and an anode wafer (e.g., a phosphor screen or other electron detector). A section of the multi-layer image intensifier wafer may be sliced and evacuated to provide a multi-layer image intensifier.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: August 4, 2020
    Assignee: Elbit Systems of America, LLC
    Inventors: Arlynn W. Smith, Dan Chilcott
  • Publication number: 20200156932
    Abstract: A method of processing a double sided wafer of a microelectromechanical device includes spinning a resist onto a first side of a first wafer. The method further includes forming pathways within the resist to expose portions of the first side of the first wafer. The method also includes etching one or more depressions in the first side of the first wafer through the pathways, where each of the depressions have a planar surface and edges. Furthermore, the method includes depositing one or more adhesion metals over the resist such that the one or more adhesion metals are deposited within the depressions, and then removing the resist from the first wafer. The method finally includes depositing indium onto the adhesion metals deposited within the depressions and bonding a second wafer to the first wafer by compressing the indium between the second wafer and the first wafer.
    Type: Application
    Filed: January 27, 2020
    Publication date: May 21, 2020
    Applicant: ELBIT SYSTEMS OF AMERICA, LLC
    Inventors: Arlynn W. SMITH, Dan CHILCOTT
  • Patent number: 10584027
    Abstract: A method of processing a double sided wafer of a microelectromechanical device includes spinning a resist onto a first side of a first wafer. The method further includes forming pathways within the resist to expose portions of the first side of the first wafer. The method also includes etching one or more depressions in the first side of the first wafer through the pathways, where each of the depressions have a planar surface and edges. Furthermore, the method includes depositing one or more adhesion metals over the resist such that the one or more adhesion metals are deposited within the depressions, and then removing the resist from the first wafer. The method finally includes depositing indium onto the adhesion metals deposited within the depressions and bonding a second wafer to the first wafer by compressing the indium between the second wafer and the first wafer.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: March 10, 2020
    Assignee: ELBIT SYSTEMS OF AMERICA, LLC
    Inventors: Arlynn W. Smith, Dan Chilcott
  • Patent number: 10332732
    Abstract: A light intensifier includes a semiconductor structure to multiply electrons and block stray particles (e.g., photons and/or ions). The semiconductor structure includes an electron multiplier region that is doped to generate a plurality of electrons for each electron that impinges a reception surface of the semiconductor structure, blocking regions that are doped to direct the plurality of electrons towards emissions areas of an emission surface of the semiconductor structure, and shielding regions that are doped to absorb stray particles that impinge the emission surface of the semiconductor structure.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: June 25, 2019
    Assignee: Eagle Technology, LLC
    Inventors: Arlynn W. Smith, Dan Chilcott
  • Publication number: 20190169023
    Abstract: A method of processing a double sided wafer of a microelectromechanical device includes spinning a resist onto a first side of a first wafer. The method further includes forming pathways within the resist to expose portions of the first side of the first wafer. The method also includes etching one or more depressions in the first side of the first wafer through the pathways, where each of the depressions have a planar surface and edges. Furthermore, the method includes depositing one or more adhesion metals over the resist such that the one or more adhesion metals are deposited within the depressions, and then removing the resist from the first wafer. The method finally includes depositing indium onto the adhesion metals deposited within the depressions and bonding a second wafer to the first wafer by compressing the indium between the second wafer and the first wafer.
    Type: Application
    Filed: December 1, 2017
    Publication date: June 6, 2019
    Inventors: Arlynn W. SMITH, Dan CHILCOTT
  • Publication number: 20190164659
    Abstract: A phosphor screen for a Micro-Electro-Mechanical-Systems (MEMS) image intensifier includes a wafer structure, a lattice of interior walls, a thin film phosphor layer, and a reflective metal layer. The wafer structure has a naturally opaque top layer and an active area defined within the naturally opaque top layer. The lattice of interior walls is formed, within the active area, from the naturally opaque top layer. The thin film phosphor layer is disposed in the active area, between the lattice of interior walls. The reflective metal layer that is disposed atop the thin film phosphor layer. In at least some instances, the thin film phosphor layer is a non-particle phosphor layer.
    Type: Application
    Filed: November 30, 2017
    Publication date: May 30, 2019
    Inventors: Arlynn W. SMITH, Dan CHILCOTT
  • Patent number: 10163599
    Abstract: An electron multiplier for a Micro-Electro-Mechanical-Systems (MEMS) image intensifier includes an input surface, an emission surface, a plurality of doped ribs, and a plurality of textured surfaces. The input surface receives electrons and the emission surface is opposite the input surface. The plurality of doped ribs extends at least partially between the input surface and the emission surface to form a plurality of pixels. The plurality of textured surfaces are disposed in the plurality of pixels.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: December 25, 2018
    Assignee: Eagle Technology, LLC
    Inventors: Arlynn W. Smith, Dan Chilcott
  • Patent number: 9969611
    Abstract: An improved microelectromechanical device includes an upper plate, a lower plate, and a spacing structure. The upper plate includes a first surface and an opposite second surface. The lower plate is spaced from the upper plate. The lower plate includes a third surface that faces the first surface of the upper plate and a fourth surface that is opposite of the third surface. The lower plate also includes a series of structures disposed with the third surface of the lower plate. The spacing structure is coupled to the upper and lower plate. The spacing structure includes a base portion that is sealed to the first surface of the upper plate and the third surface of the lower plate. The spacing structure further includes a protrusion that extends from the base portion between the upper and lower plates.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: May 15, 2018
    Assignee: Eagle Technology, LLC
    Inventors: Arlynn W. Smith, Dan Chilcott
  • Publication number: 20070251592
    Abstract: A microfluidic valve structure is provided. The valve structure includes a valve body having a fluid flow passage formed therein for allowing fluid to flow therethrough. A valve boss is configured to move relative to a valve seat to open and close the fluid flow passage. A plurality of flexible support arms extend between a wall of the valve body and the valve boss for supporting the valve boss relative to the valve body such that the valve boss engages and disengages the valve seat to close and open the passage.
    Type: Application
    Filed: May 1, 2006
    Publication date: November 1, 2007
    Inventors: John Christenson, Dan Chilcott
  • Publication number: 20070072428
    Abstract: A technique for manufacturing a micro-electro-mechanical (MEM) structure includes a number of steps. Initially, a substrate is provided. Next, a plurality of trenches are etched into the substrate with a first etch. Then, a charging layer is formed at a bottom of each of the trenches to form undercut trenches. Finally, a second etch is provided into the undercut trenches. The charging layer causes the second etch to laterally etch foots in the substrate between the undercut trenches. The footers undercut the substrate to release a portion of the substrate for providing a movable structure between the undercut trenches and above the footers.
    Type: Application
    Filed: September 29, 2005
    Publication date: March 29, 2007
    Inventor: Dan Chilcott
  • Publication number: 20070072331
    Abstract: A technique for manufacturing a micro-electro-mechanical (MEM) device includes a number of steps. Initially, a first wafer is provided. Next, a bonding layer is formed on a first surface of the first wafer. Then, a portion of the bonding layer is removed to provide a cavity including a plurality of spaced support pedestals within the cavity. Next, a second wafer is bonded to at least a portion of the bonding layer. A portion of the second wafer provides a diaphragm over the cavity and the support pedestals support the diaphragm during processing. The second wafer is then etched to release the diaphragm from the support pedestals.
    Type: Application
    Filed: September 29, 2005
    Publication date: March 29, 2007
    Inventor: Dan Chilcott
  • Publication number: 20060281214
    Abstract: A process for making a microelectromechanical device having a moveable component defined by a gap pattern in a semiconductor layer of a silicon-on-insulator wafer involves the use of a plurality of deep reactive ion etching steps at various etch depths that are used to allow a buried oxide layer of the silicon-on-insulator wafer to be exposed in selected areas before the entire moveable component of the resulting device is freed for movement. This method allows wet release techniques to be used to remove the buried oxide layer without developing stiction problems. This is achieved by utilizing deep reactive ion etching to free the moveable component after a selected portion of the buried oxide layer has been removed by wet etching.
    Type: Application
    Filed: June 13, 2005
    Publication date: December 14, 2006
    Inventor: Dan Chilcott
  • Publication number: 20060240583
    Abstract: A technique for manufacturing silicon structures includes etching a cavity into a first side of an epitaxial wafer. A thickness of an epitaxial layer is selected, based on a desired depth of the etched cavity and a desired membrane thickness. The first side of the epitaxial wafer is then bonded to a first side of a handle wafer. After thinning the epitaxial wafer until only the epitaxial layer remains, desired circuitry is formed on a second side of the remaining epitaxial layer, which is opposite the first side of the epitaxial wafer.
    Type: Application
    Filed: April 25, 2005
    Publication date: October 26, 2006
    Inventors: William Baney, Dan Chilcott
  • Publication number: 20060234413
    Abstract: A technique for forming anti-stiction bumps on a bottom surface of a micro-electro mechanical (MEM) structure includes a number of process steps. The MEM structure is fabricated from an assembly that includes a support substrate bonded to a single-crystal semiconductor layer, via an insulator layer. A plurality of holes are formed through the single-crystal semiconductor layer to the insulator layer on an interior portion of a defined movable structure. A portion of the insulator layer underneath the holes is removed. The holes are then filled with a conformal film that extends below a lower surface of the defined movable structure to provide a plurality of anti-stiction bumps. A trench is then formed through the single-crystal semiconductor layer to the insulator layer to form the defined movable structure. Finally, a remainder of the insulator layer underneath the defined movable structure is removed to free the defined movable structure.
    Type: Application
    Filed: April 13, 2005
    Publication date: October 19, 2006
    Inventor: Dan Chilcott
  • Publication number: 20060231521
    Abstract: A technique for manufacturing a micro-electro mechanical structure includes a number of steps. Initially, a cavity is formed into a first side of a handling wafer, with a sidewall of the cavity forming a first angle greater than about 54.7 degrees with respect to a first side of the handling wafer at an opening of the cavity. Then, a bulk etch is performed on the first side of the handling wafer to modify the sidewall of the cavity to a second angle greater than about 90 degrees, with respect to the first side of the handling wafer at the opening of the cavity. Next, a second side of a second wafer is bonded to the first side of the handling wafer.
    Type: Application
    Filed: April 15, 2005
    Publication date: October 19, 2006
    Inventor: Dan Chilcott
  • Publication number: 20060211161
    Abstract: A linear accelerometer is provided having a support substrate, fixed electrodes having fixed capacitive plates, and a movable inertial mass having movable capacitive plates capacitively coupled to the fixed capacitive plates. Adjacent capacitive plates vary in height. The accelerometer further includes support tethers for supporting the inertial mass and allowing movement of the inertial mass upon experiencing a linear acceleration along a sensing axis. The accelerometer has inputs and an output for providing an output signal which varies as a function of the capacitive coupling and is indicative of both magnitude and direction of vertical acceleration along the sensing Z-axis. A microsensor fabrication process is also provided which employs a top side mask and etch module.
    Type: Application
    Filed: March 16, 2005
    Publication date: September 21, 2006
    Inventors: John Christenson, Seyed Zarabadi, Dan Chilcott