Abstract: Provided are ion channel antagonists/blockers and uses thereof. Specifically, it provides the compounds of formula (I) or pharmaceutically acceptable salts, stereoisomers, solvates or prodrugs, preparation method therefor and application thereof. Definition of each group in the formula can be found in the specification for details. Provided is also pharmaceutical composition useful for treatment of heart disease and other ion channel related diseases.

Abstract: Disclosed are a high-speed motor system with air bearing support and a control method thereof. The system includes: a rotating shaft, air bearings, a motor stator, a motor rotor, and radial displacement sensors. The radial displacement sensors are arranged in two groups, located outside the rotating shaft at both sides of the motor rotor; the radial displacement sensors are used to detect displacement of the rotating shaft in x-axis and y-axis directions. The motor stator is provided with stator slots having armature windings inside. The armature windings are electrically connected to a controller. The armature windings are averagely divided into p winding units according to the number of pole pairs p thereof. The controller includes p controller units that control the winding units respectively. The controller unit inputs a damping current component to the corresponding winding unit, for generating an electromagnetic damping force.

Abstract: Embodiments of the present disclosure relate to methods, apparatuses and computer readable storage media for SRS data transmission. In example embodiments, a method is provided. According to the method, an apparatus forwards, during a first period, first SRS data received from a terminal device to a further apparatus. The further apparatus determines, based on the first SRS data, compression information for compressing SRS data, and transmits the compression information to the apparatus. Thereby, the apparatus compresses, during a second period, second SRS data received from the terminal device based on the compression information, and transmits, during the second period, the compressed second SRS data to the further apparatus. In this way, the SRS data can be effectively compressed, thus reducing the latency of the SRS data transmission.

Abstract: The disclosure provides methods of synthesizing very long chain fatty acids, including deuterated very long chain fatty acids. The fatty acids can by polyunsaturated fatty acids. The methods include the step of reacting a protected leaving group (L)-substituted saturated aliphatic group with a halo-substituted unsaturated aliphatic group to form a protected aliphatic group. The protected aliphatic group is deprotected to form an alcohol. The alcohol is then oxidized, thereby forming a very long chain fatty acid.

Abstract: Provided are ion channel antagonists/blockers and uses thereof. Specifically, it provides the compounds of formula (I) or pharmaceutically acceptable salts, stereoisomers, solvates or prodrugs, preparation method therefor and application thereof. Definition of each group in the formula can be found in the specification for details. Provided is also pharmaceutical composition useful for treatment of heart disease and other ion channel related diseases.

Abstract: Disclosed herein are compounds having a structure according to Formula I and optionally Formula IV. The compounds may be radiolabeled compounds useful for diagnosis and/or imaging fungal infections. In such embodiments, at least one substituent is a radionuclide, such as 18F. Also disclosed are precursor compounds according to Formula I and/or IV that are useful for making the radiolabeled compounds. In such embodiments, the precursor compound comprises at least one leaving group suitable for introducing a radionuclide, such as 18F, at a desired position. Also disclosed are methods for making and using the compounds, including embodiments of a method for imaging and/or diagnosing a fungal infection in a subject.

Abstract: A quantitative shear wave elasticity imaging method and system relates to the technical field of medical ultrasound imaging. The provided ultrasound quantitative elasticity imaging method and system are based on a sliding window linear fitting strain and use a two-dimensional linear fitting shear wave velocity detection algorithm, and thus, the anti-noise capability is stronger, and the result is more reliable. Moreover, where the load of an ultrasonic front-end storage and transmission module is not additionally in-creased, global ultrasonic quantitative elasticity imaging is realized, thereby significantly reducing the design difficulty of the ultrasound quantitative elasticity imaging system and the device cost.

Abstract: Digital delay locked loop circuits, devices systems, and associated methods are provided and described. Such devices, systems, and methods utilize an open loop measurement for establishing a coarse delay lock.

Abstract: An electronic device including: a delay circuit configured to adjust a delay of an input for generating an output signal; and an input selection circuit coupled to the delay circuit, the input selection circuit configured to control a phase for a clock input based at least in part on a measurement of a delay corresponding to the delay circuit in generating the input.

Abstract: A method to schedule intelligent traffic lights in real time based on digital infochemicals (DIs) is disclosed. The method takes advantage of DIs as medium to both predicate traffic flow and smooth the green/Cycle (g/C) ratio. First collect DIs, then update DIs by three actions including aggregation, evaporation, and propagation. After that, adjust the g/C ratio of the traffic light. DIs have the function of prediction due to the propagation that allows DIs reach the traffic earlier than the real traffic flow. On the other hand, DIs have the function of memory due to the evaporation that remembers the information of the historical traffic flow. The prediction and memory of DIs, as the reason why DIs are superior to the pure traffic flow, give the DI-based intelligent traffic light compelling advantages over the pure traffic based intelligent traffic light.

Abstract: A method to schedule intelligent traffic lights in real time based on digital infochemicals (DIs) is disclosed. The method takes advantage of DIs as medium to both predicate traffic flow and smooth the green/Cycle (g/C) ratio. First collect DIs, then update DIs by three actions including aggregation, evaporation, and propagation. After that, adjust the g/C ratio of the traffic light. DIs have the function of prediction due to the propagation that allows DIs reach the traffic earlier than the real traffic flow. On the other hand, DIs have the function of memory due to the evaporation that remembers the information of the historical traffic flow. The prediction and memory of DIs, as the reason why DIs are superior to the pure traffic flow, give the DI-based intelligent traffic light compelling advantages over the pure traffic based intelligent traffic light.

Abstract: Methods, systems, and devices for jitter cancellation with automatic performance adjustment are described. Within a clock distribution system in an electronic device (e.g., a memory device), a jitter cancellation system may be configured to introduce delay between an input clock signal and output clock signal that is directly proportional to the supply voltage for the clock distribution system. In response to supply noise, the delay introduced by the jitter cancellation system may vary directly with respect to the supply voltage fluctuations and thus may offset fluctuations in the delay introduced by other components of the clock distribution system, which may vary inversely with respect to the supply voltage fluctuations. A control component within the jitter cancellation system may execute an algorithm to adjust or regulate the delay introduced by the jitter cancellation system, including its responsiveness to fluctuations in the supply voltage.

Abstract: An electronic device including: a delay circuit configured to adjust a delay of an input for generating an output signal; and an input selection circuit coupled to the delay circuit, the input selection circuit configured to control a phase for a clock input based at least in part on a measurement of a delay corresponding to the delay circuit in generating the input.

Abstract: An electronic device including: a variable delay circuit configured to adjust a delay of a variable delay input for generating an output signal; a decision circuit coupled to the variable delay, the decision circuit configured to: generate a start signal for the variable delay circuit to begin measuring a coarse delay, generate a stop signal for the variable delay circuit to stop measuring the coarse delay, and generate an inversion-decision signal based at least in part on measuring the coarse delay; and an input selection circuit coupled to the variable delay circuit and the decision circuit, the input selection circuit configured to control a phase for a clock input based on the inversion-decision signal in generating the variable delay input.

Abstract: Methods, systems, and devices for jitter cancellation with automatic performance adjustment are described. Within a clock distribution system in an electronic device (e.g., a memory device), a jitter cancellation system may be configured to introduce delay between an input clock signal and output clock signal that is directly proportional to the supply voltage for the clock distribution system. In response to supply noise, the delay introduced by the jitter cancellation system may vary directly with respect to the supply voltage fluctuations and thus may offset fluctuations in the delay introduced by other components of the clock distribution system, which may vary inversely with respect to the supply voltage fluctuations. A control component within the jitter cancellation system may execute an algorithm to adjust or regulate the delay introduced by the jitter cancellation system, including its responsiveness to fluctuations in the supply voltage.

Abstract: An electronic device including: a variable delay circuit configured to adjust a delay of a variable delay input for generating an output signal; a decision circuit coupled to the variable delay, the decision circuit configured to: generate a start signal for the variable delay circuit to begin measuring a coarse delay, generate a stop signal for the variable delay circuit to stop measuring the coarse delay, and generate an inversion-decision signal based at least in part on measuring the coarse delay; and an input selection circuit coupled to the variable delay circuit and the decision circuit, the input selection circuit configured to control a phase for a clock input based on the inversion-decision signal in generating the variable delay input.

Abstract: Digital delay locked loop circuits, devices systems, and associated methods are provided and described. Such devices, systems, and methods utilize an open loop measurement for establishing a coarse delay lock.

Abstract: Methods, systems, and devices for jitter cancellation with automatic performance adjustment are described. Within a clock distribution system in an electronic device (e.g., a memory device), a jitter cancellation system may be configured to introduce delay between an input clock signal and output clock signal that is directly proportional to the supply voltage for the clock distribution system. In response to supply noise, the delay introduced by the jitter cancellation system may vary directly with respect to the supply voltage fluctuations and thus may offset fluctuations in the delay introduced by other components of the clock distribution system, which may vary inversely with respect to the supply voltage fluctuations. A control component within the jitter cancellation system may execute an algorithm to adjust or regulate the delay introduced by the jitter cancellation system, including its responsiveness to fluctuations in the supply voltage.

Abstract: An electronic device including: a variable delay circuit configured to adjust a delay of a variable delay input for generating an output signal; a decision circuit coupled to the variable delay, the decision circuit configured to: generate a start signal for the variable delay circuit to begin measuring a coarse delay, generate a stop signal for the variable delay circuit to stop measuring the coarse delay, and generate an inversion-decision signal based at least in part on measuring the coarse delay; and an input selection circuit coupled to the variable delay circuit and the decision circuit, the input selection circuit configured to control a phase for a clock input based on the inversion-decision signal in generating the variable delay input.