Abstract: Embodiments of the invention are directed to a magnetic tunnel junction (MTJ) storage element that includes a reference layer, a tunnel barrier and a free layer on an opposite side of the tunnel barrier layer from the reference layer. The reference layer has a fixed magnetization direction. The free layer includes a first region, a second region and a third region. The third region is formed from a third material that is configured to magnetically couple the first region and the second region. The first region is formed from a first material having a first predetermined magnetic moment, and the second region is formed from a second material having a second predetermined magnetic moment. The first predetermined magnetic moment is lower that the second predetermined magnetic moment.

Abstract: Embodiments are directed to STT MRAM devices. One embodiment of an STT MRAM device includes a reference layer, a tunnel barrier layer, a free layer and one or more conductive vias. The reference layer is configured to have a fixed magnetic moment. In addition, the tunnel barrier layer is configured to enable electrons to tunnel between the reference layer and the free layer through the tunnel barrier layer. The free layer is disposed beneath the tunnel barrier layer and is configured to have an adaptable magnetic moment for the storage of data. The conductive via is disposed beneath the free layer and is connected to an electrode. Further, the conductive via has a width that is smaller than a width of the free layer such that a width of an active STT area for the storage of data in the free layer is defined by the width of the conductive via.

Abstract: A method for forming metal on a dielectric includes forming a seed layer on a surface including a reactant element. A first metal layer is formed on the seed layer wherein the first metal layer wets the seed layer. A second metal layer is formed on the first metal layer wherein the second metal layer wets the first metal layer. Diffuse the reactant element of the seed layer into the first metal layer by annealing to convert the first metal layer to a dielectric layer.

Abstract: A mechanism is provided for a thermally assisted magnetoresistive random access memory device (TAS-MRAM). A storage layer has an anisotropic axis, in which the storage layer is configured to store a state in off axis positions and on axis positions. The off axis positions are not aligned with the anisotropic axis. A tunnel barrier is disposed on top of the storage layer. A ferromagnetic sense layer is disposed on top of the tunnel barrier.

Abstract: Improved spin hall MRAM designs are provided that enable writing of all of the bits along a given word line together using a separate spin hall wire for each MTJ. In one aspect, a magnetic memory cell includes: a spin hall wire exclusive to the magnetic memory cell; an MTJ disposed on the spin hall wire, wherein the MTJ includes a fixed magnetic layer separated from a free magnetic layer by a tunnel barrier; and a pair of selection transistors connected to opposite ends of the spin hall wire. An MRAM device and method for operation thereof are also provided.

Abstract: Improved spin hall MRAM designs are provided that enable writing of all of the bits along a given word line together using a separate spin hall wire for each MTJ. In one aspect, a magnetic memory cell includes: a spin hall wire exclusive to the magnetic memory cell; an MTJ disposed on the spin hall wire, wherein the MTJ includes a fixed magnetic layer separated from a free magnetic layer by a tunnel barrier; and a pair of selection transistors connected to opposite ends of the spin hall wire. An MRAM device and method for operation thereof are also provided.

Abstract: Embodiments are directed to a sensor having a first electrode, a second electrode and a detector region electrically coupled between the first electrode region and the second electrode region. The detector region includes a first layer having a topological insulator. The topological insulator includes a conducting path along a surface of the topological insulator, and the detector region further includes a second layer having a first insulating magnetic coupler, wherein a magnetic field applied to the detector region changes a resistance of the conducting path.

Abstract: Techniques for improving the security of nonvolatile memory such as magnetic random access memory (MRAM) are provided. In one aspect, a method of operating a nonvolatile memory chip is provided. The method includes: overwriting data stored on the nonvolatile memory chip automatically upon the nonvolatile memory chip being powered on. For example, all bits in the nonvolatile memory chip can be written to either i) a predetermined data state (e.g., a logic 1 or a logic 0) or ii) a random data state. A system is also provided that includes: a nonvolatile memory chip; and a writing circuit configured to overwrite data stored on the nonvolatile memory chip automatically upon the nonvolatile memory chip being powered on.

Abstract: A memory device, a memory system, and corresponding methods are provided. The memory device includes a non-volatile random access memory. The non-volatile memory includes a suspect bit register configured to store addresses of bits that are determined to have had errors. The non-volatile memory further includes a bad bit register configured to store addresses of bits that both (i) appeared in the suspect bit register due to a first error and (ii) are determined to have had a second error. Hence, the memory device overcomes the aforementioned intrinsic write-error-rate by identifying the bad bits so they can be fused out, thus avoiding errors during use of the non-volatile random access memory.

Abstract: A memory device, a memory system, and corresponding methods are provided. The memory device includes a non-volatile random access memory. The non-volatile memory includes a suspect bit register configured to store addresses of bits that are determined to have had errors. The non-volatile memory further includes a bad bit register configured to store addresses of bits that both (i) appeared in the suspect bit register due to a first error and (ii) are determined to have had a second error. Hence, the memory device overcomes the aforementioned intrinsic write-error-rate by identifying the bad bits so they can be fused out, thus avoiding errors during use of the non-volatile random access memory.

Abstract: Embodiments of the invention are directed to a magnetic tunnel junction (MTJ) storage element that includes a reference layer, a tunnel barrier and a free layer on an opposite side of the tunnel barrier layer from the reference layer. The reference layer has a fixed magnetization direction. The free layer includes a first region, a second region and a third region. The third region is formed from a third material that is configured to magnetically couple the first region and the second region. The first region is formed from a first material having a first predetermined magnetic moment, and the second region is formed from a second material having a second predetermined magnetic moment. The first predetermined magnetic moment is lower that the second predetermined magnetic moment.

Abstract: Embodiments of the invention are directed to a magnetic tunnel junction (MTJ) storage element that includes a reference layer, a tunnel barrier and a free layer on an opposite side of the tunnel barrier layer from the reference layer. The reference layer has a fixed magnetization direction. The free layer includes a first region, a second region and a third region. The third region is formed from a third material that is configured to magnetically couple the first region and the second region. The first region is formed from a first material having a first predetermined magnetic moment, and the second region is formed from a second material having a second predetermined magnetic moment. The first predetermined magnetic moment is lower that the second predetermined magnetic moment.

Abstract: Embodiments of the invention are directed to a magnetic tunnel junction (MTJ) storage element that includes a reference layer, a tunnel barrier and a free layer on an opposite side of the tunnel barrier layer from the reference layer. The reference layer has a fixed magnetization direction. The free layer includes a first region, a second region and a third region. The third region is formed from a third material that is configured to magnetically couple the first region and the second region. The first region is formed from a first material having a first predetermined magnetic moment, and the second region is formed from a second material having a second predetermined magnetic moment. The first predetermined magnetic moment is lower that the second predetermined magnetic moment.

Abstract: Embodiments of the invention are directed to a magnetic tunnel junction (MTJ) storage element that includes a reference layer, a tunnel barrier and a free layer on an opposite side of the tunnel barrier layer from the reference layer. The reference layer has a fixed magnetization direction. The free layer includes a first region, a second region and a third region. The third region is formed from a third material that is configured to magnetically couple the first region and the second region. The first region is formed from a first material having a first predetermined magnetic moment, and the second region is formed from a second material having a second predetermined magnetic moment. The first predetermined magnetic moment is lower that the second predetermined magnetic moment.

Abstract: Techniques for improving the security of nonvolatile memory such as magnetic random access memory (MRAM) are provided. In one aspect, a method of operating a nonvolatile memory chip is provided. The method includes: overwriting data stored on the nonvolatile memory chip automatically upon the nonvolatile memory chip being powered on. For example, all bits in the nonvolatile memory chip can be written to either i) a predetermined data state (e.g., a logic 1 or a logic 0) or ii) a random data state. A system is also provided that includes: a nonvolatile memory chip; and a writing circuit configured to overwrite data stored on the nonvolatile memory chip automatically upon the nonvolatile memory chip being powered on.

Abstract: Embodiments are directed to a sensor having a first electrode, a second electrode and a detector region electrically coupled between the first electrode region and the second electrode region. The detector region includes a first layer having a topological insulator. The topological insulator includes a conducting path along a surface of the topological insulator, and the detector region further includes a second layer having a first insulating magnetic coupler, wherein a magnetic field applied to the detector region changes a resistance of the conducting path.

Abstract: A spin-transfer torque magnetic tunnel junction includes a layer stack with a pinned magnetic layer and a free magnetic layer, and an insulating barrier layer there-between. Each of the magnetic layers has an out-of-plane magnetization orientation. The junction is configured so as to allow a spin-polarized current flow generated from one of the two magnetic layers to the other to initiate an asymmetrical switching of the magnetization orientation of the free layer. The switching is off-centered toward an edge of the stack. The junction may allow a spin-polarized current flow that is off-centered toward an edge of the stack, from one of the two magnetic layers to the other, to initiate the asymmetrical switching. Related devices and methods of operation are also provided.

Abstract: Techniques for writing magnetic random access memory (MRAM) using the spin hall effect with a self-reference read are provided. In one aspect, an MRAM device is provided. The MRAM device includes: a plurality of first spin hall wires oriented orthogonal to a plurality of second spin hall wires; a plurality of magnetic memory cells configured in an array between the first spin hall wires and the second spin hall wires; and a plurality of transistors connected to the magnetic memory cells by the first spin hall wires. Methods of operating an MRAM device are also provided.

Abstract: Embodiments of the invention are directed to a magnetic tunnel junction (MTJ) storage element having a reference layer formed from a reference layer material having a fixed magnetization direction, along with a free layer formed from a free layer material having a switchable magnetization direction. The MTJ is configured to receive a write pulse having a write-pulse and spin-transfer-torque (WP-STT) start time, a WP-STT start segment duration and a write pulse duration. The WP-STT start segment duration is less than the write pulse duration. The fixed magnetization direction is configured to form an angle between the fixed magnetization direction and the switchable magnetization direction. The angle is sufficient to generate spin torque electrons in the reference layer material at the WP-STT start time. The spin torque electrons generated in the reference layer material is sufficient to initiate switching of the switchable magnetization direction at the WP-STT start time.

Abstract: Embodiments of the invention are directed to a magnetic tunnel junction (MTJ) storage element having a reference layer formed from a reference layer material having a fixed magnetization direction, along with a free layer formed from a free layer material having a switchable magnetization direction. The MTJ is configured to receive a write pulse having a write-pulse and spin-transfer-torque (WP-STT) start time, a WP-STT start segment duration and a write pulse duration. The WP-STT start segment duration is less than the write pulse duration. The fixed magnetization direction is configured to form an angle between the fixed magnetization direction and the switchable magnetization direction. The angle is sufficient to generate spin torque electrons in the reference layer material at the WP-STT start time. The spin torque electrons generated in the reference layer material is sufficient to initiate switching of the switchable magnetization direction at the WP-STT start time.