Abstract: A NAND architecture non-volatile memory voltage sensing data read/verify process and sense amplifier has been described that senses data in floating gate or floating node field effect transistor memory cells using a voltage sensing data read/verify process. The voltage sensing process utilized a reference NAND string and reference memory cell that is coupled to a reference bit line. A voltage is precharged onto a bit line to be read and an associated reference bit line. The bit line is then coupled to a NAND string and selected memory cell while the reference bit line is coupled to a reference NAND string and selected reference memory cell. The relative voltage level of the bit line and reference bit line are then set by the relative currents flowing through the coupled NAND string and reference NAND string, and the voltage differential read by a coupled voltage sense amplifier.

Abstract: Systems, devices and methods are disclosed, such as a system and method of sensing the voltage on bit lines that, when respective memory cells coupled to the bit lines are being read that compensates for variations in the lengths of the bit lines between the memory cells being read and respective bit line sensing circuits. The system and method may determine the length of the bit lines between the memory cells and the sensing circuits based on a memory address, such as a block address. The system and method then uses the determined length to adjust either a precharge voltage applied to the bit lines or the duration during which the bit lines are discharged by respective memory cells before respective voltages on the bit lines are latched.

Abstract: A system and method to detect row-to-row shorts and other row decode defects in memory devices and other electronic devices having a similar data storage functionality is disclosed. A selective switching between a normal large pull-up device and a smaller one in a wordline driver path allows limiting the current in the pull-up circuit to a low value so as to detect shorts because the shorts will cause the active wordline voltage level to drop, while a wordline without shorts will operate well. A GIDL (Gate Induced Drain Leakage) reduction circuit may be used as a pull-up circuit connected to supply a bias voltage to the wordline driver associated with a wordline being tested for shorts or other defects. A test signal may be selectively generated during testing so as to supply a lower strength voltage output of the GIDL circuit (the VccpRDec output) as the bias voltage to the wordline driver.

Abstract: A NAND architecture non-volatile memory voltage sensing data read/verify process and sense amplifier has been described that senses data in floating gate or floating node field effect transistor memory cells using a voltage sensing data read/verify process. The voltage sensing process utilized a reference NAND string and reference memory cell that is coupled to a reference bit line. A voltage is precharged onto a bit line to be read and an associated reference bit line. The bit line is then coupled to a NAND string and selected memory cell while the reference bit line is coupled to a reference NAND string and selected reference memory cell. The relative voltage level of the bit line and reference bit line are then set by the relative currents flowing through the coupled NAND string and reference NAND string, and the voltage differential read by a coupled voltage sense amplifier.

Abstract: Systems, devices and methods are disclosed, such as a system and method of sensing the voltage on bit lines that, when respective memory cells coupled to the bit lines are being read that compensates for variations in the lengths of the bit lines between the memory cells being read and respective bit line sensing circuits. The system and method may determine the length of the bit lines between the memory cells and the sensing circuits based on a memory address, such as a block address. The system and method then uses the determined length to adjust either a precharge voltage applied to the bit lines or the duration during which the bit lines are discharged by respective memory cells before respective voltages on the bit lines are latched.

Abstract: A system and method to detect row-to-row shorts and other row decode defects in memory devices and other electronic devices having a similar data storage functionality is disclosed. A selective switching between a normal large pull-up device and a smaller one in a wordline driver path allows limiting the current in the pull-up circuit to a low value so as to detect shorts because the shorts will cause the active wordline voltage level to drop, while a wordline without shorts will operate well. A GIDL (Gate Induced Drain Leakage) reduction circuit may be used as a pull-up circuit connected to supply a bias voltage to the wordline driver associated with a wordline being tested for shorts or other defects. A test signal may be selectively generated during testing so as to supply a lower strength voltage output of the GIDL circuit (the VccpRDec output) as the bias voltage to the wordline driver.

Abstract: A NAND architecture non-volatile memory voltage sensing data read/verify process and sense amplifier has been described that senses data in floating gate or floating node field effect transistor memory cells using a voltage sensing data read/verify process. The voltage sensing process utilized a reference NAND string and reference memory cell that is coupled to a reference bit line. A voltage is precharged onto a bit line to be read and an associated reference bit line. The bit line is then coupled to a NAND string and selected memory cell while the reference bit line is coupled to a reference NAND string and selected reference memory cell. The relative voltage level of the bit line and reference bit line are then set by the relative currents flowing through the coupled NAND string and reference NAND string, and the voltage differential read by a coupled voltage sense amplifier.

Abstract: A liquid crystal display (LCD) exhibiting enhanced optical viewing performance. In a preferred embodiment, the LCD comprises a liquid crystal display panel, the liquid crystal display panel comprising a pair of transparent substrates, liquid crystal material sandwiched between the transparent substrates and transparent electrodes positioned between the liquid crystal material and the transparent substrates. The LCD also comprises a rear polarizer assembly comprising a compensation film, a polarizer mounted on the rear surface of the compensation film, and a first index-matched, pressure sensitive adhesive (PSA) mounted on the front surface of the compensation film, the PSA being adhered to the rear surface of the LCD panel. The LCD also comprises a front polarizer assembly, the front polarizer assembly comprising a front polarizer, a compensation film mounted on the rear surface of the front polarizer and an index-matched PSA mounted on the front surface of the front polarizer.

Abstract: A system and method to detect row-to-row shorts and other row decode defects in memory devices and other electronic devices having a similar data storage functionality is disclosed. A selective switching between a normal large pull-up device and a smaller one in a wordline driver path allows limiting the current in the pull-up circuit to a low value so as to detect shorts because the shorts will cause the active wordline voltage level to drop, while a wordline without shorts will operate well. A GIDL (Gate Induced Drain Leakage) reduction circuit may be used as a pull-up circuit connected to supply a bias voltage to the wordline driver associated with a wordline being tested for shorts or other defects. A test signal may be selectively generated during testing so as to supply a lower strength voltage output of the GIDL circuit (the VccpRDec output) as the bias voltage to the wordline driver.

Abstract: The gas turbines of the present invention have multiple combustion chambers, and within each chamber are multiple fuel nozzles. Each nozzle has its own fuel control valve to control the fuel flowing to the nozzles. To minimize the pressure drop through the fuel control valves, multiple manifolds are employed. Each manifold supplies at least one fuel nozzle in multiple combustion chambers with fuel. The fuel control valves are mounted on the manifolds such that the weight of the fuel control valves and nozzles are carried by the manifolds, not the multiple combustion chambers. A plurality of thermocouples for measuring exhaust gas from said multiple combustion chambers are employed to sense gas exhaust temperature. In carrying out the methods of the present invention for tuning a gas turbine, it is essential to note that the most efficient gas turbine is one which has the least nitrous oxides, the least amount of unburned hydrocarbons, and the least amount of carbon monoxide for a specified energy output.

Abstract: A memory cell, array and device include cross-shaped active areas and polysilicon gate areas disposed over arm portions of adjacent cross-shaped active areas. The polysilicon gate areas couple word lines with capacitors associated with each arm portion of the cross-shaped active areas. Buried digit lines are coupled to body portions of the cross-shaped active areas. The word lines and digit lines provide a unique contact to each capacitor of the array of memory cells. Each memory cell has an area of 5 F2. An electronic system and method for fabricating a memory cell are also disclosed.

Abstract: The gas turbines of the present invention have multiple combustion chambers, and within each chamber are multiple fuel nozzles. Each nozzle has its own fuel control valve to control the fuel flowing to the nozzles. To minimize the pressure drop through the fuel control valves, multiple manifolds are employed. Each manifold supplies at least one fuel nozzle in multiple combustion chambers with fuel. The fuel control valves are mounted on the manifolds such that the weight of the fuel control valves and nozzles are carried by the manifolds, not the multiple combustion chambers. A plurality of thermocouples for measuring exhaust gas from said multiple combustion chambers are employed to sense gas exhaust temperature. In carrying out the methods of the present invention for tuning a gas turbine, it is essential to note that the most efficient gas turbine is one which has the least nitrous oxides, the least amount of unburned hydrocarbons, and the least amount of carbon monoxide for a specified energy output.

Abstract: A memory cell, array and device include cross-shaped active areas and polysilicon gate areas disposed over arm portions of adjacent cross-shaped active areas. The polysilicon gate areas couple word lines with capacitors associated with each arm portion of the cross-shaped active areas. Buried digit lines are coupled to body portions of the cross-shaped active areas. The word lines and digit lines provide a unique contact to each capacitor of the array of memory cells. Each memory cell has an area of 5 F2. An electronic system and method for fabricating a memory cell are also disclosed.

Abstract: A system and method to detect row-to-row shorts and other row decode defects in memory devices and other electronic devices having a similar data storage functionality is disclosed. A selective switching between a normal large pull-up device and a smaller one in a wordline driver path allows limiting the current in the pull-up circuit to a low value so as to detect shorts because the shorts will cause the active wordline voltage level to drop, while a wordline without shorts will operate well. A GIDL (Gate Induced Drain Leakage) reduction circuit may be used as a pull-up circuit connected to supply a bias voltage to the wordline driver associated with a wordline being tested for shorts or other defects. A test signal may be selectively generated during testing so as to supply a lower strength voltage output of the GIDL circuit (the VccpRDec output) as the bias voltage to the wordline driver.

Abstract: A liquid crystal display (LCD) exhibiting enhanced optical viewing performance. In a preferred embodiment, the LCD comprises a liquid crystal display panel, the liquid crystal display panel comprising a pair of transparent substrates, liquid crystal material sandwiched between the transparent substrates and transparent electrodes positioned between the liquid crystal material and the transparent substrates. The LCD also comprises a rear polarizer assembly comprising a compensation film, a polarizer mounted on the rear surface of the compensation film, and a first index-matched, pressure sensitive adhesive (PSA) mounted on the front surface of the compensation film, the PSA being adhered to the rear surface of the LCD panel. The LCD also comprises a front polarizer assembly, the front polarizer assembly comprising a front polarizer, a compensation film mounted on the rear surface of the front polarizer and an index-matched PSA mounted on the front surface of the front polarizer.

Abstract: The present subject matter discloses a method of managing payments made in the construction industry. A subcontractor delivers an invoice to the builder, the builder approves the invoice and forwards the invoice to a title company. The title company verifies the builder has the requisite funds in a construction loan or line of credit held by the builder and the title company requests a lien waiver from the subcontractor. When the title company receives confirmation of the builder's available funds and the lien waiver from the subcontractor, the title company processes a payment voucher, communicates the approved payment amount to the subcontractor and provides the subcontractor access to the approved payment through the builder's transaction account.

Abstract: Heat exchanger liquid can be heated by pumping the pressurized liquid through multiple pin hole openings in partitions spaced along the flow conduit that contains the liquid. The pin holes in each partition exert a heating action on the flowing liquid by causing the liquid to have a high degree of boundary layer turbulence.