Abstract: A printed wiring board semiconductor package or PWB power core comprising singulated capacitors embedded on multiple layers of the printed wiring board semiconductor package wherein at least a part of each embedded capacitor lies within the die shadow and wherein the embedded, singulated capacitors comprise at least a first electrode and a second electrode. The first electrodes and second electrodes of the embedded singulated capacitors are interconnected to the Vcc (power) terminals and the Vss (ground) terminals respectively of a semiconductor device. The size of the embedded capacitors are varied to produce different self-resonant frequencies and their vertical placements within the PWB semiconductor package are used to control the inherent inductance of the capacitor-semiconductor electrical interconnections so that customized resonant frequencies of the embedded capacitors can be achieved with low impedance.

Abstract: The present invention relates to a power core comprising: at least one embedded surface mount technology (SMT) discrete chip capacitor layer comprising at least one embedded SMT discrete chip capacitor; and at least one planar capacitor laminate; wherein at least one planar capacitor laminate serves as a low inductance path to supply a charge to at least one embedded SMT discrete chip capacitor; and wherein said embedded SMT discrete chip capacitor is connected in parallel to said planar capacitor laminate.

Abstract: The present invention relates to a device comprising a power core wherein said power core comprises: at least one embedded singulated capacitor layer containing at least one embedded singulated capacitor; and at least one planar capacitor laminate; wherein said planar capacitor laminate serves as a low inductance path to supply a charge to said at least one embedded singulated capacitor; and wherein said at least one embedded singulated capacitor is connected in parallel to at least one of the said planar capacitor laminates; and wherein said power core is interconnected to at least one signal layer.

Abstract: A printed wiring board semiconductor package or PWB power core comprising singulated capacitors embedded on multiple layers of the printed wiring board semiconductor package wherein at least a part of each embedded capacitor lies within the die shadow and wherein the embedded, singulated capacitors comprise at least a first electrode and a second electrode. The first electrodes and second electrodes of the embedded singulated capacitors are interconnected to the Vcc (power) terminals and the Vss (ground) terminals respectively of a semiconductor device. The size of the embedded capacitors are varied to produce different self-resonant frequencies and their vertical placements within the PWB semiconductor package are used to control the inherent inductance of the capacitor-semiconductor electrical interconnections so that customized resonant frequencies of the embedded capacitors can be achieved with low impedance.

Abstract: Thick-film capacitors are formed on ceramic interconnect substrates having high capacitance densities and other desirable electrical and physical properties. The capacitor dielectrics are fired at high temperatures.

Abstract: Provided herein are devices comprising a printed wiring board that comprise, singulated capacitors fabricated from known good, thin-film, fired-on-foil capacitors. Provided are methods of incorporating the singulated capacitors into the build-up layers of a printed wiring board to minimize impedance. The singulated capacitors have a pitch that allows each power and ground terminal of an IC to be directly connected to a power and ground electrode, respectively, of its own singulated capacitor. Using a feedstock of known good, fired-on-foil capacitors allows for improved PWB yield.

Abstract: Multilayer cathode backplate structures are provided for use with a field emitter in display panels. Processes for making the structures are also disclosed. The backplate structures are made of a plurality of electrodes separated by one or more patterned layers of a dielectric composition, each said patterned layer being formed by firing a thick film dielectric composition which has been patterned by diffusion patterning.

Abstract: Patterned ion-bombarded graphite electron emitters are disclosed as well as processes for producing them. The electron emitters are produced by forming a layer of composite of graphite particles and glass on a substrate then bombarding the composite with an ion beam. The electron emitters are useful in field emitter cathode assemblies which are fabricated into flat panel displays.

Abstract: Patterned graphite electron emitters are disclosed. These field emitters find particular usefulness in field emitter cathodes and display panels. These graphite field emitters can be formed by screen printing a paste comprised of graphite and electrically insulating material (glass frit) in the desired patterned paste and bombarding the fire product with an ion beam.

Abstract: Wire-coated graphite electron emitters are disclosed. These field emitters find particular usefulness in field emitter cathodes, display panels and lighting devices. These graphite field emitters can be formed by coating a paste comprised of graphite and glass frit onto the wire, firing the paste and bombarding the fired product with an ion beam.

Abstract: Patterned ion-bombarded carbon electron emitters and the processes for producing them. The electron emitters are produced by forming a layer of composite of carbon particles and glass on a substrate then bombarding the composite with an ion beam. The electron emitters are useful in field emitter cathode assemblies which are fabricated into flat panel displays.

Abstract: Display panels having at least one suspended fibrous cathode containing an electron field emitter are disclosed. The fibrous cathode is supported by a substrate (10) containing two sets of parallel rows of crests and valleys. The first set of parallel crests (11) and valleys (12) provide the valleys along which the fibrous cathode is aligned. The second set of parallel crests (13) and valleys (14) is perpendicular to the first set. The valleys (14) provide the means for suspending the fibrous cathode. The display panels can be produced in large sizes while still maintaining high quality and efficiency.

Abstract: A method for connecting, both mechanically and electrically, an electrically conducting field emission fiber (31) to an electrically conducting area of a substrate (32) involving placing the field emission fiber (31) across the surface of the substrate (32) and centering the field emission fiber (31) over the area of the substrate (32) where the connection is to be made, placing a metal ribbon (33) over the field emission fiber (31) with the dimension along the length of the metal ribbon (33) essentially perpendicular to the axis of the field emission fiber (31) and such that the metal ribbon (33) extends over the field emission fiber (31) with each end portion of the metal ribbon (33) in direct contact with the conducting area of the substrate (32), and bonding the metal ribbon (33) to the area of the substrate (32) and to the field emission fiber (31) by means of ultrasonic, thermocompression or compression bonding, substantially as shown in the figures, and described in the specification.