Patents by Inventor Daniel L. Helmick

Daniel L. Helmick has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11853571
    Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller comprising first random access memory (RAM1), second random access memory (RAM2), and a storage unit divided into a plurality of streams. By restricting the host to have a minimum write size, the data transfer speed to RAM2, RAM1, and the storage unit can be optimized. A temporary buffer is utilized within the RAM1 to update parity data for the corresponding commands. The parity data is updated in the RAM1 and written to the RAM2 in the corresponding stream. The parity data may be copied from the RAM2 to the RAM1 to update the parity data in the temporary buffer when commands are received to write data to corresponding streams. As the parity data is updated, the corresponding command is simultaneously written to the corresponding stream.
    Type: Grant
    Filed: November 19, 2021
    Date of Patent: December 26, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Sergey Anatolievich Gorobets, Daniel L. Helmick, Peter Grayson
  • Patent number: 11847337
    Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller comprising first random access memory (RAM1), second random access memory (RAM2), and a storage unit divided into a plurality of zones. A first command to write data to a first zone is received, first parity data for the first command is generated in the RAM1, and the data of the first command is written to the first zone. When a second command to write data to a second zone is received, the generated first parity data is copied from the RAM1 to a parking section in the storage unit, and second parity data associated with the second zone is copied from the parking section to the RAM1. The second parity data is then updated in the RAM1 with the data of the second command and copied to the parking section.
    Type: Grant
    Filed: July 8, 2022
    Date of Patent: December 19, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Peter Grayson, Daniel L. Helmick, Liam Parker, Sergey Anatolievich Gorobets
  • Patent number: 11726679
    Abstract: EGs may be combined with ZNSs to offer greater control of how, where and under what configurations, data is stored to various user-defined sections on a SSD. In embodiments, this exposure of control functionalities to an SSD host provides improved performance to data center and other hyperscale users and their clients. In embodiments, larger SSDs may be partitioned into groups of zones for better usage by host devices. In embodiments, the groups may comprise, for example, EGs, sets and MUs, each containing a defined number of zones. In one or more embodiments, hosts may use different EGs to access the device and thereby manage die or channel conflicts in the SSD.
    Type: Grant
    Filed: May 6, 2020
    Date of Patent: August 15, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Daniel L. Helmick, Horst-Christoph Georg Hellwig, Liam Parker, Ryan R. Jones, Matias Bjorling
  • Patent number: 11656984
    Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller and a media unit divided into a plurality of zones. Data associated with one or more first commands is written to a first portion of a first zone. Upon a predetermined amount of time passing, dummy data is written to a second portion of the first zone to fill the first zone to a zone capacity. Upon receiving one or more second commands to write data, a second zone is allocated and opened, and the data associated with the one or more second commands is written to a first portion of the second zone. The data associated with the one or more first commands is then optionally re-written to a second portion of the second zone to fill the second zone to a zone capacity, and the first zone is erased.
    Type: Grant
    Filed: November 19, 2021
    Date of Patent: May 23, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Alan D. Bennett, Liam Parker, Daniel L. Helmick
  • Publication number: 20230147206
    Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller comprising first random access memory (RAM1), second random access memory (RAM2), and a storage unit divided into a plurality of streams. When a write command is received to write data to a stream, change log data is generated and stored in the RAM1, the previous delta data for the stream is copied from the RAM2 to the RAM1 to be updated with the change log data, and the updated delta data is copied to the RAM2. The delta data stored in the RAM2 is copied to the storage unit periodically. The controller tracks which delta data has been copied to the RAM2 and to the storage unit. During a power failure, the delta data and the change log data are copied from the RAM1 or the RAM2 to the storage unit.
    Type: Application
    Filed: January 5, 2023
    Publication date: May 11, 2023
    Applicant: Western Digital Technologies, Inc.
    Inventors: Daniel L. HELMICK, Peter GRAYSON
  • Patent number: 11640266
    Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller comprising first random access memory (RAM1), second random access memory (RAM2), and a storage unit divided into a plurality of zones. The controller restricts the host to a maximum number of zones that can be in the open and active state at a time. Open zones can be switched to the closed state, and vice versa, upon a predetermined amount of time expiring. The maximum number of open zones is based on one or more amounts of time to: generate parity data, copy the parity data from the RAM2 to the RAM1, update the parity data, switch a zone from the open and active state to the closed state, and the amount of space in a temporary RAM1 buffer.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: May 2, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Liam Parker, Daniel L. Helmick, Sergey Anatolievich Gorobets
  • Patent number: 11610642
    Abstract: A storage system with several integrated components and method for use therewith are provided. In one embodiment, a storage system comprising: a plurality of non-volatile memory devices; a controller in communication with the plurality of non-volatile memory devices; a plurality of data buffers in communication with the controller and configured to store data sent between the controller and an input/output bus; and a command and address buffer configured to store commands and addresses sent from a host, wherein the command and address buffer is further configured to synchronize data flow into and out of the plurality of data buffer; wherein at least three of the above components are integrated with each other.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: March 21, 2023
    Assignee: SanDisk Technologies LLC
    Inventors: Daniel L. Helmick, Martin V. Lueker-Boden
  • Patent number: 11561717
    Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller comprising first random access memory (RAM1), second random access memory (RAM2), and a storage unit divided into a plurality of streams. When a write command is received to write data to a stream, change log data is generated and stored in the RAM1, the previous delta data for the stream is copied from the RAM2 to the RAM1 to be updated with the change log data, and the updated delta data is copied to the RAM2. The delta data stored in the RAM2 is copied to the storage unit periodically. The controller tracks which delta data has been copied to the RAM2 and to the storage unit. During a power failure, the delta data and the change log data are copied from the RAM1 or the RAM2 to the storage unit.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: January 24, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Daniel L. Helmick, Peter Grayson
  • Patent number: 11537510
    Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller and a storage unit divided into a plurality of streams. The storage unit comprises a plurality of dies, where each die comprises two planes. One erase block from each plane of a die is selected for stream formation. Each erase block comprises a plurality of wordlines. A stream comprises one or two dies dedicated to storing parity data and a plurality of dies dedicated to storing user data. The stream further comprises space devoted for controller metadata. The storage device restricts a host device to send write commands in a minimum write size to increase programming efficiency. The minimum write size equals one wordline from one erase block from each plane of each die in the stream dedicated to storing user data minus the space dedicated to metadata.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: December 27, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Alan D. Bennett, Daniel L. Helmick, Liam Parker, Sergey Anatolievich Gorobets, Peter Grayson
  • Patent number: 11520660
    Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller comprising first random access memory (RAM1), second random access memory (RAM2), and a storage unit divided into a plurality of zones. By restricting the host to have a minimum write size, the data transfer speed to RAM2, RAM1, and the storage unit can be optimized. A temporary buffer is utilized within the RAM1 to update parity data for the corresponding commands. The parity data is updated in the RAM1 and written to the RAM2 in the corresponding zone. The parity data may be copied from the RAM2 to the RAM1 to update the parity data in the temporary buffer when commands are received to write data to corresponding zones. As the parity data is updated, the corresponding command is simultaneously written to the corresponding zone.
    Type: Grant
    Filed: June 16, 2021
    Date of Patent: December 6, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Daniel L. Helmick, Peter Grayson, Sergey Anatolievich Gorobets
  • Patent number: 11520523
    Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller comprising first random access memory (RAM1), second random access memory (RAM2), and a storage unit divided into a plurality of zones. When a write command is received to write data to a zone, change log data is generated and stored in the RAM1, the previous delta data for the zone is copied from the RAM2 to the RAM1 to be updated with the change log data, and the updated delta data is copied to the RAM2. The delta data stored in the RAM2 is copied to the storage unit periodically. The controller tracks which delta data has been copied to the RAM2 and to the storage unit. During a power failure, the delta data and the change log data are copied from the RAM1 or the RAM2 to the storage unit.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: December 6, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Daniel L. Helmick, Peter Grayson
  • Patent number: 11500727
    Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller comprising first random access memory (RAM1), second random access memory (RAM2), and a storage unit divided into a plurality of zones. A first command to write data to a first zone is received, first XOR data is generated in the RAM1, and the data of the first command is written to the first zone. When a second command to write data to a second zone is received, the generated first XOR data is copied from the RAM1 to the RAM2, and second XOR data for the second zone is copied from the RAM2 to the RAM1. The second XOR data is updated with the second command, and the data of the second command is written to the second zone. The updated second XOR data is copied from the RAM1 to the RAM2.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: November 15, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Daniel L. Helmick, Liam Parker, Alan D. Bennett, Peter Grayson, Sergey Anatolievich Gorobets
  • Publication number: 20220342584
    Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller comprising first random access memory (RAM1), second random access memory (RAM2), and a storage unit divided into a plurality of zones. A first command to write data to a first zone is received, first parity data for the first command is generated in the RAM1, and the data of the first command is written to the first zone. When a second command to write data to a second zone is received, the generated first parity data is copied from the RAM1 to a parking section in the storage unit, and second parity data associated with the second zone is copied from the parking section to the RAM1. The second parity data is then updated in the RAM1 with the data of the second command and copied to the parking section.
    Type: Application
    Filed: July 8, 2022
    Publication date: October 27, 2022
    Applicant: Western Digital Technologies, Inc.
    Inventors: Peter GRAYSON, Daniel L. HELMICK, Liam PARKER, Sergey Anatolievich GOROBETS
  • Patent number: 11436153
    Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device is comprised of a controller, a random access memory (RAM) unit, and a NVM unit, wherein the NVM unit is comprised of a plurality of zones. The RAM unit comprises a first logical to physical address table and the NVM unit comprises a second logical to physical address table. The zones are partitioned into sections, and each partitioned section aligns with a change log table. Data is written to each zone sequentially, and only one partitioned section is updated at a time for each zone. Each time a zone is erased or written to in the NVM unit, the first logical to physical address table is updated and the second logical to physical address table is periodically updated to match the first logical to physical address table.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: September 6, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Daniel L. Helmick, Mark Dancho, Ryan R. Jones
  • Patent number: 11416161
    Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller and a media unit. The capacity of the media unit is divided into a plurality of zones. The media unit comprises a plurality of dies, and each of the plurality of dies comprising a plurality of erase blocks. The controller is configured to compare an estimated age of a first available erase block in each of the plurality of dies to one another and select one or more of the first available erase blocks from one or more dies of the plurality of dies based on the estimated ages to form a first zone. At least one first available erase block from at least one die of the plurality of die is excluded from the first zone.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: August 16, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Alan D. Bennett, Liam Parker, Daniel L. Helmick, Sergey Anatolievich Gorobets, Peter Grayson
  • Patent number: 11409459
    Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller comprising first random access memory (RAM1), second random access memory (RAM2), and a storage unit divided into a plurality of zones. A first command to write data to a first zone is received, first parity data for the first command is generated in the RAM1, and the data of the first command is written to the first zone. When a second command to write data to a second zone is received, the generated first parity data is copied from the RAM1 to a parking section in the storage unit, and second parity data associated with the second zone is copied from the parking section to the RAM1. The second parity data is then updated in the RAM1 with the data of the second command and copied to the parking section.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: August 9, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Peter Grayson, Daniel L. Helmick, Liam Parker, Sergey Anatolievich Gorobets
  • Patent number: 11294598
    Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller and a storage unit divided into a plurality of zones. The storage unit comprises a plurality of dies, where each die comprises two planes. One erase block from each plane of a die is selected for zone formation. Each erase block comprises a plurality of wordlines. A zone comprises one or two dies dedicated to storing parity data and a plurality of dies dedicated to storing user data. The zone further comprises space devoted for controller metadata. The storage device restricts a host device to send write commands in a minimum write size to increase programming efficiency. The minimum write size equals one wordline from one erase block from each plane of each die in the zone dedicated to storing user data minus the space dedicated to metadata.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: April 5, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Alan D. Bennett, Daniel L. Helmick, Liam Parker, Sergey Anatolievich Gorobets, Peter Grayson
  • Patent number: 11294827
    Abstract: The present disclosure generally relates to methods of operating storage devices. A controller of the storage device is configured to retrieve a first command to write data to one or more first logical blocks of a first zone, and direct memory access (DMA) read and write the data associated with the first command to the first logical blocks. The first logical blocks are between a zone starting point of the first zone and a zone capacity of the first zone. The controller is configured to retrieve a second command to write data to one or more second logical blocks of the first zone, and DMA read and write the data associated with the second command to the second logical blocks. The second logical blocks are between the zone starting and the zone capacity of the first zone, and the first logical blocks are non-sequential to the second logical blocks.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: April 5, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Alan D. Bennett, Matias Bjorling, Daniel L. Helmick
  • Publication number: 20220100390
    Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller and a media unit. The capacity of the media unit is divided into a plurality of zones. The controller is configured to make informed use of errors by update zone metadata to indicate one or more first logical block addresses were skipped and to indicate the next valid logical block address is available to store data. The controller is further configured to update zone metadata to recommend to the host device to reset one or more full zones, to recommend to the host device to transition one or more open zones to a full state, to alert the host device that one or more open zones have been transitioned to the full state, and to notify the host device of the writeable zone capacity of each of the plurality of zones.
    Type: Application
    Filed: December 10, 2021
    Publication date: March 31, 2022
    Applicant: Western Digital Technologies, Inc.
    Inventors: Matias BJORLING, Horst-Christoph Georg HELLWIG, David LANDSMAN, Daniel L. HELMICK, Liam PARKER, Alan D. BENNETT, Peter GRAYSON, Judah Gamliel HAHN
  • Publication number: 20220075718
    Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller and a media unit divided into a plurality of zones. Data associated with one or more first commands is written to a first portion of a first zone. Upon a predetermined amount of time passing, dummy data is written to a second portion of the first zone to fill the first zone to a zone capacity. Upon receiving one or more second commands to write data, a second zone is allocated and opened, and the data associated with the one or more second commands is written to a first portion of the second zone. The data associated with the one or more first commands is then optionally re-written to a second portion of the second zone to fill the second zone to a zone capacity, and the first zone is erased.
    Type: Application
    Filed: November 19, 2021
    Publication date: March 10, 2022
    Applicant: Western Digital Technologies, Inc.
    Inventors: Alan D. BENNETT, Liam PARKER, Daniel L. HELMICK