Patents by Inventor Daniel N Carothers
Daniel N Carothers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8343792Abstract: An improved method for manufacturing a lateral germanium detector is disclosed. A detector window is opened through an oxide layer to expose a doped single crystalline silicon layer situated on a substrate. Next, a single crystal germanium layer is grown within the detector window, and an amorphous germanium layer is grown on the oxide layer. The amorphous germanium layer is then polished to leave only a small portion around the single crystal germanium layer. A dielectric layer is deposited on the amorphous germanium layer and the single crystal germanium layer. Using resist masks and ion implants, multiple doped regions are formed on the single crystal germanium layer. After opening several oxide windows on the dielectric layer, a refractory metal layer is deposited on the doped regions to form multiple germanide layers.Type: GrantFiled: October 27, 2008Date of Patent: January 1, 2013Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Daniel N. Carothers, Craig M. Hill, Andrew T. S. Pomerene, Vu A. Vu, Robert Kamocsai, Timothy J. Conway
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Publication number: 20120304919Abstract: A method for growing germanium epitaxial films is disclosed. Initially, a silicon substrate is preconditioned with hydrogen gas. The temperature of the preconditioned silicon substrate is then decreased, and germane gas is flowed over the preconditioned silicon substrate to form an intrinsic germanium seed layer. Next, a mixture of germane and phosphine gases can be flowed over the intrinsic germanium, seed layer to produce an n-doped germanium seed layer. Otherwise, a mixture of diborane and germane gases can be flowed over the intrinsic germanium seed layer to produce a p-doped germanium seed layer. At this point, a hulk germanium layer can be grown on top of the doped germanium seed layer.Type: ApplicationFiled: August 15, 2012Publication date: December 6, 2012Applicant: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Daniel N. Carothers, Craig M. Hill, Andrew T.S. Pomerene, Vu A. Vu
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Patent number: 8288290Abstract: A method is provided for the integration of an optical gain material into a Complementary metal oxide semiconductor device, the method comprising the steps of: configuring a workpiece from a silicon wafer upon which is disposed an InP wafer bearing an epitaxy layer; mechanically removing the InP substrate; etching the InP remaining on epitaxy layer with hydrochloric acid; depositing at least one Oxide pad on revealed the epitaxy layer; using the Oxide pad as a mask during a first pattern etch removing the epitaxy to an N level; etching with a patterned inductively coupled plasma (ICP) technique; isolating the device on the substrate with additional pattern etching patterning contacts, applying the contacts.Type: GrantFiled: August 29, 2008Date of Patent: October 16, 2012Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventor: Daniel N. Carothers
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Publication number: 20120252158Abstract: An improved method for manufacturing a lateral germanium detector is disclosed. A detector window is opened through an oxide layer to expose a doped single crystalline silicon layer situated on a substrate. Next, a single crystal germanium layer is grown within the detector window, and an amorphous germanium layer is grown on the oxide layer. The amorphous germanium layer is then polished to leave only a small portion around the single crystal germanium layer. A dielectric layer is deposited on the amorphous germanium layer and the single crystal germanium layer. Using resist masks and ion implants, multiple doped regions are formed on the single crystal germanium layer. After opening several oxide windows on the dielectric layer, a refractory metal layer is deposited on the doped regions to form multiple germanide layers.Type: ApplicationFiled: October 27, 2008Publication date: October 4, 2012Inventors: Daniel N. Carothers, Craig M. Hill, Andrew T. S. Pomerene, Vu A. Vu, Robert Kamocsai, Timothy J. Conway
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Publication number: 20120098101Abstract: A system is provided for the manufacture of carbon based electrical components including, an ultraviolet light source; a substrate receiving unit whereby a substrate bearing a first layer of carbon based semiconductor is received and disposed beneath the ultraviolet light source; a mask disposed between the ultraviolet light source and the carbon based semiconductor layer; a doping agent precursor source; and environmental chemical controls, configured such that light from the ultraviolet light source irradiates a doping agent precursor and the first carbon layer.Type: ApplicationFiled: December 12, 2011Publication date: April 26, 2012Applicant: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Daniel N. CAROTHERS, Rick THOMPSON
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Patent number: 8148265Abstract: Techniques are disclosed for efficiently fabricating semiconductors including waveguide structures. In particular, a two-step hardmask technology is provided that enables a stable etch base within semiconductor processing environments, such as the CMOS fabrication environment. The process is two-step in that there is deposition of a two-layer hardmask, followed by a first photolithographic pattern, followed by a first silicon etch, then a second photolithographic pattern, and then a second silicon etch. The process can be used, for example, to form a waveguide structure having both ridge and channel configurations, or a waveguide (ridge and/or channel) and a salicide heater structure, all achieved using the same hardmask. The second photolithographic pattern allows for the formation of the lower electrical contacts to the waveguides (or other structures) without a complicated rework of the hardmask.Type: GrantFiled: August 29, 2008Date of Patent: April 3, 2012Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Daniel N. Carothers, Craig M. Hill, Andrew T. Pomerene
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Patent number: 8076218Abstract: A method for the manufacture of carbon based electrical components is herein presented. In the method a wafer substrate is provided upon which a first layer of carbon based semiconductor is deposited. The first layer of carbon based semiconductor is introduced to a first doping agent precursor and the first doping agent precursor and first layer of carbon based semiconductor are irradiated with light having a wavelength in the ultraviolet spectrum thereby selectively doping areas of the first layer of carbon based semiconductor.Type: GrantFiled: July 6, 2009Date of Patent: December 13, 2011Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Daniel N. Carothers, Rick L. Thompson
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Patent number: 8031343Abstract: A waveguide optical gyroscope is disclosed. The waveguide optical gyroscope includes a laser, two detectors, a set of couplers and a set of waveguides. The laser generates a light beam. A first waveguide guides the light beam to travel in a first direction, and a second waveguide guides the light beam to travel in a second direction. The first and second waveguides are coupled to several ring waveguides via the couplers. The first detector detects the arrival of the light beam traveling from the first waveguide, and the second detector detects the arrival of the light beam traveling from the second waveguide.Type: GrantFiled: August 29, 2008Date of Patent: October 4, 2011Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Daniel N. Carothers, Jefferson E. Odhner
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Patent number: 7987066Abstract: An apparatus and method is provided for the testing of an optical bus, that method having: loading transmission test data and address information for at least one receiving cell via an electronic bus in a first register; setting a clock rate for the optical bus; employing the optical bus to transmit the test data from the first register to the at least one receiving cell; reading out received test data from the receiving cell via the electronic bus; correlating the received test data from the first register with the transmission test data; analyzing errors in the received data and handling of the received data by the bus.Type: GrantFiled: August 29, 2008Date of Patent: July 26, 2011Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Daniel N. Carothers, Richard W. Berger
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Patent number: 7927979Abstract: Techniques are disclosed that facilitate fabrication of semiconductors including structures and devices of varying thickness. One embodiment provides a method for semiconductor device fabrication that includes thinning a region of a semiconductor wafer upon which the device is to be formed thereby defining a thin region and a thick region of the wafer. The method continues with forming on the thick region one or more photonic devices and/or partially depleted electronic devices, and forming on the thin region one or more fully depleted electronic devices. Another embodiment provides a semiconductor device that includes a semiconductor wafer defining a thin region and a thick region. The device further includes one or more photonic devices and/or partially depleted electronic devices formed on the thick region, and one or more fully depleted electronic devices formed on the thin region. An isolation area can be formed between the thin region and the thick region.Type: GrantFiled: October 27, 2010Date of Patent: April 19, 2011Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Craig M. Hill, Andrew T S Pomerene, Daniel N. Carothers, Timothy J. Conway, Vu A. Vu
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Publication number: 20110036289Abstract: A method for growing germanium epitaxial films is disclosed. Initially, a silicon substrate is preconditioned with hydrogen gas. The temperature of the preconditioned silicon substrate is then decreased, and germane gas is flowed over the preconditioned silicon substrate to form an intrinsic germanium seed layer. Next, a mixture of germane and phosphine gases can be flowed over the intrinsic germanium seed layer to produce an n-doped germanium seed layer. Otherwise, a mixture of diborane and germane gases can be flowed over the intrinsic germanium seed layer to produce a p-doped germanium seed layer. At this point, a bulk germanium layer can be grown on top of the doped germanium seed layer.Type: ApplicationFiled: August 11, 2009Publication date: February 17, 2011Inventors: Daniel N. Carothers, Craig M. Hill, Andrew T.S. Pomerene, Vu A. Vu
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Publication number: 20110039388Abstract: Techniques are disclosed that facilitate fabrication of semiconductors including structures and devices of varying thickness. One embodiment provides a method for semiconductor device fabrication that includes thinning a region of a semiconductor wafer upon which the device is to be formed thereby defining a thin region and a thick region of the wafer. The method continues with forming on the thick region one or more photonic devices and/or partially depleted electronic devices, and forming on the thin region one or more fully depleted electronic devices. Another embodiment provides a semiconductor device that includes a semiconductor wafer defining a thin region and a thick region. The device further includes one or more photonic devices and/or partially depleted electronic devices formed on the thick region, and one or more fully depleted electronic devices formed on the thin region. An isolation area can be formed between the thin region and the thick region.Type: ApplicationFiled: October 27, 2010Publication date: February 17, 2011Applicant: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Craig M. HILL, Andrew TS POMERENE, Daniel N. CAROTHERS, Timothy J. CONWAY, Vu A. VU
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Publication number: 20100328673Abstract: A waveguide optical gyroscope is disclosed. The waveguide optical gyroscope includes a laser, two detectors, a set of couplers and a set of waveguides. The laser generates a light beam. A first waveguide guides the light beam to travel in a first direction, and a second waveguide guides the light beam to travel in a second direction. The first and second waveguides are coupled to several ring waveguides via the couplers. The first detector detects the arrival of the light beam traveling from the first waveguide, and the second detector detects the arrival of the light beam traveling from the second waveguide.Type: ApplicationFiled: August 29, 2008Publication date: December 30, 2010Inventors: Daniel N. Carothers, Jefferson E. Odhner
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Patent number: 7853101Abstract: One embodiment of the present invention provides a system for the transmission of data between an optical bus and an electronic component at a speed independent from a clock speed of the electrical component; the system comprising an optical data storage component communicating with both the optical bus and the electrical component; the optical data storage component being configured to hold data transmitted on the optical bus until said electrical component is available.Type: GrantFiled: August 29, 2008Date of Patent: December 14, 2010Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventor: Daniel N. Carothers
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Patent number: 7847353Abstract: Techniques are disclosed that facilitate fabrication of semiconductors including structures and devices of varying thickness. One embodiment provides a method for semiconductor device fabrication that includes thinning a region of a semiconductor wafer upon which the device is to be formed thereby defining a thin region and a thick region of the wafer. The method continues with forming on the thick region one or more photonic devices and/or partially depleted electronic devices, and forming on the thin region one or more fully depleted electronic devices. Another embodiment provides a semiconductor device that includes a semiconductor wafer defining a thin region and a thick region. The device further includes one or more photonic devices and/or partially depleted electronic devices formed on the thick region, and one or more fully depleted electronic devices formed on the thin region. An isolation area can be formed between the thin region and the thick region.Type: GrantFiled: December 5, 2008Date of Patent: December 7, 2010Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Craig M. Hill, Andrew T. Pomerene, Daniel N. Carothers, Timothy J. Conway, Vu A. Vu
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Patent number: 7848601Abstract: Techniques are disclosed for optical switching and data control, without the interaction of electronic switching speeds. In one example embodiment, a common cavity optical latch is provided that that can hold an optical state for an extended period of time, and the operation of which is controlled optically. Optical phase control allows optical modal switching to be employed between two common optical cavities, using incident optical signals and the way in which the cavities manipulate the phase within them to lock in one or the other configuration, thereby forming an optical latch. The optical latch is implemented in an integrated fashion, such as in a CMOS environment.Type: GrantFiled: March 5, 2010Date of Patent: December 7, 2010Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventor: Daniel N. Carothers
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Patent number: 7811844Abstract: A method for fabricating photonic and electronic devices on a substrate is disclosed. Multiple slabs are initially patterned and etched on a layer of a substrate. An electronic device is fabricated on a first one of the slabs and a photonic device is fabricated on a second one of the slabs, such that the electronic device and the photonic device are formed on the same layer of the substrate.Type: GrantFiled: August 29, 2008Date of Patent: October 12, 2010Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Daniel N. Carothers, Craig M. Hill, Andrew T. S. Pomerene, Timothy J. Conway, Rick L. Thompson, Vu A. Vu, Robert Kamocsai, Joe Giunta, Jonathan N. Ishii
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Publication number: 20100157402Abstract: Techniques are disclosed for optical switching and data control, without the interaction of electronic switching speeds. In one example embodiment, a common cavity optical latch is provided that that can hold an optical state for an extended period of time, and the operation of which is controlled optically. Optical phase control allows optical modal switching to be employed between two common optical cavities, using incident optical signals and the way in which the cavities manipulate the phase within them to lock in one or the other configuration, thereby forming an optical latch. The optical latch is implemented in an integrated fashion, such as in a CMOS environment.Type: ApplicationFiled: March 5, 2010Publication date: June 24, 2010Applicant: BAE SYSTEMS Information & Electronic Systems Integration Inc.Inventor: Daniel N. Carothers
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Patent number: 7736934Abstract: An improved method for manufacturing a vertical germanium detector is disclosed. Initially, a detector window is opened through an oxide layer on a single crystalline substrate. Next, a single crystal germanium layer is grown within the detector window, and an amorphous germanium layer is grown on the oxide layer. The amorphous germanium layer is then polished and removed until only a portion of the amorphous germanium layer is located around the single crystal germanium layer. A tetraethyl orthosilicate (TEOS) layer is deposited on the amorphous germanium layer and the single crystal germanium layer. An implant is subsequently performed on the single crystal germanium layer. After an oxide window has been opened on the TEOS layer, a titanium layer is deposited on the single crystal germanium layer to form a vertical germanium detector.Type: GrantFiled: October 20, 2008Date of Patent: June 15, 2010Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Daniel N. Carothers, Craig M. Hill, Andrew T. S. Pomerene, Vu A. Vu, Joe Giunta, Jonathan N. Ishii
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Publication number: 20100140708Abstract: Techniques are disclosed that facilitate fabrication of semiconductors including structures and devices of varying thickness. One embodiment provides a method for semiconductor device fabrication that includes thinning a region of a semiconductor wafer upon which the device is to be formed thereby defining a thin region and a thick region of the wafer. The method continues with forming on the thick region one or more photonic devices and/or partially depleted electronic devices, and forming on the thin region one or more fully depleted electronic devices. Another embodiment provides a semiconductor device that includes a semiconductor wafer defining a thin region and a thick region. The device further includes one or more photonic devices and/or partially depleted electronic devices formed on the thick region, and one or more fully depleted electronic devices formed on the thin region. An isolation area can be formed between the thin region and the thick region.Type: ApplicationFiled: December 5, 2008Publication date: June 10, 2010Applicant: BAE SYSTEMS Information and Electronic Systems Integration Inc.Inventors: Craig M. Hill, Andrew T. Pomerene, Daniel N. Carothers, Timothy J. Conway, Vu A. Vu