Abstract: A method for manufacturing high-injection heterojunction bipolar transistor capable of being used as a photonic device is disclosed. A sub-collector layer is formed on a substrate. A collector layer is then deposited on top of the sub-collector layer. After a base layer has been deposited on top of the collector layer, a quantum well layer is deposited on top of the base layer. An emitter is subsequently formed on top of the quantum well layer.

Abstract: Techniques are disclosed for optical switching and data control, without the interaction of electronic switching speeds. In one example embodiment, a common cavity optical latch is provided that that can hold an optical state for an extended period of time, and the operation of which is controlled optically. Optical phase control allows optical modal switching to be employed between two common optical cavities, using incident optical signals and the way in which the cavities manipulate the phase within them to lock in one or the other configuration, thereby forming an optical latch. The optical latch is implemented in an integrated fashion, such as in a CMOS environment.

Abstract: A method for fabricating a thermal optical heating element capable of adjusting refractive index of an optical waveguide is disclosed. A silicon block is initially formed on a cladding layer on a silicon substrate. The silicon block is located in close proximity to an optical waveguide. A cobalt layer is deposited on the silicon block. The silicon block is then annealed to cause the cobalt layer to react with the silicon block to form a cobalt silicide layer. The silicon block is again annealed to cause the cobalt silicide layer to transform into a cobalt di-silicide layer.

Abstract: A salicide heater structure for use in thermo-optic and other heat-influenced semiconductor devices is disclosed. In one example embodiment, a system is provided that includes a silicon substrate, and a salicide heating element formed on the substrate, for delivering heat radiation to a heat-influenced semiconductor device. Another example embodiment is a salicide semiconductor system that includes a silicon substrate and a salicide structure formed on the substrate, wherein the salicide structure is for delivering heat radiation to a heat-influenced semiconductor device.

Abstract: A salicide heater structure for use in thermo-optic and other heat-influenced semiconductor devices is disclosed. In one example embodiment, a system is provided that includes a silicon substrate, and a salicide heating element formed on the substrate, for delivering heat radiation to a heat-influenced semiconductor device. Another example embodiment is a salicide semiconductor system that includes a silicon substrate and a salicide structure formed on the substrate, wherein the salicide structure is for delivering heat radiation to a heat-influenced semiconductor device.

Abstract: One embodiment of the present invention provides a system for the transmission of data between an optical bus and an electronic component at a speed independent from a clock speed of the electrical component; the system comprising an optical data storage component communicating with both the optical bus and the electrical component; the optical data storage component being configured to hold data transmitted on the optical bus until said electrical component is available.

Abstract: An apparatus and method is provided for the testing of an optical bus, that method comprising: loading transmission test data and address information for at least one receiving cell via an electronic bus in a first register; setting a clock rate for the optical bus; employing the optical bus to transmit the test data from the first register to the at least one receiving cell; reading out received test data from the receiving cell via the electronic bus; correlating the received test data from the first register with the transmission test data; analyzing errors in the received data and handling of the received data by the bus.

Abstract: Techniques are disclosed for efficiently fabricating semiconductors including waveguide structures. In particular, a two-step hardmask technology is provided that enables a stable etch base within semiconductor processing environments, such as the CMOS fabrication environment. The process is two-step in that there is deposition of a two-layer hardmask, followed by a first photolithographic pattern, followed by a first silicon etch, then a second photolithographic pattern, and then a second silicon etch. The process can be used, for example, to form a waveguide structure having both ridge and channel configurations, or a waveguide (ridge and/or channel) and a salicide heater structure, all achieved using the same hardmask. The second photolithographic pattern allows for the formation of the lower electrical contacts to the waveguides (or other structures) without a complicated rework of the hardmask.

Abstract: Techniques are disclosed for optical switching and data control, without the interaction of electronic switching speeds. In one example embodiment, a common cavity optical latch is provided that that can hold an optical state for an extended period of time, and the operation of which is controlled optically. Optical phase control allows optical modal switching to be employed between two common optical cavities, using incident optical signals and the way in which the cavities manipulate the phase within them to lock in one or the other configuration, thereby forming an optical latch. The optical latch is implemented in an integrated fashion, such as in a CMOS environment.

Abstract: A method is provided for the integration of an optical gain material into a Complementary metal oxide semiconductor device, the method comprising the steps of: configuring a workpiece from a silicon wafer upon which is disposed an InP wafer bearing an epitaxy layer; mechanically removing the InP substrate; etching the InP remaining on epitaxy layer with hydrochloric acid; depositing at least one Oxide pad on revealed the epitaxy layer; using the Oxide pad as a mask during a first pattern etch removing the epitaxy to an N level; etching with a patterned inductively coupled plasma (ICP) technique; isolating the device on the substrate with additional pattern etching patterning contacts, appling the contacts.

Abstract: An improved method for manufacturing a vertical germanium detector is disclosed. Initially, a detector window is opened through an oxide layer on a single crystalline substrate. Next, a single crystal germanium layer is grown within the detector window, and an amorphous germanium layer is grown on the oxide layer. The amorphous germanium layer is then polished and removed until only a portion of the amorphous germanium layer is located around the single crystal germanium layer. A tetraethyl orthosilicate (TEOS) layer is deposited on the amorphous germanium layer and the single crystal germanium layer. An implant is subsequently performed on the single crystal germanium layer. After an oxide window has been opened on the TEOS layer, a titanium layer is deposited on the single crystal germanium layer to form a vertical germanium detector.

Abstract: A device for medium wavelength infrared emission and a method for the manufacture thereof is provided. The device has a semiconductor substrate; a passive hermetic barrier disposed upon the substrate, and an emitter element disposed within said hermetic barrier; and a mirror.

Abstract: A system is provided for the manufacture of carbon based electrical components including, an ultraviolet light source; a substrate receiving unit whereby a substrate bearing a first layer of carbon based semiconductor is received and disposed beneath the ultraviolet light source; a mask disposed between the ultraviolet light source and the carbon based semiconductor layer; a doping agent precursor source; and environmental chemical controls, configured such that light from the ultraviolet light source irradiates a doping agent precursor and the first carbon layer.

Abstract: A system is provided for the manufacture of carbon based electrical components including, an ultraviolet light source; a substrate receiving unit whereby a substrate bearing a first layer of carbon based semiconductor is received and disposed beneath the ultraviolet light source; a mask disposed between the ultraviolet light source and the carbon based semiconductor layer; a doping agent precursor source; and environmental chemical controls, configured such that light from the ultraviolet light source irradiates a doping agent precursor and the first carbon layer.

Abstract: A method for fabricating photonic and electronic devices on a substrate is disclosed. Multiple slabs are initially patterned and etched on a layer of a substrate. An electronic device is fabricated on a first one of the slabs and a photonic device is fabricated on a second one of the slabs, such that the electronic device and the photonic device are formed on the same layer of the substrate.