Abstract: Methods, apparatus, and computer program products are disclosed for clock signal synchronization among computers in a network, including designating, as a primary clock signal for all the computers in a network, a clock signal from one of the computers in the network; providing the primary clock signal, simultaneously and in parallel, from the computer whose clock signal is designated as the primary clock signal to all the other computers in the network; and providing the primary clock signal, simultaneously and in parallel, from each computer in the network to all computers in the network through multiplexers and phase locked loops, with the primary clock signal locked in phase across all the computers by a phase locked loop on each computer.

Abstract: Embodiments of the present invention address deficiencies of the art in respect to via structure utilization in a PCB design and provide a novel and non-obvious method, system and computer program product for impedance discontinuity remediation for via stubs and connectors in a PCB. In one embodiment a method for impedance discontinuity remediation in a PCB can be provided. The method can include configuring a pre-distortion filter to negate an impedance discontinuity in an electrical signal caused by a transmission line with one of a via stub or a connector. The method further can include pre-distortion filtering an electrical signal before transmitting the electrical signal over the transmission line. Finally, the method can include transmitting the pre-distortion filtered electrical signal over the transmission line.

Abstract: Embodiments of the present invention address deficiencies of the art in respect to via structure utilization in a PCB design and provide a novel and non-obvious method, system and computer program product for impedance discontinuity remediation for via stubs and connectors in a PCB. In one embodiment a method for impedance discontinuity remediation in a PCB can be provided. The method can include configuring a pre-distortion filter to negate an impedance discontinuity in an electrical signal caused by a transmission line with one of a via stub or a connector. The method further can include pre-distortion filtering an electrical signal before transmitting the electrical signal over the transmission line. Finally, the method can include transmitting the pre-distortion filtered electrical signal over the transmission line.

Abstract: Methods, apparatus, and computer program products are disclosed for clock signal synchronization among computers in a network, including designating, as a primary clock signal for all the computers in a network, a clock signal from one of the computers in the network; providing the primary clock signal, simultaneously and in parallel, from the computer whose clock signal is designated as the primary clock signal to all the other computers in the network; and providing the primary clock signal, simultaneously and in parallel, from each computer in the network to all computers in the network through multiplexers and phase locked loops, with the primary clock signal locked in phase across all the computers by a phase locked loop on each computer.

Abstract: Methods, apparatus, and computer program products are disclosed for clock signal synchronization among computers in a network, including designating, as a primary clock signal for all the computers in a network, a clock signal from one of the computers in the network; providing the primary clock signal, simultaneously and in parallel, from the computer whose clock signal is designated as the primary clock signal to all the other computers in the network; and providing the primary clock signal, simultaneously and in parallel, from each computer in the network to all computers in the network through multiplexers and phase locked loops, with the primary clock signal locked in phase across all the computers by a phase locked loop on each computer.

Abstract: Cables and methods of manufacturing cables for high speed data communications, the cable including: a first inner conductor enclosed by a first dielectric layer and a second inner conductor enclosed by a second dielectric layer, the inner conductors and the dielectric layers parallel with and along a longitudinal axis; and folded conductive shield material wrapped in a rotational direction along and about the longitudinal axis around the inner conductors and the dielectric layers, including overlapped wraps along and about the longitudinal axis, the conductive shield material comprising a first conductive layer and second conductive layer separated by an inner-shield dielectric layer.

Abstract: The present invention provides a simple, easy to implement method and apparatus to reduce jitter in a channel and expand the eye width and eye height of the eye pattern of the signal. The method and apparatus of the present invention reduces jitter specific to a channel in a high speed interface. The present invention utilizes a phasing shifting mechanism based on history of the incoming bits at the receiver. The input bits from the channel are shifted in time before getting to the receiver. This approach significantly reduces Intersymbol Interference (ISI) and deterministic jitter, thus opening up the eye width and eye height for a given interface.

Abstract: An apparatus, system, and method are disclosed for dynamic phase equalization in a communication channel. A transmitter history module stores a plurality of bits from a data stream that is transmitted through the communication channel. A transmitter detection module detects a pre-transition bit of a first value that is preceded in the data stream by at least one bit of the first value and followed by a transition bit with a second value. A driver module transmits the data stream by driving the communication channel. A transition module pre-drives the communication channel to the second voltage of the transition bit during a bit time interval of the pre-transition bit.

Abstract: A programmable diagnostic memory module provides enhanced testability of memory controller and memory subsystem design. The programmable diagnostic memory module includes an interface for communicating with an external diagnostic system, and the interface is used to transfer commands to the memory module to alter various behaviors of the memory module. The altered behaviors may be changing data streams that are written to the memory module to simulate errors, altering the timing and/or loading of the memory module signals, downloading programs for execution by a processor core within the memory module, changing driver strengths of output signals of the memory module, and manipulating in an analog domain, signals at terminals of the memory module such as injecting noise on power supply connections to the memory module. The memory module may emulate multiple selectable memory module types, and may include a complete storage array to provide standard memory module operation.

Abstract: A method for performing memory diagnostics using a programmable diagnostic memory module provides enhanced testability of memory controller and memory subsystem design. The programmable diagnostic memory module includes an interface for communicating with an external diagnostic system, and the interface is used to transfer commands to the memory module to alter various behaviors of the memory module. The altered behaviors may be changing data streams that are written to the memory module to simulate errors, altering the timing and/or loading of the memory module signals, downloading programs for execution by a processor core within the memory module, changing driver strengths of output signals of the memory module, and manipulating in an analog domain, signals at terminals of the memory module such as injecting noise on power supply connections to the memory module.

Abstract: The present invention assesses memory (DIMM) strength by calculating frequency content of a radiated field which is collected by an apparatus, such as a dipole antenna. Radiated field is created by accelerated charge, which is a function of the slew rate or DIMM strength. Radiated power is directly proportional to the frequency at which bits are driven. By separating the radiated field from the near field or stored field, the DIMM strength content is isolated from other functional DIMM issues, such as tRCD latency, refresh cycles, addressing mode, etc. By examining the radiated power, the disadvantages of the prior art, such as by probing the DIMM's contacts, are avoided.

Abstract: Cables and methods of manufacturing cables for high speed data communications, the cable including: a first inner conductor enclosed by a first dielectric layer and a second inner conductor enclosed by a second dielectric layer, the inner conductors and the dielectric layers parallel with and along a longitudinal axis; and folded conductive shield material wrapped in a rotational direction along and about the longitudinal axis around the inner conductors and the dielectric layers, including overlapped wraps along and about the longitudinal axis, the conductive shield material comprising a first conductive layer and second conductive layer separated by an inner-shield dielectric layer.

Abstract: A signal history controlled slew-rate transmission method and bus interface transmitter provide an improved channel equalization mechanism having low complexity. A variable slew-rate feed-forward pre-emphasis circuit changes the slew rate of the applied pre-emphasis in conformity with the history of the transmitted signal. The pre-emphasis circuit may be implemented by a pair of current sources supplying the output of the transmitter, and having differing current values. The current sources are controlled such that upon a signal value change, a high slew rate is provided and when the signal value does not change for two consecutive signal periods, the slew rate is reduced. A current source having a controlled magnitude may be employed to provide a slew rate that changes over time and is continuously reduced until another transmission value change occurs.

Abstract: A cable for high speed data communications and methods for manufacturing such cable are disclosed, the cable including a first inner conductor enclosed by a first dielectric layer and a second inner conductor enclosed by a second dielectric layer. The cable also includes conductive shield material wrapped in a rotational direction at a rate along and about the longitudinal axis around the inner conductors and the dielectric layers, including overlapped wraps of the conductive shield material along and about the longitudinal axis, the conductive shield material having a variable width. Transmitting signals on the cable including transmitting a balanced signal characterized by a frequency in the range of 7-9 gigahertz on the cable.

Abstract: A cable for high speed data communications and methods for manufacturing such cable are disclosed, the cable including a first inner conductor enclosed by a first dielectric layer and a second inner conductor enclosed by a second dielectric layer. The cable also includes conductive shield material wrapped in a rotational direction at a rate along and about the longitudinal axis around the inner conductors and the dielectric layers, including overlapped wraps of the conductive shield material along and about the longitudinal axis, the conductive shield material having a variable width. Transmitting signals on the cable including transmitting a balanced signal characterized by a frequency in the range of 7-9 gigahertz on the cable.

Abstract: The present invention provides a simple, easy to implement method and apparatus to reduce jitter in a channel and expand the eye width and eye height of the eye pattern of the signal. The method and apparatus of the present invention reduces jitter specific to a channel in a high speed interface. The present invention utilizes a phasing shifting mechanism based on history of the incoming bits at the receiver. The input bits from the channel are shifted in time before getting to the receiver. This approach significantly reduces Intersymbol Interference (ISI) and deterministic jitter, thus opening up the eye width and eye height for a given interface.

Abstract: Illustrative embodiments provide a computer implemented method, an apparatus and a computer program product for workflow management control in a resource hierarchy. In one embodiment, the computer implemented method comprises, receiving data, from a plurality of target data sources, into a collection, and synthesizing the received data in the collection to establish a resource hierarchy. The collection is then queried, using criteria in a request for a resource from a requester to provide a selected resource from the collection, forming a response, the selected resource of the response being a best fit result, and returning the response to the requester.

Abstract: A cable for high speed data communications and method of manufacturing the cable, the cable including a first inner conductor enclosed by a first dielectric layer and a second inner conductor enclosed by a second dielectric layer, the inner conductors and the dielectric layers twisted in a rotational direction at a periodic rate along and about a longitudinal axis and conductive shield material wrapped in the rotational direction at the periodic rate along and about the longitudinal axis around the inner conductors and the dielectric layers, including overlapped wraps at the periodic rate along and about the longitudinal axis. Transmitting signals on the cable including transmitting a balanced signal characterized by a frequency in the range of 7-9 gigahertz on the cable.

Abstract: A cable for high speed data communications and methods for manufacturing such cable are disclosed, the cable including a first inner conductor enclosed by a first dielectric layer and a second inner conductor enclosed by a second dielectric layer. The cable also includes conductive shield material wrapped in a rotational direction at a rate along and about the longitudinal axis around the inner conductors and the dielectric layers, including overlapped wraps of the conductive shield material along and about the longitudinal axis, the conductive shield material having a variable width. Transmitting signals on the cable including transmitting a balanced signal characterized by a frequency in the range of 7-9 gigahertz on the cable.

Abstract: A programmable diagnostic memory module provides enhanced testability of memory controller and memory subsystem design. The programmable diagnostic memory module includes an interface for communicating with an external diagnostic system, and the interface is used to transfer commands to the memory module to alter various behaviors of the memory module. The altered behaviors may be changing data streams that are written to the memory module to simulate errors, altering the timing and/or loading of the memory module signals, downloading programs for execution by a processor core within the memory module, changing driver strengths of output signals of the memory module, and manipulating in an analog domain, signals at terminals of the memory module such as injecting noise on power supply connections to the memory module. The memory module may emulate multiple selectable memory module types, and may include a complete storage array to provide standard memory module operation.