Abstract: The circuit comprises a first and a second transistor provided with the sources coupled to one end of a supply voltage and the gates coupled to one another, and a third and fourth transistor provided with the sources coupled to the other end of the supply voltage, the gates coupled to one another, the drains coupled to the respective drains of said first and second transistor, and the gates of the first and of the fourth transistor being furthermore shorted each with its own gate. The coupling between the drains of the first and of the third transistor is constituted by a preset resistor to the ends of which the base and the emitter of a bipolar transistor are coupled having the collector of the bipolar transistor coupled to one end of the supply voltage. The four transistors may be replaced by respective pairs of transistors suitably coupled to each other.

Abstract: A CMOS output stage with large voltage swing particularly suited for output buffers in monolithic analog subsystems has two, push-pull connected, complementary MOS transistors and has feedback for improving its swing and linearity characteristics in comparison with those of the output stages without feedback of the prior art and also has sufficient stability characteristics which are re-established by local compensation. Furthermore the quiescent current is stabilized by a dedicated control circuit cooperating with a local feedback circuit.

Abstract: The amplifier comprises two like CMOS cascode circuits, each having a first and a second transistors with channels having a first plurality and a third and fourth transistors with channels having the opposite polarity, the drain of the first transistor being connected to the source of the second transistor, and the drain of the fourth transistor being connected to the source of the third transistor, the drains of the second and of the third transistors being connected to each other end composing one of the output terminals of the amplifier, the sources of the first transistors being connected to each other and to the drain of a fifth transistor with a channel having the first polarity, the source of which is fed by a first supply voltage, the sources of the fourth transistors of the two cascode circuits being fed by a second supply voltage.

Abstract: An integrated circuit employing a differential integrator and switched capacitor network to provide auto-zeroing. The differential integrator utilizes a feedback circuit between its inputs and outputs. A switched capacitor network coupled to the inputs of the amplifier provides voltage division of differential reference signals which determine the amount of DC offset. The amplifier then integrates the reference signals to a predetermined time constant, wherein the average voltage of the output of the integrator is used to provide auto-correction of the DC offset. A second switched capacitor voltage divider network and a second differential integrator cascaded to the first circuit provides a second time constant for fine-tuning the auto-correction signal.

Abstract: An integrated circuit for filtering signals by having cascaded switched capacitor sampling filters. The circuit includes a transmit section which has an anti-aliasing filter, a core section filter, a highpass filter and an encoder for providing analog-to-digital conversion. Each successive filter is sampled at a lower rate to inhibit anti-aliasing. The circuit also includes a receive section which has a digital-to-analog decoder, an output buffer, a receiver core filter and a power amplifier.

Abstract: In a buffer with an operational amplifier having two inputs and two outputs and two feedback capacitances are inserted two other capacitances which in the measurement stage are switched in parallel to the feedback ones with opposite sign in such a manner as to cancel out the effects on the output voltage signal.

Abstract: An integrated circuit employing a differential amplifier and switched capacitor networks to provide filtering techniques. The differential amplifier utilizes a feedback circuit between its inputs and outputs. A switched capacitor network coupled to the inputs of the amplifier and a second switched capacitor network coupled to the outputs of the amplifier provide the requisite filtering necessary for analog-to-digital encoding or digital-to-analog decoding. The differential configuration allows for less noise and better power supply rejection, whereby allowing for a higher signal-to-noise ratio.

Abstract: The invention is a differential amplifier, having internal common mode feedback and correction between a first stage and a second stage of the differential amplifier, which is used as a switched capacitor integrator in a switch capacitor filter in combination with an encoder and decoder which is fully differential throughout the circuit.